Abstract: The examples relate to various implementations of a software configurable lighting device having a multi-processor system including a central processing unit and a parallel processing unit. The software configurable lighting device utilizes the multi-processor system to efficiently transform and/or modify control data. The software configurable lighting device also includes a transparent image display device and a general illumination device. Transformed and/or modified control data is utilized to drive the transparent image display device and the general illumination device in combination.

Abstract: Example embodiments of the present disclosure provide methods, a computer system and a computer program product for multimedia information display in an elevator. According to an embodiment of the method, moving status information of an elevator is obtained. The moving status information comprises at least a source floor information indicating where a passenger enters the elevator and a target floor information indicating where the elevator is moving. The multimedia information to be displayed is determined based on the moving status information of the elevator and the determined multimedia information is displayed in the elevator.

Abstract: A system and method for controlling a display on a client device such as a wireless communication device, e.g., a smartphone or similar device is presented. Aspects of the invention permit a more efficient and fast representation of the desired output onto the client's display including by caching certain display data on the client, temporarily and/or permanently, and transmitting only command and control level data from the server to the client for display of the cached display data. Additional aspects of the invention reduce the volume of data sent between the client device and the server without affecting the experience of the client device user. Additional aspects of the invention provide for secure acquisition and display of data on the client device.

Abstract: Systems and methods for creating entities that operate within a virtual environment, where in some embodiments the entities are substantially autonomous in the sense that they are capable of communications and interactions with the environment and other entities. In some embodiments, the entities may be capable of interacting with an environment other than the one in which they were created and originally configured. In some embodiments, the entities may engage in interactions with other entities that operate to enable changes in behavior of one or both of the entities.

Abstract: A graphics processing system processes primitive fragments using a rendering space which is sub-divided into tiles. The graphics processing system comprises processing engines configured to apply texturing and/or shading to primitive fragments. The graphics processing system also comprises a cache system for storing graphics data for primitive fragments, the cache system including multiple cache subsystems. Each of the cache subsystems is coupled to a respective set of one or more processing engines. The graphics processing system also comprises a tile allocation unit which operates in one or more allocation modes to allocate tiles to processing engines. The allocation mode(s) include a spatial allocation mode in which groups of spatially adjacent tiles are allocated to the processing engines according to a spatial allocation scheme, which ensures that each of the groups of spatially adjacent tiles is allocated to a set of processing engines which are coupled to the same cache subsystem.

Abstract: An example apparatus includes a processor to send a plurality of image frames to a display device via a digital display interface. At least two frames of the plurality of frames are to be displayed at a refresh rate that varies in response to an adjustment of a duration of a vertical blanking interval associated with the two frames.

Abstract: One embodiment provides for a general-purpose graphics processing unit comprising a compute cluster including multiple compute units, a stall notification module to detect that one or more compute units in the compute cluster are stalled and send stall notification, and a rebalance module to receive the stall notification, the rebalance module to migrate a first workload from one or more stalled compute units in response to the stall notification.

Abstract: Systems and methods for synchronizing a video source and display circuitry using a dynamic tearing effect (TE) signal are provided. In one embodiment, an electronic display device includes: variable refresh rate circuitry that, when no new frame data is provided to the electronic display device, extends a vertical blanking period and reduces a refresh rate of the electronic display device. A tearing effect signal is generated, which is selectively set to a first logical level at a first period of time and a second logical level at a second period of time. The tearing effect signal is provided to the host electronic device that provides frame data to the electronic display device and upon receipt of new frame data, an un-extended vertical blanking period is returned to and the frame data at the next frame boundary is displayed.

Abstract: One embodiment of the present disclosure provides a method for writing display data, a display apparatus and a mobile terminal. The method includes: compressing, into a compressed package, display data to be written into a display unit within at least two clock cycles, and sending the compressed package to a driving unit; storing the received compressed package into a cache, and when each clock cycle comes, decompressing, by the driving unit, from the compressed package display data to be written into the display unit within the each clock cycle, and writing the display data to be written into the display unit within the each clock cycle into the display unit.

Abstract: A high-speed ring topology. In one embodiment, two base chip types are required: a “drawing” chip, LoopDraw, and an “interface” chip, LoopInterface. Each of these chips have a set of pins that supports an identical high speed point to point unidirectional input and output ring interconnect interface: the LoopLink. The LoopDraw chip uses additional pins to connect to several standard memories that form a high bandwidth local memory sub-system. The LoopInterface chip uses additional pins to support a high speed host computer host interface, at least one video output interface, and possibly also additional non-local interconnects to other LoopInterface chip(s).

Abstract: An electronic device includes a host device configured to provide a display device with first image data having a first number of bits per pixel in a normal mode, and to convert the first image data into second image data having a second number of bits per pixel less than the first number of bits per pixel to provide the display device with the second image data in a low power mode. The display device is configured to display a first image based on the first image data in the normal mode, and to convert the second image data into third image data to display a second image based on the third image data in the low power mode.

Abstract: In accordance with some embodiments, a command streamer may use a cache of programmable size to cache commands to improve memory bandwidth and reduce latency. The size of the command cache may be programmably set by the command streamer.

Abstract: A tile-based graphics processing pipeline includes rendering circuitry for rendering graphics fragments to generate rendered fragment data. Each graphics fragment has associated with it a set of sampling positions to be rendered. The pipeline also includes a tile buffer configured to store rendered fragment data for sampling positions prior to the rendered fragment data being written out to memory, write out circuitry configured to write a compressed representation of the rendered fragment data for a tile in the tile buffer to memory, and processing circuitry. The processing circuitry identities, based on the writing of rendered fragment data to the tile buffer, any blocks comprising sampling positions within a tile having the same data value associated with each sampling position in the block, and to, when such a block of sampling positions is identified, trigger the write out circuitry to write a compressed representation of the block to the memory.

Abstract: A method of processing a graphics command may include: receiving the graphics command from an apparatus that executes an application; selecting at least one shader included in the graphics command to be processed by a graphics processor; creating a shader program using the selected at least one shader; searching for a shader program corresponding to the created shader program from among one or more previously compiled shader programs; and outputting a found shader program.

Abstract: The present disclosure discloses a data transmission method, a data transmission system and a portable display device, relates to the technical field of display, and can reduce power consumption of the portable display device and improve battery endurance of the portable display device. The data transmission method comprises: compressing display data; transmitting the compressed display data; and decompressing the compressed display data. The data transmission method and the data transmission system according to the present disclosure are used for data transmission between a processor and a source drive circuit in the portable display device.

Abstract: An apparatus and method are described for improving the efficiency of graphics operations in a virtual execution environment.

Abstract: The present disclosure describes techniques for removing unnecessary processing stages from a graphics processing pipeline based on the format of data passed between the stages. Starting with a stage at a middle point in a pipeline, formats of data that are input to and output from the middle stage may be compared to each other. If the formats match, the middle stage may be removed from the pipeline. Thereafter, the format of data input to a pair of middle stages of the pipeline and output from the pipeline may be compared and, if they match, the middle pair may be deleted. This process may repeat until a middle pair is found where no match occurs between the input and output format. The remaining stages of the pipeline may be retained. In cases where a pipeline is not symmetrical, the formats of data at each node may be compared to each other.

Abstract: Described herein is providing GPU resources across machine boundaries for a virtual machine that migrates between servers. Data centers tend to have racks of servers that have limited access to GPUs. Accordingly, disclosed herein is providing GPU resources to computing devices that have limited access to GPUs across machine boundaries.

Abstract: An example head-worn device includes a camera, a display device, weld detection circuitry, and pixel data processing circuitry. The camera generates first pixel data from a field of view of the head-worn device. The display device displays second pixel data to a wearer of the head-worn device based on the first pixel data captured by the camera. The weld detection circuitry determines whether a welding arc is present and generates a control signal indicating a result of the determination. The pixel data processing circuitry processes the first pixel data captured by the camera to generate the second pixel data for display on the display device, where a mode of operation of said pixel data processing circuitry is selected from a plurality of modes based on said control signal.

Abstract: The embodiments disclosed herein relate to the field of graphics processing and, without limitation, the use of hardware and software in the memory layout of graphics items to prevent the malicious use of graphics resources. In greater particularity, embodiments of the disclosure provide varying software and hardware arrangements for transforming an allocated resource address that is deterministic and often visible to software in the system into an effective address that is neither deterministic nor visible to most software. For example, in an embodiment of the disclosure, software in the user-space of the operating system may use allocated addresses to map certain graphics resources for GPU access. When those allocated addresses are presented to the kernel, the addresses are transformed to effective addresses, which may be both randomized (e.g., not easily predictable from the allocated address) and/or obscured from the user space processes.