Abstract: Embodiments of voltage-controlled oscillators for wireless transmission of data are disclosed herein. In one example, an oscillator circuit includes an active network, a passive differential network coupled to the active network, and a tail tank connected to the active network through a low impedance point of the active network is disclosed. The active network is configured to generate an activating signal for sustaining oscillation of the oscillator circuit. The passive differential network has a first input impedance magnitude peak at a first frequency and a second input impedance magnitude peak at a second frequency. The tail tank circuit has a third input impedance magnitude peak at a third frequency.

Abstract: An apparatus is provided to improve lock time of a phase locked loop, wherein the apparatus comprises: a ring oscillator including at least two delay stages, wherein each delay stage has a controllable delay; and a multiphase frequency monitor coupled to the ring oscillator to monitor frequency at an output of at least two delay stages of the ring oscillator.

Abstract: Some aspects of the present disclosure relate to an apparatus, a PLL and an electronic device. The apparatus comprises a voltage-to-current (V2I) converter, a current controlled oscillator and a compensation current. The V2I converter is operable to receive a first voltage and generate a first current based on the first voltage. The current controlled oscillator is coupled to the V2I converter and operable to generate an oscillation signal based on a second current from or to the V2I converter. The compensation circuit is coupled to the V2I converter and operable to receive a third current from or to the V2I converter. The second and third currents vary in response to at least one of temperature variation and supply voltage variation of the apparatus. Variation direction of the third current is opposite to variation direction of the second current and different frequencies may be provided for a low supply voltage domain.

Abstract: A voltage controlled oscillator (VCO) circuit is disclosed. The VCO circuit comprises a VCO tuning circuit comprising a primary inductive coil. In some embodiments, the VCO tuning circuit is configured to generate a VCO output signal at a first resonance frequency. The VCO circuit further comprises a filter circuit comprising a secondary inductive coil. In some embodiments, the filter circuit is configured to resonate at a second, different, resonance frequency, in order to filter a noise associated with the VCO tuning circuit. In some embodiments, the primary inductive coil associated with the VCO tuning circuit and the secondary inductive coil associated with the filter circuit are concentrically arranged with respect to one another. Further, in some embodiments, the primary inductive coil associated with the VCO tuning circuit and the secondary inductive coil associated with the filter circuit are magnetically decoupled with respect to one another.

Abstract: A method and circuit for linearizing a frequency response of an oscillator controlled by a plurality of capacitor banks are disclosed. In the disclosed method, for each capacitor bank of at least two capacitor banks of the oscillator, a respective sensitivity characteristic of the capacitor bank is determined. Further, a set of reference output frequency control words (FCWs) for an associated set of frequencies of the oscillator are determined. When an input FCW is received and an output FCW is responsively provided based on (i) an interpolation between two reference output FCWs of the set of reference output FCWs and (ii) the respective sensitivity characteristics of the at least two capacitor banks of the oscillator. The output FCW is then applied to the at least two capacitor banks of the oscillator.

Abstract: A method of quickly locking a locked loop includes generating an intermediate reference signal having an intermediate reference frequency between a desired output frequency and a reference frequency of a reference signal, and setting an output frequency of a controllable oscillator to the desired output frequency using a first locked loop having a first loop divider value. The first loop divider value is set such that the intermediate reference frequency multiplied by the first loop divider value is equal to the desired output frequency. The controllable oscillator is then coupled to a second locked loop when the first locked loop locks, with the second locked loop is being activated. The first locked loop is then deactivated.

Abstract: Apparatus and methods demonstrate a chip-scale direct optical to RF link that frequency divides up to 120 GHz optical frequency combs to 10 GHz using harmonic multi-tone injection locking. The embodied invention links widely separated optical frequency combs in the millimeter wave regime (>120 GHz) or THz domain (100s of GHz to THz domain), e.g., microresonator-based frequency combs, which are currently outside of the photo-detection region, into the microwave domain (10s of GHz) where it can be easily photo-detected and controlled. The technique works as a perfect optical divider, using a mode-locked laser and optical injection locking as the technique to phase-lock both lasers.

Abstract: A device includes a transformer that further includes a primary and a secondary windings. A switch is coupled to the primary winding, and this switch is controlled by the received digital input signal. An oscillator is further formed on the secondary winding where the oscillator oscillates in response to variations of the received input signal. A detector coupled to the oscillator will then detect the oscillations in response to the variations of the received input signal. Thereafter, the detector generates a digital output based on the detected oscillations.

Abstract: A voltage controlled oscillator (VCO) circuit and method achieves linearized frequency tuning over an extended range of analog tuning voltage by implementing a magnetic balun/transformer for biasing and coupling varactor elements. An active negative transconductance circuit of cross-coupled transistors have drains connected with a resonant tank circuit and at least a first varactor element having ends connected to respective first ends of respective first coils of a respective first and second magnetic balun. Respective second ends of respective first coils of respective first and second baluns are connected to a first reference supply voltage. A second varactor element has ends connecting respective first ends of respective second coils of said first and second baluns. A sinking of a bias current through the resonant tank circuit and the transconductance circuit generates an oscillating signal. A calibration method achieves precise VCO gain over wide tuning voltage range, thereby enhancing VCO linearity.

Abstract: Methods and systems for a complementary metal oxide semiconductor wireless power receiver may include a receiver chip with an inductor, a configurable capacitance, and a rectifier. The method may include receiving an RF signal utilizing the inductor, extracting a clock signal from the received RF signal, generating a DC voltage utilizing a rectifier circuit, sampling the DC voltage, and adjusting the configurable capacitance based on the sampled DC voltage. The rectifier circuit may include CMOS transistors and T-gate switches for coupling to the inductor. The T-gate switches may be controlled by the generated DC voltage. A signed based gradient-descent algorithm may be utilized to maximize the DC voltage. The DC voltage may be sampled utilizing a comparator powered by the DC voltage, which may adaptively configure the capacitance. The inductor may be shielded utilizing a floating shield. The DC voltage may be increased utilizing a voltage-boosting rectifier.

Abstract: An oscillator circuit (10) for generating quadrature-related first and second oscillation signals having equal frequencies comprises a first oscillation circuit (VCO_I) configured to generate the first oscillation signal having a first controllable frequency, a second oscillation circuit (VCO_Q) configured to generate the second oscillation signal having a second controllable frequency; and a controller (100) configured to enable and disable oscillation of the first and second oscillation circuits (VCO_I, VCO_Q) and to control the first and second controllable frequencies, such that when the oscillation is enabled, the first and second controllable frequencies are controlled to be initially unequal and then to become equal.

Abstract: A hardware device includes a frequency lock loop (FLL) that includes a phase loop filter, and a phase lock loop (PLL) such as an all digital PLL (ADPLL) that includes a frequency loop filter. A controller provides a first control signal to the FLL and a second control signal to the PLL when the device operates the same. The device can also include a digital controlled oscillator (DCO) and part of one or more of the FLL and the PLL. The FLL and the PLL include first and second filters, respectively. The filters are coupled to the DCO. A time-to-digital converter (TDC) and a divider receive an input from the DCO. The controller forms a first loop with the first filter, the TDC, and the divider, and the controller forms a second loop with the second filter, the TDC, and the divider.

Abstract: The redundant power supply device includes a power output port, a converter, a comparator unit and an output protection switch. The output protection switch is electrically connected between an output terminal of the converter and the power output port, and the comparator unit compares the voltage across the output protection switch and controls the output protection switch accordingly. The redundant power supply device has a control module that performs a protection control method. When the voltage of the power output port is higher than a preset voltage value and the output current is lower than a preset current value, the control module outputs a short turn-off signal to the enable terminal of the comparator unit, preventing the comparator unit from failing to perform the output protection as designed due to external abnormal slow rising voltage, and ensuring the redundant power supply unit operates normally.

Abstract: A stabilized oscillator which comprises a ring oscillator with an odd number of inverters. The output of an inverter is driving a capacitor and the input of the a next inverter. A feedback element is configured for generating a first and a second current with a fixed current ratio between both, and for applying the same voltage over the ring oscillator as over a resistor which is connected in parallel with a current compensator. The first current goes through the parallel connection, the second current goes through the ring oscillator. The current compensator is configured such that the ratio of the current through the current compensator and a parasitic current component of the second current is substantially equal to the ratio of the first and second current.

Abstract: According to one embodiment, an electronic circuit includes a first conductive component, a second conductive component, a first current path, and a second current path. The second conductive component is capacitively coupled to the first conductive component. The first current path of a superconductor includes a first portion and a second portion. The first portion is connected to the first conductive component. The second portion is connected to the second conductive component. The first current path includes N first Josephson junctions connected in series and provided between the first and second portions. The second current path of a superconductor includes a third portion and a fourth portion. The third portion is connected to the first conductive component. The fourth portion is connected to the second conductive component. The second current path includes a second Josephson junction connected in series and provided between the third and fourth portions.

Abstract: A method of generating precise and PVT-stable time delay or frequency using CMOS circuits is disclosed. In some implementations, the method includes providing a reference voltage using a resistive module at a positive input terminal of an operational amplifier, coupling gates of a pair of p-type metal oxide semiconductor (pMOS) transistors and a compensation capacitor to an output terminal of the operational amplifier to generate a first bias signal, and coupling a pair of n-type metal oxide semiconductor (nMOS) transistors to a negative terminal of the operational amplifier to generate a second bias signal at the negative terminal, wherein the pair of nMOS transistors is substantially the same as a pair of nMOS transistors in the CMOS delay circuit.

Abstract: A power transfer device includes an oscillator circuit having a first node, a second node, and a control terminal. The oscillator circuit includes a cascode circuit comprising transistors having a first conductivity type and a first breakdown voltage. The cascode circuit is coupled to the control terminal, the first node, and the second node. The oscillator circuit includes a latch circuit coupled between the cascode circuit and a first power supply node. The latch circuit includes cross-coupled transistors having the first conductivity type and a second breakdown voltage. The first breakdown voltage is greater than the second breakdown voltage. The oscillator circuit may be configured to develop a pseudo-differential signal on the first node and the second node. The pseudo-differential signal may have a peak voltage of at least three times a voltage level of an input DC signal on a second power supply node.

Abstract: An oscillator includes a resonator, a circuit device that is electrically coupled to the resonator and generates a clock signal, and an output terminal that is electrically coupled to the circuit device and outputs the clock signal. The circuit device includes an abnormality detection circuit, and when an abnormal state is detected by the abnormality detection circuit, the circuit device changes a signal characteristic of the clock signal.

Abstract: A crowbar circuit includes a diode bridge and switching elements, and is configured to rectify the full wave of AC power between the power lines and output the rectified AC power to a positive electrode line and a negative electrode line. A capacitor is connected between the power line and the negative electrode line. When a detection value of a current sensor indicates that the power reception device is not receiving power normally, a charging ECU stops the power conversion operation of the power transmission device, and thereafter outputs at least one of short circuit commands to the crowbar circuit so as to determine whether or not a malfunction is present in the crowbar circuit based on a detection value of the voltage sensor.

Abstract: In accordance with some embodiments of the present invention, a method of determining a Q-factor in a transmit circuit with a resonant circuit includes setting a system voltage; performing a coarse scan to determine a course resonant frequency; performing a fine scan based on the course scan to determine a resonant frequency; performing a final measurement at the resonant frequency to determine an average system voltage and an average peak voltage of the resonant circuit; calculating a Q parameter from the average system voltage and the average peak voltage; and calculating the Q-factor from the Q parameter.