Abstract: The invention relates to a memristive element (M) formed by: a first electrode (10); a second electrode (30); and an active region (20) making direct electrical contact with said first and second electrodes, characterized in that said active region essentially consists of a thin film of an insertion compound containing at least one alkali metal, said compound being an oxide or chalcogenide of at least one transition metal and being able to conduct both electrons and ions. Non-volatile electronic memory formed from a plurality of such memristive elements.

Abstract: A microcavity organic light emitting diode (OLED) device is disclosed having a narrow-band phosphorescent emitter.

Abstract: A method for a non-volatile, ferroelectric random access memory (F-RAM) device that includes a ferroelectric capacitor aligned with a preexisting structure is described. In one embodiment, the method includes forming an opening in an insulating layer over a contact in a planar surface of a substrate to expose at least a portion of the contact. Next a self-aligned contact (SAC) is formed electrically coupling to the contact, the SAC medially located in the opening and proximal to a sidewall thereof. A ferroelectric spacer is then formed in the opening medially of the SAC, and a top electrode spacer formed in the opening over the insulating cap and medially of the ferroelectric spacer.

Abstract: A semiconductor device and a method for fabricating the semiconductor device are disclosed. A gate stack is formed over a substrate. A spacer is formed adjoining a sidewall of the gate stack. A recess is formed between the spacer and the substrate. Then, a strained feature is formed in the recess. The disclosed method provides an improved method by providing a space between the spacer and the substrate for forming the strained feature, therefor, to enhance carrier mobility and upgrade the device performance.

Abstract: A memory device includes a graphene switching device having a source electrode, a drain electrode and a gate electrode. The graphene switching device includes a Schottky barrier formed between the drain electrode and a channel in a direction from the source electrode toward the drain electrode. The memory device need not include additional storage element.

Abstract: A radio frequency switch includes a first transmission line, a second transmission line, a first electrode electrically coupled to the first transmission line, a second electrode electrically coupled to the second transmission line, and a phase change material, the first transmission line coupled to a first area of the phase change material and the second transmission line coupled to a second area of the phase change material. When a direct current is sent from the first electrode to the second electrode through the phase change material, the phase change material changes state from a high resistance state to a low resistance state allowing transmission from the first transmission line to the second transmission line. The radio frequency switch is integrated on a substrate.

Abstract: A highly reliable semiconductor device including a transistor using an oxide semiconductor is provided. In a semiconductor device including a bottom-gate transistor including an oxide semiconductor layer, a first insulating layer is formed in contact with the oxide semiconductor layer, and an oxygen doping treatment is performed thereon, whereby the first insulating layer is made to contain oxygen in excess of the stoichiometric composition. The formation of the second insulating layer over the first insulating layer enables excess oxygen included in the first insulating layer to be supplied efficiently to the oxide semiconductor layer. Accordingly, the highly reliable semiconductor device with stable electric characteristics can be provided.

Abstract: A liquid crystal display panel including a bottom layer, a first alignment layer, a liquid crystal layer, a second alignment layer, a top layer and a plurality of conductive connectors electrically connecting the top layer and the bottom layer is provided. Each of the plurality of conductive connectors includes conductive powders.

Abstract: A nonvolatile memory device includes an insulating pattern extending in a first direction, a conductive pattern on the insulating pattern, and an electrode structure extending in the first direction. The electrode structure is adjacent the insulating pattern and conductive pattern, and includes an alternating pattern of gate electrodes and interlayer insulating films. A protection film adjacent a side surface of the electrode structure has a shorter length in the first direction than a length of the electrode structure.

Abstract: A multi-layer scavenging metal gate stack, and methods of manufacturing the same, are disclosed. In an example, a gate stack disposed over a semiconductor substrate includes an interfacial dielectric layer disposed over the semiconductor substrate, a high-k dielectric layer disposed over the interfacial dielectric layer, a first conductive layer disposed over the high-k dielectric layer, and a second conductive layer disposed over the first conductive layer. The first conductive layer includes a first metal layer disposed over the high-k dielectric layer, a second metal layer disposed over the first metal layer, and a third metal layer disposed over the second metal layer. The first metal layer includes a material that scavenges oxygen impurities from the interfacial dielectric layer, and the second metal layer includes a material that adsorbs oxygen impurities from the third metal layer and prevents oxygen impurities from diffusing into the first metal layer.

Abstract: A light-emitting device in which deterioration of an organic EL element due to impurities such as moisture or oxygen is suppressed is provided. The light-emitting device includes a first substrate and a second substrate facing each other, a light-emitting element provided over the first substrate, a first sealant provided so as to surround the light-emitting element, and a second sealant provided so as to surround the first sealant. One of the first sealant and the second sealant is a glass layer and the other is a resin layer. A dry agent is provided in a first space surrounded by the first sealant, the second sealant, the first substrate, and the second substrate, or in the resin layer. The light-emitting element is included in a second space surrounded by the first sealant, the first substrate, and the second substrate.

Abstract: Disclosed are a dye-sensitized solar cell module and a method of manufacturing the same. The dye-sensitized solar cell module includes a working electrode formed by stacking a collector and a photo-electrode to which a dye is adsorbed on a transparent conductive substrate; a counter electrode formed by stacking a collector and a catalytic electrode on a transparent conductive substrate; and an electrolyte filled in a space between the working electrode and the counter electrode sealed by a sealant. A glass substrate for the working electrode of glass substrates forming the transparent conductive substrates for the electrodes is a thin glass plate substrate thinner than the glass substrate for the working electrode.

Abstract: A method performed using a resistive device, where the resistive device includes a substrate with an active region separated from a gate electrode by a dielectric and electrical contacts along a longest dimension of the gate electrode, the method comprising, performing one or more processes to form the resistive device, measuring a resistance between the electrical contacts, and correlating the measured resistance with a variation in one or more of the processes.

Abstract: III-N transistors with recessed gates. An epitaxial stack includes a doped III-N source/drain layer and a III-N etch stop layer disposed between a the source/drain layer and a III-N channel layer. An etch process, e.g., utilizing photochemical oxidation, selectively etches the source/drain layer over the etch stop layer. A gate electrode is disposed over the etch stop layer to form a recessed-gate III-N HEMT. At least a portion of the etch stop layer may be oxidized with a gate electrode over the oxidized etch stop layer for a recessed gate III-N MOS-HEMT including a III-N oxide. A high-k dielectric may be formed over the oxidized etch stop layer with a gate electrode over the high-k dielectric to form a recessed gate III-N MOS-HEMT having a composite gate dielectric stack.

Abstract: Improved 14 nm cells, as depicted in FIGS. 1-53, realize reduced pattern complexity, high yield, high performance, and improved compactness (one poly-stripe smaller than existing designs for the disclosed cells). The invention relates to ICs made using these cells (or topologically equivalent variants thereof), as well as processes for makings such ICs using said cells (or their variants).

Abstract: LED modules are disclosed having a control MOSFET, or other transistor, in series with an LED. In one embodiment, a MOSFET wafer, containing an array of vertical MOSFETS, is aligned and bonded to an LED wafer, containing a corresponding array of vertical LEDs, and singulated to form thousands of active 3-terminal LED modules with the same footprint as a single LED. Despite the different forward voltages of red, green, and blue LEDs, RGB modules may be connected in parallel and their control voltages staggered at 60 Hz or greater to generate a single perceived color, such as white. The RGB modules may be connected in a panel for general illumination or for a color display.

Abstract: An organic light emitting device includes a first electrode and a second electrode, an organic layer including a light emitting layer between the first electrode and the second electrode, and an insulating film covering a rim of the first electrode from a surface thereof to a side surface thereof, and having an internal wall surface being in contact with the organic layer, and one or more corner sections in the internal wall surface with a ridge line thereof in parallel with the surface of the first electrode.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The device may include a transistor on a substrate comprising a gate insulating pattern, a gate electrode and an impurity region, a shared contact plug electrically connected to the gate electrode and the impurity region, and an etch-stop layer between side surfaces of the gate electrode and the shared contact. The shared contact plug may include a first conductive pattern electrically connected to the first impurity region and a second conductive pattern electrically connected to the gate electrode, and a top surface of the first conductive pattern may be higher than a top surface of the gate electrode.

Abstract: An integrated circuit packaging system and method of manufacture thereof including: providing an unplated leadframe having a contact protrusion; depositing a solder resist on the contact protrusion; forming a contact pad and traces by etching the unplated leadframe; applying a trace protection layer on the contact pad and the traces; removing the solder resist; forming a recess in the trace protection layer by etching a top surface of the contact pad to a recess distance below a top surface of the trace protection layer; and depositing an external connector directly on the top surface of the contact pad.

Abstract: A transistor device having a graphene base for the transport of electrons into a collector is provided. The transistor consists of a heterostructure comprising an electron emitter, an electron collector, and a graphene material base layer consisting of one or more sheets of graphene situated between the emitter and the collector. The transistor also can further include an emitter transition layer at the emitter interface with the base and/or a collector transition layer at the base interface with the collector. The electrons injected into the graphene material base layer can be “hot electrons” having an energy E substantially greater than EF, the Fermi energy in the graphene material base layer or can be “non-hot electrons” having an energy E approximately equal to than EF. The electrons can have the properties of ballistic transit through the base layer.