Abstract: A cooling device of a laser diode array includes a stacking of a plurality of metal plate members formed with a branched groove pattern or apertures acting as a cooling water path, by a chemical etching process.

Abstract: The present invention concerns a method for optimising the etching rate of a polycrystalline layer having a predetermined composition comprising at least two chemical species arranged in the form of grains and grain boundaries, this layer having to be formed on a semiconductor substrate by a deposition process whose parameters have to be determined, and by a etching process with a reactive agent capable of reacting with the preponderant species in the layer. This method defines a structure parameter representing the grain boundary density of the layer, and comprises a step consisting in determining the smallest structure parameter value from among different samples having the predetermined composition, this value being considered as that which optimises the etching rate.

Abstract: Methods for establishing reference coordinates for a point on a component. The apparatus includes a base and a component carriage that is movably attached to the base for movement relative to the base along a first axis. The apparatus further includes a locator plate movably attached to the base for movement relative to the base along a second axis that is perpendicular to the first axis. Coordinate indicia is provided on the component carriage and reference indicia is provided on the locator plate. When the reference indicia is brought into registration with the point on the component, corresponding coordinates are identified where the reference indicia cross the coordinate indicia located on the carriage.

Abstract: The barrier layers within a quantum well active region of a vertical cavity surface emitting laser can be silicon doped. Under thermal annealing, the silicon doped barrier layers will form disordered regions of the quantum well active region around the remaining non-disordered regions of the quantum well active region. The disordered regions of the quantum well active region will prevent diffusion of injected carriers from the non-disordered, light emitting quantum well active region.

Abstract: The disclosure is a method for fabricating a nitride semiconductor laser device of group-III nitride semiconductor having a substrate. The method includes a step of forming a crystal layer made of a group-III nitride semiconductor (AlxGa1-x)1-yInyN (0≦x≦1, 0≦y≦1) having an added group II element over the substrate; a step of heating the crystal layer up to a predetermined temperature in a thermal treatment atmosphere and maintaining the predetermined temperature for a first time period; and a step of introducing a hydrocarbon gas into the thermal treatment atmosphere for at least a partial time period within the first time period. The method further includes a step of irradiating an electromagnetic wave or photons to the crystal layer in the at least a partial time period, wherein the electromagnetic wave or photons have an energy greater than an energy forbidden band width of the group III nitride semiconductor in the crystal layer.

Abstract: A resist pattern for formation of diffraction grating is formed on a semiconductor substrate so that the area of each aperture of diffraction grating increases gradually toward the end of diffraction grating formation region, after which etching is conducted to produce a diffraction grating substrate. On the diffraction grating substrate are formed a guide layer, an active layer and a clad layer, whereby a semiconductor laser partially having a diffraction grating is produced.

Abstract: The invention relates to method of formation of an impurity region in a semiconductor layer by introducing a dopant impurity as a donor or an acceptor. The formation method comprises the steps of: mixing an impurity gas with a gas containing any one of H2 and an inert gas, electrically discharging the mixed gas, diffusing impurities adhered to the surface of a semiconductor layer into the semiconductor layer, by introducing the discharged impurity gas to the surface of the semiconductor layer and at the same time accelerating ions of the gas containing any one of the H2 and inert gases to irradiate the surface of the semiconductor layer and, by raising the temperature of the surface of the semiconductor layer, electrically activating the same.

Abstract: A semiconductor device containing a polycrystalline silicon thin film wherein crystal grains of the silicon thin film have mainly a columnar structure and a crystal orientation of individual crystal grains is almost in a uniform direction can be produced by depositing a non-impurity-doped silicon thin film or an impurity layer on an interface of underlying film, followed by deposition of impurity-doped silicon thin film, if necessary, followed by heat treatment for polycrystallization.

Abstract: A method for switching properties of perovskite thin film materials, including the colossal magnetoresitive (CMR) and high temperature superconducting (HTSC) materials, is provided. Short electrical pulses are applied to the materials in thin films to change both reversibly and non-reversibly the electrical, thermal, mechanical and magnetic properties of the material. Reversible resistance changes of over a factor of 10 are induced in CMR materials at room temperature and in zero external magnetic field by electrical pulsing. Applications of the method and materials to form memory devices, resistors in electronic circuits which can be varied in resistance and other applications are disclosed.

Abstract: A semiconductor light emitting device has at least a substrate, an n-type GaN type semiconductor layer, an active layer, and a p-type GaN type semiconductor layer which are laminated on each other. In a first annealing process, the semiconductor light emitting device is annealing-processed thereby activating the p-type GaN type semiconductor layer. A metal mask is formed to cover an electric current introducing area of a surface of the p-type GaN type semiconductor layer. In a second annealing process the semiconductor light emitting device is annealing-processed thereby inactivating the p-type GaN type semiconductor layer.

Abstract: A III-V semiconductor structure and it producing method is provided. The method for forming a III-V semiconductor structure having a Schottky barrier layer includes the steps of (a) providing a III-V substrate, (b) treating the first barrier layer with a sulfuric acid solution, (c) forming a Schottky barrier layer on the III-V substrate, and (d) forming a metal layer on the second barrier layer. The Ill-V semiconductor structure includes a III-V substrate, a Schottky barrier layer, and a metal layer. The Schottky barrier layer is made of Al2(SO4)3 and In2(SO4)3.

Abstract: A method for the fabrication of a doped silicon layer, includes carrying out deposition by using a process gas containing SiH4, Si2H6 and a doping gas. The doped silicon layer which is thus produced can be used both as a gate electrode of an MOS transistor and as a conductive connection. At a thickness between 50 and 200 nm it has a resistivity less than or equal to 0.5 m&OHgr;cm.

Abstract: Semiconductor layers forming a light emitting layer and including an n-type layer and p-type layer are formed onto a substrate, then the n-type layer is exposed by removing a part of the laminated semiconductor layers. p-side electrode and n-side electrode are then respectively formed on the p-type layer on the surface of the laminated semiconductor layers and the exposed n-type layer, respectively in an electrically connected manner, followed by dicing of the substrate from the exposed n-type layer to the substrate at portions at which breaking of the substrate is performed. Then a protection film is provided on the entire surface of the laminated semiconductor layers as to expose the p-side and n-side electrodes, and breaking of the substrate is performed at dicing portions into individual chips. Consequently, semiconductor light emitting devices can be obtained by breaking the wafer into individual chips without etching the protection film and without damaging the protection film at the time of breaking.

Abstract: In a method for producing a silicon single crystal wafer, a silicon single crystal ingot in which nitrogen is doped is grown by a Czochralski method, sliced to provide a silicon single crystal wafer, and then subjected to heat treatment to out-diffuse nitrogen on the surface of the wafer. According to a further method, a silicon single crystal ingot is grown in which nitrogen is doped by a Czochralski method, with controlling nitrogen concentration, oxygen concentration and cooling rate, and then the silicon single crystal ingot is sliced to provide a wafer. A silicon single crystal wafer is obtained by slicing a silicon single crystal ingot grown by a Czochralski method with doping nitrogen, wherein the depth of a denuded zone after gettering heat treatment or device fabricating heat treatment is 2 to 12 &mgr;m, and the bulk micro-defect density after gettering heat treatment or device fabricating heat treatment is 1×108 to 2×1010 number/cm3.

Abstract: An optoelectronic device with a Group III Nitride active layer is disclosed that comprises a silicon carbide substrate; an optoelectronic diode with a Group III nitride active layer; a buffer structure selected from the group consisting of gallium nitride and indium gallium nitride between the silicon carbide substrate and the optoelectronic diode; and a stress-absorbing structure comprising a plurality of predetermined stress-relieving areas within the crystal structure of the buffer structure, so that stress-induced cracking that occurs in the buffer structure occurs at predetermined areas rather than elsewhere in the buffer structure.

Abstract: A method of forming a TFT-LCD with self-aligned transparent conducting layer over a substrate comprises the following steps. Initially, a first metal layer is formed on the substrate. Then, an insulating layer is formed on the substrate. A silicon layer is formed above the insulator layer. A doped silicon layer is formed above the silicon layer. A second metal layer is formed on the doped silicon layer, the silicon layer, and the substrate to define S/D structures and data lines. Then, a passivation layer is formed on the second metal layer, the silicon layer, and the insulating layer. A transparent conducting layer is formed on the passivation layer. Then, a negative photoresist is formed on the transparent conducting layer. A front-side exposure step is performed by using a first photomask. Additionally, a back-side exposure step is performed by using the first metal layer and the second metal layer as a mask.

Abstract: An improved formation method produces a metallic fuse capable of lowering the laser power needed for carrying out circuit repair. The method includes forming a metallic fuse when the penultimate metallic layer is formed. Since the metallic fuse is not too far away from the top surface, the power of the laser beam necessary for repairing the circuit can be moderate. Furthermore, the laser beam is more focused because it travels a shorter distance to reach the fuse, thereby avoiding unnecessary dispersion through intermediate material. Moreover, since the metallic fuse itself is not too thick, only a low-power laser beam is needed to melt the metallic fuse.

Abstract: Method for forming a single crystal GaN semiconductor substrate and a GaN diode with the substrate is disclosed which forms in a short time period, has a low crystal defect concentration and allows forming a size large enough to fabricate an optical device, the method including either the steps of fast growth of a GaN group material on an oxide substrate to a thickness without cracking and subjecting to mechanical polish to remove a portion of the oxide substrate, and growing GaN again on the grown GaN layer and complete removal of the remaining oxide substrate to obtain a GaN film, or the steps of separating the oxide substrate from the GaN layer utilizing cooling to obtain a GaN film, grown GaN on the GaN film to a predetermined thickness to form a GaN bulk single crystal and mirror polishing it to form the GaN single crystal substrate, whereby a defectless GaN single crystal substrate of a size required for fabrication of an optical device can be obtained within a short time period because fast homoeptaxia

Abstract: A semiconductor structure including a silicon wafer having silicon regions, and at least one GexSi1−x region integrated within the silicon regions. The silicon and GexSi1−x regions can be substantially coplanar surfaces. The structure can include at least one electronic device configured in the silicon regions, and at least one electronic device of III-V materials configured in said at least one GexSi1−x region. The structure can be, for example, an integrated III-V/Si semiconductor microchip. In accordance with another embodiment of the invention there is provided a method of fabricating a semiconductor structure, including providing a silicon wafer with a surface; forming a pattern of vias within the surface of the wafer; and depositing regions of GexSi1−x within the vias. The method can include the step of processing the wafer so that the wafer and GexSi1−x regions have substantially coplanar surfaces.

Abstract: In a self-aligned structure semiconductor laser in which a pair of optical guide layers are respectively formed on both faces of an active layer, the optical guide layers having a bandgap which is wider than that of the active layer, a pair of cladding layers are formed so as to sandwich the active layer and the optical guide layers, the cladding layers having a bandgap which is wider than bandgap of the optical guide layers, a pair of carrier blocking layers are respectively formed between the active layer and the optical guide layers, the carrier blocking layers having a bandgap which is wider than bandgaps of the active layer and the optical guide layers, and a current blocking layer having a stripe-like window is embedded in at least one of the optical guide layers, the current blocking layer is formed by selective growth. In this way, a window of a current blocking layer can be accurately formed and the fabrication yield can be improved while avoiding maleffects on other layers.