Abstract: In the construction of electronic devices with one or more flip chips and, in some cases, one or more leadless components, mounted on a substrate, the interconnections are made with conductive adhesive or solder paste deposited using specialized stencils or masks, including suitable snap-back stencils and direct-contact masks without snap back. A metal stencil (or mask) is placed temporarily onto the face of a substrate, such as a semiconductor wafer, circuit board or other substrate, and is spaced apart therefrom by standoff features. When the stencil is properly positioned with respect to the wafer or substrate, as by relational alignment holes or optical alignment methods, conductive adhesive material is deposited onto the substrate through holes or openings in the stencil. The metal stencil includes on the side thereof facing the substrate a flexible standoff layer having standoff features to space the stencil apart from the substrate.

Abstract: In order to provide a high mechanical strength and a progressive performance index resulting from an improved electric conductivity, a thermoelectric semiconductor is made by arranging a plurality of extruded bar-shaped thermoelectric semiconductor materials B1 in a bundle. The resulting bar-shaped thermoelectric semiconductor materials B1 are sintered and integrated concurrently by applying a force to each bar-shaped thermoelectric material B1 along a direction L2 perpendicular to an axis L1 thereof. This causes flows of materials, thereby further orientating cleavage planes which causes an advanced orientation effect.

Abstract: A process for forming a relatively high quality, lower cost organic semiconductor film is provided. A substrate is formed by depositing an organic semiconductor film via a lower cost method such as printing or spin coating on a support substrate. A portion of a solvent is vaporized to bring the vapor into contact with the film. The chemical potential of the vapor molecules is controlled to provide an interaction with the organic semiconductor film to alter the molecular arrangement of the film. The process further entails placing the substrate on a first temperature controlled stage and placing the solvent on a second temperature controlled stage. The chemical potential of the vapor is adjusted by controlling the temperature of the solvent. Appropriate annealing conditions are obtained by adjusting the temperature of the solvent, the substrate, and the anneal time. The process can assist manufacturing of lower cost displays that utilize arrays of organic thin-film transistors.

Abstract: A semiconductor light emitting element of nitride compound semiconductors excellent in cleavability, heat radiation and resistance to leakage is made by epitaxially grow a nitride compound semiconductor layers on a substrate of sapphire, for example, and thereafter separating the substrate. For separating the substrate, there are a technique using a abruption mechanism susceptible to a stress such as a “lift-off layer” and a recesses on a substrate. A technique using laser light to cause a local dense heat stress at the abruption mechanism is effective. A nitride compound semiconductor obtained by separating the substrate may be used as a new substrate to epitaxially grow high-quality nitride compound semiconductors thereon.

Abstract: A large-area semiconductor device formed by adhering substrates, which is free from damages on the elements provided on each substrate during transportation thereof, also free from loss in the production yield and the uniformity of performance, thereby achieving a low cost and a high quality, can be realized by carrying out full-cutting in a substantially vertical direction of each substrate at an end surface on a side of the substrates to be mutually opposed to one another to detach an unnecessary portion, carrying out half-cutting on at least one end surface on a side other than the side to be opposed to merely form a groove between an unnecessary portion and the substrate to leave the unnecessary portion in a connected state, and arranging thus cut substrates so that the full-cutting end surfaces thereof are mutually opposed.

Abstract: A titanium oxide film containing a dopant element formed on a silicon substrate by supplying a titanium compound for forming the titanium oxide film and a compound of a dopant element for a silicon semiconductor in a gaseous state to a surface of the silicon substrate heated to a predetermined temperature, wherein the concentration of the dopant element in the titanium oxide film becomes progressively higher from the surface of the titanium oxide film to the surface of the silicon substrate.

Abstract: A semiconductor device is provided, which makes it possible to decrease the electric sheet resistance of source/drain regions of MOSFETs in a peripheral circuitry without degradation of the data writing speed in nonvolatile memory cells. This device is comprised of nonvolatile memory cells and a peripheral circuitry provided on a same semiconductor substrate. The nonvolatile memory cells are formed by a first plurality of MOSFETs of a first conductivity type. The peripheral circuitry includes a second plurality of MOSFETs of the first conductivity type. Each of the first plurality of MOSFETs is equipped with a gate electrode having a floating age for data storing and source/drain regions having substantially no silicide films. Each of the second plurality of MOSFETs is equipped with source/drain regions having silicide films and a doping concentration lower than that of the source/drain regions of each of the first plurality of MOSFETs.

Abstract: A method of vapor phase epitaxy deposition of silicon on a silicon substrate on or in which exist areas containing dopants at high concentration, among which is boron, while avoiding a selfdoping of the epitaxial layer by boron, including the step of introducing a chlorinated gas, before the epitaxial deposition step, to etch the substrate across a thickness smaller than 100 nm.

Abstract: A method for producing a semiconductor substrate of the present invention, includes the steps: forming a first patterned mask containing a material having a growth suppressing effect on a lower substrate; growing a semiconductor crystal on the lower substrate via the first patterned mask to form a first semiconductor crystal layer; forming a second patterned mask containing a material having a growth suppressing effect on or above the lower substrate, the second patterned mask at least having a surface which is positioned at a level different from a level of a surface of the first patterned mask, with respect to a surface of the lower substrate; and growing a semiconductor crystal on or above the lower substrate via the second patterned mask to form a second semiconductor crystal layer.

Abstract: A semiconductor structure including a semiconductor substrate, at least one first crystalline epitaxial layer on the substrate, the first layer having a surface which is planarized, and at least one second crystalline epitaxial layer on the at least one first layer. In another embodiment of the invention there is provided a semiconductor structure including a silicon substrate, and a GeSi graded region grown on the silicon substrate, compressive strain being incorporated in the graded region to offset the tensile strain that is incorporated during thermal processing. In yet another embodiment of the invention there is provided a semiconductor structure including a semiconductor substrate, a first layer having a graded region grown on the substrate, compressive strain being incorporated in the graded region to offset the tensile strain that is incorporated during thermal processing, the first layer having a surface which is planarized, and a second layer provided on the first layer.

Abstract: A method of fabricating a gallium nitride or like epilayer on sapphire is disclosed wherein a buffer layer is grown on the sapphire substrate by magnetron sputter epitaxy (MSE); and then the gallium nitride epilayer is formed on the buffer layer, preferably by molecular beam epitaxy.

Abstract: A semiconductor photonic device contains a substrate: a ZnO buffer layer; and a compound semiconductor layer represented by InxGayAlzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, and 0≦z≦1), wherein the ZnO buffer has a thickness of about 3,500 Å or more and is aligned in a c-axis direction.

Abstract: A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of the size of the metalloprotein complex. The diameter of the metal atom aggregates used in the quantum device is 7 nm or smaller, and the pitch of the metalloprotein complex is preferably from 11 to 14 nm.

Abstract: A method of manufacturing a light emitting diode (LED) includes growing a light emitting region on a temporary substrate, bonding a metal-coated reflective permanent substrate and then removing the temporary substrate. The reflective metal layer also serves as a bonding agent for bonding the permanent substrate. The bonded LED element and permanent substrate are heated in a wafer bonding tool that includes a graphite lower chamber and a graphite upper cover with a stainless steel screw. Because of the different thermal expansion coefficients between stainless and graphite, the stainless steel screw applies a pressure to the bonded structure during the heating process to assist the bonding of the permanent substrate.

Abstract: According to the present invention, a process of the present invention is performed with stagnated process gas in a chamber. The process comprises the steps of supplying process gas into a chamber, blocking process gas entry and exit from the chamber so as to stagnate the supplied gas therein, and performing the process. As a result, a process time can be significantly reduced, thereby maximizing yield and reducing the substantial amount of the process gas.

Abstract: Substrate removal for post-manufacturing analysis of a semiconductor device is enhanced via a method and system that utilizes ion beam etching, to etch the backside of a semiconductor chip, and utilizes SIMS as a detection technique to not only control removal of the substrate from the backside of the chip but also to determine the endpoint of the removal process. In an example embodiment there is described a method for removing substrate from the backside of a semiconductor chip as a function of detected concentration levels of a selected substrate material that is sputtered off of a region of the substrate.

Abstract: A semiconductor Mach-Zehnder modulator comprises a pair of phase modulator arm waveguides and a single driver for a push-pull modulation. A first electrode connected to p-type cladding layer of first modulator arm is maintained at a negative potential V&pgr;, a second electrode connected to n-type cladding layer of first modulator arm and p-type cladding layer of second modulator arm is driven by a drive voltage, and a third electrode connected to n-type cladding layer of second modulator arm is maintained at a ground potential. The drive voltage changes between V&pgr;, and V&pgr;/2 for push-pull modulation of both modulator arms.

Abstract: A semiconductor wafer, after having been provided with a multiplicity of optoelectronic semiconductor structures, is severed into a number of individual chips by abrasive cutting. After cutting, the chip flanks are etched with the chip surface protected. First, a covering layer is deposited over the entire surface of the semiconductor wafer which is provided with the diode structures. The covering layer is structured in such a manner that the covering layer is removed at the areas defined as cutting tracks. Then the semiconductor wafer is cut into individual chips by abrasive cutting with a cutting tool. The cutting tool is guided along the cutting tracks by appropriately moving the semiconductor wafer and the cutting tool relative to one another.

Abstract: According to one aspect of the disclosure, the present invention provides methods and arrangements for testing a flip chip semiconductor device after the back side of the chip has been thinned to expose a selected region in the substrate. For some chips, thinning removes substrate material useful for drawing heat away from the internal circuitry when the circuitry is running at high speeds. To compensate for this material loss, as plurality of thermally conductive elements is formed in the backside of the semiconductor to draw heat from the backside of the device when the semiconductor device is activated.

Abstract: Post-manufacturing analysis of a semiconductor device is enhanced via a method and system that use a light emitting diode (LED) formed in a semiconductor die during its manufacture. According to an example embodiment of the present invention, a LED is formed within a semiconductor die having a circuit side opposite a back side. A conductor is formed that extends from the LED to the back side of the die, and is coupled to a terminal formed on the back side. The LED is activated via the terminal and used to align the die for analysis. By forming a LED within the semiconductor die during its manufacture, post manufacturing analysis is enhanced by the alignment capabilities provided by the readily activated LED.