Abstract: A circuit arrangement is disclosed for controlling the switching of a field effect transistor (FET). A current controlled amplifier may be configured to amplify a current in a current sense device to generate an amplified current, wherein the current in the current sense device indicates a current through the FET. A comparator may be coupled to the current sense amplifier to compare a voltage corresponding to the amplified current with a voltage reference and to generate a comparator output based on the comparison, wherein the comparator output controls whether the FET is on or off.

Abstract: A transmission driver includes a pulse generator and a current mode logic driver. The pulse generator is configured to generate and output a first pulse signal by synchronizing at a falling edge time point of a first input signal, and generate and output a second pulse signal by synchronizing at a falling edge time point of a second input signal. The current mode logic driver is configured to output a pre-emphasis signal to which pre-emphasis technique has been applied by changing a first load resistance value and a second load resistance value based on the first pulse signal and the second pulse signal, respectively.

Abstract: A driver circuit may be configured to control a power switch. The driver circuit may comprise an output pin configured to deliver signals to a gate of the power switch to control an ON/OFF state of the power switch, and a comparator configured to compare a gate-to-source voltage of the power switch to a first threshold when the power switch is ON and to compare the gate-to-source voltage of the power switch to a second threshold when the power switch is OFF.

Abstract: A method for validating operation of a driver integrated circuit includes providing a signal using an output node. The signal is provided using multiple set points in response to a change in state of an input signal. Each set point corresponds to a different phase of a multi-phase transition of the signal. The method includes providing a timer value at an end of a phase of the multi-phase transition and determining whether the signal is in a target signal range of the phase based on the timer value at the end of the phase, a predetermined value defining the target signal range of the phase, and a predetermined time limit for the phase. A current through the output node may be provided using the multiple set points, and a voltage on the output node may have the multi-phase transition.

Abstract: An apparatus for generating multi-signaling output voltage may include at least one output buffer, wherein the at least one the output buffer may include a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a Zener diode along with a switchable current source. The apparatus may further include first logic circuitry, second logic circuitry, first voltage down level shifter circuitry, second voltage down level shifter circuitry, and a first voltage up level shifter circuitry. Outputs of the first voltage down level shifter circuitry, the second voltage down level shifter circuitry, and the first voltage up level shifter circuitry are combined using the output buffer to generate the desired output. The second NMOS transistor acts as isolation transistor for reducing and/or preventing diode current between a first supply voltage and the third supply voltage.

Abstract: A level adjusting circuit includes a parallel resistor-capacitor (RC) sub-circuit, a first diode and an adjustable voltage supply. The RC sub-circuit includes an input capacitor and an input resistor, and includes an input node electrically connected to a driving signal source for receiving a driving signal therefrom, and an output node that outputs an adjusted driving signal. The first diode and the adjustable voltage supply are electrically connected, and are further electrically connected to the output node and a reference voltage node, respectively.

Abstract: A coiled electronic component includes: an electronic component body which includes a coil portion having a spiral structure and formed of an electrically conductive material, and electrically conductive connection portions arranged on both ends of the coil portion; and a pair of electrodes for respectively connecting the electrically conductive connection portions to assembly portions arranged on an assembly object. The electrode includes a pair of pinching pieces for pinching the electrically conductive connection portion, and the pair of pinching pieces is opened in a manner that the electrically conductive connection portion is received and fitted therebetween.

Abstract: The disclosure provides a charging device, which includes an input terminal configured to receive an input voltage; an output terminal configured to connect a target load so as to charge the target load; a control terminal, configured to receive a control voltage; a junction field-effect transistor and a control circuit. The junction field-effect transistor includes at least: a drain, electrically connected to the input terminal so as to receive the input voltage; a source, electrically connected to the output terminal so as to output an output voltage and an output current; and a gate, electrically connected to the control terminal. The control circuit is electrically connected to the control terminal, and configured to change the control voltage based on a change in a load voltage so as to change a pinch-off voltage of the JFET by controlling a bias voltage on the gate, thereby controlling the output current.

Abstract: According to one embodiment, a semiconductor device includes a first terminal, a second terminal, and a first circuit. The first circuit includes a first switch element having a first end coupled to a first node to which a first voltage is supplied, a second end coupled to the first terminal, and a gate coupled between the first node and the second terminal, and a second switch element coupled between the first node and the first terminal. The first circuit is configured to switch the first switch element from OFF state to ON state when supply of the first voltage is interrupted, and switch the second switch element from OFF state to ON state while maintaining the first switch element in ON state when a voltage of the first terminal changes to a second voltage.

Abstract: A gate-driving circuit includes a unidirectional module and two driving modules, and has a low-potential terminal, an output terminal, and two input terminals via which two driving signals are received. Each of the driving modules includes a capacitor and a resistor that are connected in parallel and between the output terminal and the respective one of input terminals, a power source that is connected between the output terminal and the low-potential terminal, and a diode that is connected between the output terminal and the power source. The unidirectional module is connected between the output terminal and one of the driving modules, and allows an electrical signal to pass only from the one of the driving modules to the output terminal.

Abstract: An active gate driver suitable for activating an electronic switch of an electric motor. The active gate driver includes a pull up branch, a pull down branch and a current and voltage feedback from an output of the active gate driver to at least one input of the active gate driver, wherein the current and voltage feedback is common to both the pull up branch and the pull down branch.

Abstract: A semiconductor integrated circuit of embodiments includes a first MOS transistor configured to control conduction and non-conduction between a reference voltage point and a node, a second MOS transistor connected to the first MOS transistor via the node and configured to apply a voltage equal to or lower than a withstand voltage of the first MOS transistor to the node, a third MOS transistor configured to receive supply of a second voltage higher than the first voltage, and output an output signal of a signal level corresponding to a voltage range of the second voltage, and a switch circuit configured to make a voltage of the node a fixed voltage when the first MOS transistor is in an OFF state.

Abstract: A USB interface detection module includes a detection unit and an adapting device. The adapting device is electrically connected between a first electronic device and a second electronic device. According to the interface specification of the first electronic device, the voltage value of a configuration channel pin is changeable through the use of the GND_DRAIN pin and the switching action of a field-effect transistor switch. Consequently, the interface specification of the first electronic device is acquired by the second electronic device.

Abstract: A method for driving an output node includes driving a control node of an output device coupled to the output node according to an input signal and using a fixed regulated voltage and a variable regulated voltage. The method includes generating the fixed regulated voltage based on a first power supply voltage, a second power supply voltage, and a first reference voltage. The method includes generating the variable regulated voltage based on the first power supply voltage, the second power supply voltage, and a second reference voltage. The method includes generating the second reference voltage based on the first power supply voltage, the second power supply voltage, a reference current, and a predetermined target voltage level of the control node of the output device. In an embodiment of the method, generating the second reference voltage includes periodically calibrating the second reference voltage.

Abstract: A header for an implantable medical device includes at least an antenna and a receptacle for receiving a signal transmission line. Either one or a combination of the antenna and the receptacle are encased in a dielectric material. The dielectric material can be one of or include one of a polymer, a ceramic material, polyoxymethylene, polysulfone, polybutylene terephthalate. A medical device and a method for assembling a medical device are also provided.

Abstract: A switch driving device includes a gate driver, a bootstrap circuit, a current limiting portion, and a current control portion. The gate driver drives an N-type semiconductor switch element. The bootstrap circuit includes a boot capacitor and a boot diode and applies a voltage to the gate driver. The current limiting portion limits a current to be supplied to the boot capacitor. The current control portion controls operations of the current limiting portion. The current limiting portion is provided on a path that electrically connects the boot capacitor and the boot diode to each other.

Abstract: A switching element drive device that reduces a switching loss while suppressing noise with an inexpensive configuration, is provided. The switching element drive device includes a current sensor configured to measure a load current flowing through a load, a voltage sensor configured to measure an input voltage inputted from a power supply, and a control part configured to output a command value of a gate drive voltage to a gate drive voltage supply part, the gate drive voltage supply part being configured to supply the gate drive voltage for driving a switching element disposed between the power supply and the load, wherein the control part is further configured to determine the command value of the gate drive voltage based on the load current and the input voltage.

Abstract: An acoustic wave device includes a piezoelectric substrate, functional elements, an outer peripheral support layer, a cover portion, and a protective layer covering the cover portion. A hollow space is defined by the piezoelectric substrate, the outer peripheral support layer, and the cover portion, and the functional elements are disposed in the hollow space. The acoustic wave device further includes an under bump metal layer, a wiring pattern, and a through-electrode that connects these elements. In the protective layer, a through-hole to be filled with a conductor to electrically connect a solder ball and the under bump metal layer is provided. The outer peripheral support layer includes a protruding portion protruding to the hollow space. When the acoustic wave device is seen in plan view, at least a portion of the through-hole overlaps the hollow space, and an end portion of the protruding portion overlaps an inner region of the through-hole.

Abstract: A power transistor module includes a power transistor device and a control circuit. The control circuit is electrically connected to the power transistor device for providing at least one gate voltage to drive the power transistor device, and adjusting the at least one gate voltage in response to an output power of the power transistor module. When the output power is greater than a predetermined power load, the at least one gate voltage has a first swing amplitude; and when the output power is less than or equal to the predetermined power load the at least one gate voltage has a second swing amplitude less than the first swing amplitude.

Abstract: According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.