Patents Examined by Kevin Ellis
  • Patent number: 8407411
    Abstract: Techniques pertaining to adjusting the operation frequency of a DRAM are disclosed. According to one embodiment, the DRAM operation frequency adjusting system includes a statistic module counting effective operations of a DRAM to obtain a bandwidth utilization rate of the DRAM at a present operation frequency; a parameter configuration module including a target frequency configuration sub-module configured to generate a target operation frequency; and a frequency switch controller for switching a present operation frequency of the DRAM to the target operation frequency. The invention adjusts the operation frequency of a DRAM according to the application environment, and creates a balance between performance and power consumption of DRAMs, and thus improves operation speed of system-on-chips as well as decreases the power consumption.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: March 26, 2013
    Assignee: Wuxi Vimicro Corporation
    Inventor: Chuan Lin
  • Patent number: 8316214
    Abstract: A moving window history of at least one previous data address accessed by a processor is maintained, the at least one previous data address in the history each being associated with an index. A difference between a current data address and one of the at least one previous data address in the history is determined. The difference and the index associated with the one of the at least one previous data address in the history are provided as a representation of the current address.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: November 20, 2012
    Assignee: MediaTek Inc.
    Inventors: Li Lee, Ramesh Jandhyala, Srikanth Kannan
  • Patent number: 8312231
    Abstract: A computer system and method for caching configuration information for use in mounting and/or unmounting snapshot LUNs of a network-based storage system are disclosed. During a first request to mount a snapshot LUN, a discovery operation is performed at a host system to discover various configuration information used in mounting and unmounting various LUNs of a storage system to a host system. The configuration information is used to process the first request and then the configuration information is cached. During a subsequent request to mount a second snapshot LUN, the cached configuration information can be used to mount the second snapshot LUN, thereby avoiding a second discovery operation.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: November 13, 2012
    Assignee: NetApp, Inc.
    Inventors: Song Li, Boris Teterin
  • Patent number: 8312248
    Abstract: Integrated circuit systems include a non-volatile memory device (e.g, flash EEPROM device) and a memory processing circuit. The memory processing circuit is electrically coupled to the non-volatile memory device. The memory processing circuit is configured to reallocate addressable space within the non-volatile memory device. This reallocation is performed by increasing a number of physical addresses within the non-volatile memory device that are reserved as redundant memory addresses, in response to a capacity adjust command received by the memory processing circuit.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: November 13, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Been Im, Hye-Young Kim, Young-Joon Choi, Dong-Gi Lee, Shea-Yun Lee
  • Patent number: 8307183
    Abstract: A recording and/or reproducing method, a recording and/or reproducing apparatus, and an information storage medium are provided. The method of recording data to an information storage medium includes: according to a change in a method of using the information storage medium, rearranging the order of a first information structure with a variable size and a second information structure with a fixed size, both of which are included in management information of the information storage medium, so that the first information structure with the variable size can be positioned following the second information structure with the fixed size; and recording the rearranged management information on the information storage medium. According to the method and apparatus, recording management information can be found in a fixed location of a finalized information storage medium, thereby allowing the recording management information to be found easily and quickly.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: November 6, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-hee Hwang, Joon-hwan Kwon
  • Patent number: 8301841
    Abstract: A method for caching terminology data, including steps of: receiving a terminology request; determining that the terminology request is related to at least one uncached terminology concept; retrieving a complete concept set of the terminology concept as a cache unit, wherein the complete concept set includes the terminology concept, all other terminology concepts which are directly correlated or indirectly correlated through a non-transitive relationship to the terminology concept, properties of each terminology concept, and the non-transitive relationship between each terminology concept; retrieving transitive relationship information for the complete concept set, the transitive relationship information at least including identifiers of terminology concepts which are correlated through the transitive relationship to each terminology concept in the complete concept set; and caching the cache unit and the transitive relationship information of the cache unit. A corresponding device caches terminology data.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Xue Qiao Hou, Gang Hu, Bo Li, Jing Li, Haifeng Liu, Sheng Ping Liu
  • Patent number: 8301863
    Abstract: A recursive logical partition real memory map mechanism is provided for use in address translation. The mechanism, which is provided in a data processing system, receives a first address based on an address submitted from a process of a currently active logical partition. The first address is translated into a second address using a recursive logical partition real memory (RLPRM) map data structure for the currently active logical partition. The memory is accessed using the second address. The RLPRM map data structure provides a plurality of translation table pointers, each translation table pointer pointing to a separate page table for a separate level of virtualization in the data processing system with the data processing system supporting multiple levels of virtualization.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: William E. Hall, Guerney D. H. Hunt, Paul A. Karger, Mark F. Mergen, David R. Safford
  • Patent number: 8301860
    Abstract: Mechanisms are provided for detecting changes in virtual storage device configurations. The mechanisms detect an event corresponding to a change in configuration of a virtual storage device. The virtual storage device is comprised of a plurality of portions of a plurality of physical storage devices. The mechanisms further, in response to detecting the event, determine if the change in configuration of the virtual storage device results in a change in the types of physical storage devices that are part of the virtual storage device. Moreover, the mechanisms further transmit a notification, in response to a determination that the change in configuration of the virtual storage device results in a change in the types of physical storage devices that are part of the virtual storage device, of the results of the change in configuration of the virtual storage device to one or more registered recipients registered to receive such notifications.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Michael P. Cyr, James A. Pafumi, Jacob J. Rosales, Morgan J. Rosas
  • Patent number: 8301853
    Abstract: A method and computer program product for a multicast data mirroring method including defining a multicast group within a local area network. The multicast group includes a first synchronous storage target and one or more asynchronous storage targets. The synchronous storage target is a member of a synchronously-mirrored storage group including at least a second synchronous storage target and a storage initiator device. A write request for storing a data segment within the synchronously-mirrored storage group is received on the storage initiator device. The data segment is written to the first synchronous storage target and the second synchronous storage target. The data segment is multicast to the asynchronous storage targets included within the multicast group.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: October 30, 2012
    Assignee: EMC Corporation
    Inventors: Kiran Madnani, Roy E. Clark, Randall H. Shain
  • Patent number: 8301857
    Abstract: Multiple application threads write to the same file in parallel. The file is written to on a file cluster-by-file cluster basis. For each file cluster of a number of file clusters of the file, a block of a memory cluster is allocated to an application thread, where the memory cluster corresponds to the file cluster, and the block is written to by the application thread until the block is finished, until all the blocks of the memory cluster are finished. A block may be finished where the application thread has completely written to the block, or the application thread has no further data to write to the block. Thereafter, the memory cluster is registered within a queue, from which it is read by a file writer thread, which writes the memory cluster to the file cluster. Each application thread that is to write to the file performs this process.
    Type: Grant
    Filed: October 1, 2005
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventor: Takeshi Ogasawara
  • Patent number: 8296514
    Abstract: Systems and methods for managing storage virtualization in a storage infrastructure are provided. The method comprises examining storage virtualization configurations across a data storage infrastructure having one or more data storage resources, such that configuration data associated with the storage virtualization configurations applied to the one or more data storage resources is stored in a configuration repository; analyzing the configuration data to detect storage virtualization policy inconsistencies across the data storage infrastructure; reporting potential problems associated with applying the storage virtualization configurations to said one or more data storage resources; and automatically implementing recommendations for corrective action to improve storage virtualization, in response to detecting the virtualization policy inconsistencies.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: David Gregory Van Hise, Gregory John Tevis
  • Patent number: 8296540
    Abstract: A method and apparatus for adjusting the performance of a memory system is provided. A memory system comprises a master device and a slave device. A memory channel couples the master device to the slave device such that the slave device receives the system operating information from the master device via the memory channel. The slave device further includes tuning circuitry within the slave device such that the performance of the memory system is improved.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: October 23, 2012
    Assignee: Rambus Inc.
    Inventors: Bruno Werner Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark, Stefanos Sidiropoulos, Richard M. Barth, Paul G. Davis, Ely K. Tsern
  • Patent number: 8296547
    Abstract: An enhanced mechanism for loading entries into a translation lookaside buffer (TLB) in hardware via indirect TLB entries. In one embodiment, if no direct TLB entry associated with the given virtual address is found in the TLB, the TLB is checked for an indirect TLB entry associated with the given virtual address. Each indirect TLB entry provides the real address of a page table associated with a specified range of virtual addresses and comprises an array of page table entries. If an indirect TLB entry associated with the given virtual address is found in the TLB, a computed address is generated by combining a real address field from the indirect TLB entry and bits from the given virtual address, a page table entry (PTE) is obtained by reading a word from a memory at the computed address, and the PTE is loaded into the TLB as a direct TLB entry.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Timothy H. Heil, Benjamin Herrenschmidt, Jon K. Kriegel, Paul Mackerras, Andrew H. Wottreng
  • Patent number: 8296496
    Abstract: One embodiment is main memory that includes a combination of non-volatile memory (NVM) and dynamic random access memory (DRAM). An operating system migrates data between the NVM and the DRAM.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: October 23, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Clifford Mogul, Eduardo Argollo de Oliveira Dias, Jr., Paolo Faraboschi, Mehul A. Shah
  • Patent number: 8296532
    Abstract: A data storage system including at least one storage controller having a first color policy and operative to store data onto a first data storage unit at a primary site as part of a current color of the primary site, at least one storage controller having a second color policy and operative to store data onto a second data storage unit at the primary site as part of the current color, and a color control node operative to provide each of the controllers with new color information while maintaining the integrity of dependent writes across color boundaries.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Shira Ben-Dor, Harry Butterworth, Amir Kredi, Orit Nissan-Messing, Adam Wolman, Aviad Zlotnick
  • Patent number: 8291164
    Abstract: An adapter apparatus has a function of determining the type of a memory card, by communicating with the memory card at plural communication speeds and determining whether or not there is a response therefrom. A communication speed setting unit has a function of setting plural communication speeds for communication with the memory card, and a response determining unit determines whether or not there is a response to a type determination signal. A type determining unit determines the type of the memory card based on the communication speed set by the communication speed setting unit and whether or not there is a response to the type determination signal sent at the communication speed.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: October 16, 2012
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Toru Akazawa, Akira Sonoda, Nobutaka Toyoshima, Tetsufumi Nozawa
  • Patent number: 8291181
    Abstract: The present disclosure includes methods and devices for operating a solid state drive. One method embodiment includes mirroring programming operations such that data associated with a programming operation is programmed to two or more locations in memory of the solid state drive. The method also includes ceasing to mirror programming operations upon an occurrence of a particular event.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: October 16, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Troy A. Manning
  • Patent number: 8291180
    Abstract: Computer implemented methods, computer program products and computer systems synchronize copies of a virtual disk. A record of blocks that are modified during an access session of a copy of the virtual disk is maintained. For each partition of the virtual disk, a file system level indication of currently relevant blocks is obtained. Only those blocks that were modified during the access session and are currently relevant are copied to at least one additional copy of the virtual disk.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: October 16, 2012
    Assignee: VMware, Inc.
    Inventors: Maxime Austruy, Jad Chamcham, Christian Leroy, Christian Czezatke, Asit Desai
  • Patent number: 8291191
    Abstract: A system and method includes steps or acts of: organizing table partitions in logical order; presenting the partition table numbers and their current ending values in logical order to a user; receiving an alter command from the user, the alter command specifying at least one logical partition number and its corresponding ending value; internally matching the specified logical partition number to its corresponding physical partition number; altering the physical partitioning of the table by manipulating one or more current ending values of partitions by altering the current ending value of the physical partition to which the specified logical partition is associated, such that new ending values are generated; and automatically generating at least one data definition language statement corresponding to the alter command, using the new ending value.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: October 16, 2012
    Assignee: Computer Associates Think, Inc.
    Inventors: Wayne Joseph Barbarek, James Lawrence Broadhurst
  • Patent number: 8286031
    Abstract: The disk controller has a plurality of channel control units, a plurality of cache memories, a plurality of disk control units, and a plurality of internal switch units. Each channel control unit or disk control unit sends to one of the cache memory units a request packet requesting execution of processing. The cache memory unit sends a response packet in response to the received request packet. Each internal switch unit monitors the request packet sent from the channel control unit or disk control unit, and judges whether or not the response packet to the request packet has passed through the internal switch unit within a first given time period since the passage of the request packet. In the case where the response packet has not passed through the internal switch unit within the first given time period, the internal switch unit sends a failure notification.
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: October 9, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya