Abstract: Systems, methods and computer program products for data buffers partitioned from a cache array. An exemplary embodiment includes a method in a processor and for providing data buffers partitioned from a cache array, the method including clearing cache directories associated with the processor to an initial state, obtaining a selected directory state from a control register preloaded by the service processor, in response to the control register including the desired cache state, sending load commands with an address and data, loading cache lines and cache line directory entries into the cache and storing the specified data in the corresponding cache line.

Abstract: A data processing system includes one or more nodes, each node including a memory sub-system. The sub-system includes a fine-grained, memory, and a less-fine-grained (e.g., page-based) memory. The fine-grained memory optionally serves as a cache and/or as a write buffer for the page-based memory. Software executing on the system uses a node address space which enables access to the page-based memories of all nodes. Each node optionally provides ACID memory properties for at least a portion of the space. In at least a portion of the space, memory elements are mapped to locations in the page-based memory. In various embodiments, some of the elements are compressed, the compressed elements are packed into pages, the pages are written into available locations in the page-based memory, and a map maintains an association between the some of the elements and the locations.

Abstract: A composite memory device, a data processing method and a data processing program can efficiently and selectively use a nonvolatile solid-state memory and a recording medium. The composite medium device includes a nonvolatile solid-state memory and a recording medium and is adapted to combine the data area of the recording medium and the data area of the nonvolatile solid-state memory and manage them as totally or partly integrated data area by means of a predetermined file system. The composite memory device is connected to a host appliance by way of an interface section.

Abstract: This invention, in the interface coupled to the server, the disk interface coupled to the second memory to store final data, the cache to store data temporarily, and in the storage system with the MP which controls them, specifies the area by referring to the stored data, and makes the virtual memory area resident in the cache by using the storage system where the specified area is made resident in the cache.

Abstract: To update a firmware without stopping an operation of a disk array apparatus. The disk array apparatus includes a plurality of disk devices providing redundancy, a disk array control device, and a disk controller for controlling the disk devices individually in response to a command issued from the disk array control device. The disk array control device designates a disk device to be updated based on contents of the firmware update command for the disk device, controls firmware update for the designated disk device, disconnects the designated disk device from the host computer temporarily, sets the disk device as being in a temporary degenerate state, and, when a data write or read command is issued from a host computer for the disk device being in the temporary degenerate state, designating a different disk device to execute the command issued from the host computer by using redundancy of the disk devices.

Abstract: When a data word is designated through a network search engine, a FIFO unit, and the like, a relay apparatus according to the invention searches for an associative memory address corresponding to the data word. Even when the associative memory address is internally converted to a contents memory address, the relay apparatus stores the contents memory address by causing it to correspond to a search result corresponding to the contents memory address as well as outputs the associative memory address together with the search result.

Abstract: A subset of software objects stored in a first segment of non-volatile memory are identified as requiring frequent write operations or otherwise associated with a high endurance requirement. The subset of software objects are move to a second segment of non-volatile memory with a high endurance capacity, due to the application of wear leveling techniques to the second segment of non-volatile memory. The first and second segments of memory can be located in the same memory device or different memory devices.

Abstract: The present disclosure includes methods and devices for memory block selection. In one or more embodiments, a memory controller includes control circuitry coupled to one or more memory devices having multiple Groups of planes associated therewith, each Group including at least two planes of physical blocks organized into Super Blocks, with each Super Block including a physical block from each of the at least two planes. The control circuitry is configured to receive a first unassigned logical block address (LBA) associated with a write operation and determine a particular free Super Block within a selected one of the multiple Groups to receive data associated with the write operation.

Abstract: Systems and methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.

Abstract: A method and apparatus for performing a hold operation while keeping the data in place as the data is in a hold state. Such a method and apparatus substantially eliminates the need for a copy operation and thus provides advantages cost and management savings. The method and apparatus define a hold delete operation along with hold life points in a CAS system.

Abstract: One embodiment of the invention sets forth a mechanism for using the L2 cache as a buffer for data associated with read/write commands that are processed by the frame buffer logic. A tag look-up unit tracks the availability of each cache line in the L2 cache, reserves necessary cache lines for the read/write operations and transmits read commands to the frame buffer logic for processing. A data slice scheduler transmits a dirty data notification to the frame buffer logic when data associated with a write command is stored in an SRAM bank. The data slice scheduler schedules accesses to the SRAM banks and gives priority to accesses requested by the frame buffer logic to store or retrieve data associated with read/write commands. This feature allows cache lines reserved for read/write commands that are processed by the frame buffer logic to be made available at the earliest clock cycle.

Abstract: A flash memory storage system and a data writing method thereof are provided. The flash memory storage system includes a controller, a connector, a cache memory, a SLC NAND flash memory and a MLC NAND flash memory. When the controller receives data to be written into the MLC NAND flash memory from a host system, the data is temporarily stored in the cache memory first and then is written into the MLC NAND flash memory from the cache memory. And, the controller may backup the data stored in the cache memory to the SLC NAND flash memory. Accordingly, it is possible to reduce a response time for a flush command, thereby improving a performance of the flash memory storage system.

Abstract: The invention discloses a data storage system and a control method thereof. The data storage system according to the invention includes N groups of storage devices, where N is an integer larger than 1. The invention is to judge if the use information of one of the batches of data satisfies the set of condition thresholds relative to the group of storage devices where said one batch of data is stored, and if NO, to re-allocate said one batch of data to one of the group of storage devices whose condition thresholds are satisfied by the use information of said one batch of data and to update the virtual drive locations of said one batch of data mapping the logical locations of the storage devices.

Abstract: The present invention is directed to a method for providing Quality Of Service (QoS)-based storage tiering and migration in a storage system. The method allows for configurable application data latency thresholds to be set on a per user basis and/or a per application basis so that a storage tiering mechanism and/or a storage migrating mechanism may be triggered for moving application data to a different class of storage.

Abstract: In an access control method for a memory including a first memory block and a second memory block, first flag is read from the first memory block, and second flag is read from the second memory block. A comparison between the first flag and the second flag is done, and then, the comparison result is outputted as a first calculation value. One of the first memory block and the second memory block is selected in response to the first calculation value to decide a valid memory block. In the access control method for the memory executed in the above-mentioned manner, even when the first flag and the second flag employed in order to determine the valid memory block are brought into any statuses, the valid memory block does not become indefinite, and a single memory block can be determined as the valid memory block.

Abstract: A data backup system includes an administration device built in an image forming apparatus for administering a state of usage of the image forming apparatus every administrative unit of a previously registered user and/or organization, and a backup device for acquiring registration data of the administrative unit and the data of the activities as backup data.

Abstract: A device may include a group of requestors issuing requests, a memory that includes a set of memory banks, and a control block. The control block may receive a request from one of the requestors, where the request includes a first address. The control block may perform a logic operation on a high order bit and a low order bit of the first address to form a second address, identify one of the memory banks based on the second address, and send the request to the identified memory bank.

Abstract: A method, system, and computer program product for cost based analysis for data access in a database management system. In one approach, the method, system, and computer program product identifies data to access. A first cost for direct I/O storage access and a second cost for cache access are then determined for accessing the data. A comparison between the first cost and the second cost is then performed. Finally, a first portion of identified data is accessed based at least in part upon the comparison.

Abstract: A request is received from a client machine via a web interface for content presented on a web page. A globally unique identifier (GUID) that is associated with the user is accessed and a number is generated based on the GUID. The generated number is utilized as an index to locate the storage device from the number of storage devices. Here, the storage device stores a user profile associated with the user. The user profile is read from the located storage device and the web page is personalized based on this user profile. The personalized web page is then communicated to the client machine. Other techniques for locating a storage device are also described.

Abstract: Methods and apparatus for control of On-Die System Fabric (OSF) blocks are described. In one embodiment, a shadow address corresponding to a physical address may be stored in response to a user-level request and a logic circuitry (e.g., present in an OSF) may determine the physical address from the shadow address. Other embodiments are also disclosed.