Abstract: An amplifier includes an amplification circuit, an equalization circuit, an output circuit, a first gain adjusting circuit, and a second gain adjusting circuit. The amplification circuit changes voltage levels of first and second amplification nodes based on first and second input signals. The equalization circuit changes the voltage levels of the first and second amplification nodes. The output circuit generates an output signal based on the voltage levels of the first and second amplification nodes. The first gain adjusting circuit changes voltage levels applied to the first and second amplification nodes based on the voltage levels of the first and second amplification nodes and a first gain control signal. The second gain adjusting circuit changes a voltage level of the output signal based on a second gain control signal.

Abstract: Apparatus and methods for a modified Doherty amplifier operating at gigahertz frequencies are described. The combining of signals from a main amplifier and a peaking amplifier occur prior to impedance matching of the amplifier's output to a load. An integrated distributed inductor may be used in an impedance inverter to combine the signals. A size of the impedance element can be selected by patterning during manufacture to tune the amplifier and to allow power scaling for the amplifier.

Abstract: A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor.

Abstract: A calibration apparatus is used for calibrating characteristics of a power amplifier (PA) in a transmitter. The calibration apparatus includes an adaptive bias generator circuit that is used to track an envelope of an input signal received by control terminals of transistors of the PA and generate an adaptive bias voltage to the control terminals of the input transistors in response to the envelope of the input signal.

Abstract: Chopper amplifiers with multiple sensing points for correcting input offset are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected in a cascade along a signal path. The chopper amplifier further incudes a multi-point sensed offset correction circuit that generates an input offset compensation signal based on sensing a signal level of the signal path at multiple signal points. Furthermore, the multi-point sensed offset correction circuit injects the input offset compensation signal into the signal path to thereby compensate for input offset voltage of the amplification circuit while suppressing output chopping ripple from arising.

Abstract: A power amplifier circuitry (100) comprises: a transistor stack (110) comprising at least two stacked transistor units (112A, 112B, 112C) for amplifying input signals; wherein each stacked transistor unit (112A, 112B, 112C) comprises a plurality of controllable segments (120-1 to 120-N, 130-1 to 130-N, 140-1 to 140-N), each comprising a segment transistor (122, 132, 142), wherein source terminals (123, 133, 143) within each transistor unit are connected, drain terminals (125, 135, 145) within each transistor unit are connected and gate terminals (124, 134, 144) within each transistor unit are connected, wherein each segment transistor (122, 132, 142) further comprises a back gate terminal (126, 136, 146) for setting a body bias, wherein at least two of the segment transistors (122, 132, 142) within each transistor unit have independently connected back gate terminals (126, 136, 146); and a control unit (190) configured to control the body bias for selecting an amplifier class of each of the controllable segme

Abstract: A multiple-path (e.g., Doherty) amplifier includes a semiconductor die, a radio frequency (RF) signal input terminal, a combining node structure integrally formed with the semiconductor die, first and second amplifiers (e.g., main and peaking amplifiers, or vice versa) integrally formed with the semiconductor die, and a shunt circuit electrically connected between an output of the first amplifier and a ground reference node. Inputs of the first and second amplifier are electrically coupled to the RF signal input terminal, and outputs of the first and second amplifier are electrically coupled to the combining node structure. The shunt circuit includes a shunt inductance and a shunt capacitance coupled in series between the output of the first amplifier and the ground reference node, and the shunt capacitance has a first terminal coupled to the shunt inductance, and a second terminal coupled to the ground reference node.

Abstract: A current sense loop includes an attenuator circuit, which has an embedded input chopper circuit, and an amplifier circuit, which has an output chopper circuit. The embedded input chopper has a first chopper input that is coupled to a first attenuator input, a first chopper output that is coupled to a first attenuator output, a second chopper input that is coupled to a second attenuator input, and a second chopper output that is coupled to a second attenuator output. An amplifier has a first input coupled to the first attenuator output and a second input coupled to the second attenuator output. An NFET has a gate coupled to the amplifier output, a source coupled to a ground plane, and a drain coupled to the second attenuator input.

Abstract: A programmable transimpedance amplifier (TIA) includes a plurality of signal paths between an output of a common emitter amplifier and the output of the TIA. The TIA is programmed by selecting one of the signal paths, because the paths have different parameters (e.g. different bandwidth). Thus, the bandwidth or other parameter can be programmed by selecting the appropriate path. The common emitter amplifier's output is coupled to the inputs of common base amplifiers in each path. The inputs have low impedance. Also, each path has a separate buffer amplifying the common base amplifier output in the path. Therefore, having multiple paths does not significantly degrade the amplifier performance. High bandwidth can be provided.

Abstract: Methods and systems for power amplification with digital quantized power supply with multiple amplifiers are disclosed herein. In one embodiment, In one embodiment, a time-varying envelope signal is sampled, quantized and decomposed into several constituent signals that are individually amplified, and then combined to form a desired amplified version of the quantized time-varying envelope. Amplitude, phase and/or frequency characteristics of one or more of the signals and supply voltages Vdd and source current of one or more amplifiers are digital controlled based on the information provided by quantization process and slow and fast power control information. Amplitude, phase and/or frequency characteristics of one or more of the constituent signals to be amplified are controlled to provide the desired amplitude, phase, frequency, and/or spectral characteristics of the desired quantized version of the time-varying envelope signal.

Abstract: In an asymmetric Doherty amplifier circuit, one or more shunt reactive components are added to at least one side of an impedance inverter connecting the amplifier outputs, to reduce a capacitance imbalance between the two amplifiers caused by their different parasitic capacitances. This enables the (adjusted) parasitic capacitances to be incorporated into a quarter-wavelength transmission line, having a 90-degree phase shift, for the impedance inverter. In one embodiment, a shunt inductance is connected between the impedance inverter, on the side of the larger amplifier, and RF signal ground. The inductance is sized to resonate away substantially the excess parasitic capacitance of the larger amplifier. In another embodiment, a shunt capacitor is connected on the side of the smaller amplifier, thus raising its total capacitance to substantially equal the parasitic capacitance of the larger amplifier.

Abstract: An amplifier circuit with in-band gain degradation compensation is shown. The amplifier circuit has an input-stage amplifier, at least one intermediate-stage amplifier, and an output-stage amplifier cascaded between an input port and an output port of the amplifier circuit. A compensation capacitor is coupled between the output port of the amplifier circuit and an output port of the input-stage amplifier. A high-order damping circuit is coupled to an output port of the intermediate-stage amplifier.

Abstract: Embodiments of a temperature compensation circuit and a temperature compensated amplifier circuit are disclosed. In an embodiment, a temperature compensation circuit includes a bias reference circuit having serially connected transistor devices and a driver transistor device connected to the bias reference circuit. At least one of the serially connected transistor devices includes a resistor connected between two terminals of the at least one of the serially connected transistor devices. The driver transistor device is configured to generate a drive current based on a resistance value of the resistor.

Abstract: Disclosed is an operation amplification circuit and an over-current protection method therefor. The operation amplification circuit comprises: a control unit, configured to generate an output control signal according to an input signal and an output signal; an output unit, configured to generate an output current under control of the output control signal, wherein the output unit comprises an output capacitor which is charged or discharged by the output current to generate the output signal; an over-current protection unit, obtaining a temperature control current according to an operating temperature of the operation amplification circuit, wherein when the operating temperature is greater than or equal to a predetermined temperature, the temperature control current is positively correlated with the operating temperature, and the over-current protection unit adjusts the output control signal according to the temperature control current to limit the output current.

Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a bias controller for an amplifier circuit involves obtaining temperature data corresponding to a temperature of the amplifier circuit, generating a proportional to absolute temperature (PTAT) bias voltage based on a first PTAT slope when the temperature is within a first range of temperatures or a second PTAT slope when the temperature is within a second range of temperatures, wherein the second PTAT slope is greater than the first PTAT slope, and biasing the amplifier circuit based on the generated PTAT bias voltage.

Abstract: Low-noise optical differential receivers are described. Such differential receivers may include a differential amplifier having first and second inputs and first and second outputs, and four photodetectors. A first and a second of such photodetectors are coupled to the first input of the differential amplifier, and a third and a fourth of such photodetectors are coupled to the second input of the differential amplifier. The anode of the first photodetector and the cathode of the second photodetector are coupled to the first input of the differential amplifier. The cathode of the third photodetector and the anode of the fourth photodetector are coupled to the second input of the differential amplifier. The optical receiver may involve two stages of signal subtraction, which may significantly increase noise immunity.

Abstract: A power amplifier including a first transistor for amplifying and outputting a radio frequency signal, a second transistor, a third transistor for supplying a bias current, a first voltage supply circuit for supplying a lower voltage to a base of the third transistor as a temperature of a first diode is higher. The third transistor and the first transistor, or the third transistor and the second transistor, are disposed without another electronic element interposed therebetween. The third transistor is disposed such that a distance between the third transistor and the first transistor is smaller than a distance between the first voltage supply circuit and the first transistor, or a distance between the third transistor and the second transistor is smaller than a distance between the first voltage supply circuit and the second transistor.

Abstract: Techniques are described for using valley detection for supply voltage modulation in power amplifier circuits. Embodiments operate in context of a power amplifier circuit configured to be driven by a supply voltage generated by a supply modulator and to receive an amplitude-modulated (AM) signal at its input. The output of the power amplifier circuit can be fed to a valley detector that can detect a valley level corresponding to the bottom of the envelope of the AM signal. The detected valley level can be fed back to the supply modulator and compared to a constant reference. In response to the comparison, the supply modulator can vary the supply voltage to the power amplifier circuit in a manner that effectively tracking the envelope of the power amplifier circuit's output signal, thereby effectively seeking a flat valley for the output signal's envelope.

Abstract: A radio frequency (RF) power amplifier (PA) for amplifying an RF signal between a source node and an output node, the RF PA including a silicon substrate with a complementary metal oxide semiconductor (CMOS) N-type transistor with a source region and a drain region fabricated therein. The source region includes the source node of the RF PA and the drain region includes the output node of the RF PA. The RF PA includes a planar resistor fabricated on the surface of the silicon substrate proximal to the drain region of the N-type transistor, wherein the resistor provides a thermal source for heating the RF PA; and a control circuit providing thermal heating to the RF PA by providing power to the planar resistor during RF signal bursts wherein the added thermal heating compensates transient heating within the transistor and results in a linear power amplification operation.

Abstract: An amplifier includes an amplifying device and a bias circuit for providing a bias voltage for the amplifying device. The bias circuit is configured to provide the bias voltage in dependence of an output signal of an optical coupling arrangement which provides for electrical isolation.