Patents Examined by Khanh V. Nguyen
  • Patent number: 11368131
    Abstract: A power amplifier circuit amplifies a radio-frequency signal in a transmit frequency band. The power amplifier circuit includes an amplifier, a bias circuit, and an impedance circuit. The amplifier amplifies power of a radio-frequency signal and outputs an amplified signal. The impedance circuit is connected between a signal input terminal of the amplifier and a bias-current output terminal of the bias circuit and has frequency characteristics in which attenuation is obtained in the transmit frequency band. The impedance circuit includes first and second impedance circuits. The first impedance circuit is connected to the signal input terminal. The second impedance circuit is connected between the first impedance circuit and the bias-current output terminal.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: June 21, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takayuki Tsutsui, Satoshi Tanaka, Yasuhisa Yamamoto
  • Patent number: 11368128
    Abstract: A capacitance sensor circuit is provided, including: a capacitance variable capacitor changing from a first capacitance to a second capacitance corresponding to environmental change; a reference capacitor; and an amplifier circuit charging the capacitance variable capacitor via a first node and the reference capacitor via a second node, and outputting a determination signal. In the amplifier circuit, a differential amplification part generates a potential difference signal obtained by amplifying the potential difference between the first and the second nodes; an output part outputs the determination signal based on the potential difference signal; and when the difference between the increase degrees of the potentials of the first and the second nodes is less than a predetermined value, the output part holds and outputs the determination signal immediately before that state and a bias control part stops a current flowing through the differential amplification part.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: June 21, 2022
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Masayuki Otsuka
  • Patent number: 11368129
    Abstract: Linearity is improved in an amplifier circuit without lowering gain. The amplifier circuit includes a transistor, a load, an impedance element, and a variable current source. The transistor amplifies an input signal. The load is connected between the transistor and a power supply. The impedance element is connected between the transistor and a ground terminal, and passes a direct current. The variable current source is connected to a connection part between the transistor and the impedance element, and supplies a current in accordance with a voltage of the connection part.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: June 21, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yoshikatsu Jingu
  • Patent number: 11362628
    Abstract: An input stage for an LVDS receiver circuit is provided, which includes at least one supply voltage connection as well as a first and a second stage input to be acted upon by a differential input signal pair. The input stage further includes a first and a second differential stage, the stage inputs being directly connected to one input each of the first differential stage and indirectly, via one level-shifting circuit each, to one input each of the second differential stage. According to the present invention, the first and the second differential stage are connected to the supply voltage connection via one transistor each of a third differential stage, the control input of one of these transistors being connected to a measuring path connecting the stage inputs to one another, with the control input of the other transistor being connected to an apparatus/device (arrangement) for providing a reference voltage.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: June 14, 2022
    Assignee: Robert Bosch GmbH
    Inventor: Andreas Schubert
  • Patent number: 11362629
    Abstract: A transimpedance amplifier (TIA) circuit disclosed includes an input terminal, a first TIA circuit, a second TIA circuit, a field effect transistor (FET), and a gain control circuit. The first TIA circuit outputs a voltage signal from a first output in accordance with an input current received at a first input electrically connected to the input terminal. The second TIA circuit outputs a reference signal from a second output. The FET varies a resistance between a first current terminal and a second current terminal in accordance with a control signal applied to a control terminal. The first current terminal is electrically connected to the input terminal. The second current terminal is electrically connected to the second output of the second TIA circuit. The gain control circuit detects an amplitude of the voltage signal and generates the control signal according to a detection result of the amplitude.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: June 14, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki Itabashi, Keiji Tanaka
  • Patent number: 11355332
    Abstract: The use of a capacitor (22) to serve as the principal impedance in a negative feed-back loop in a voltage amplifier component (21) of a trans-impedance amplifier and actively controlling the amount of charge accumulated within the capacitor appropriately to improve the responsiveness and/or dynamic range of the amplifier. A switch (25) is electrically coupled to the inverting input terminal of the voltage amplifier and electrically isolated from the output terminal (23) of the voltage amplifier. The output voltage of the amplifier is proportional to the accumulation of charge, and the switch is operable to ‘reset’ the charge/voltage on the feedback capacitor, as desired. This arrangement decouples the structure of the switch from the output port of the voltage amplifier, and so avoids leakage currents and/or interfering voltage signals emanating from the switch structure and being felt at the output port of the voltage amplifier.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: June 7, 2022
    Assignee: ISOTOPX, LTD
    Inventors: Anthony Michael Jones, Vadim Volkovoy, Damian Paul Tootell
  • Patent number: 11356062
    Abstract: An electric circuit according to one embodiment of the present technology includes a target circuit and an auxiliary circuit. The target circuit includes an output portion from which predetermined output power is output, and an application point to which a voltage corresponding to the output power is applied to output the output power. The auxiliary circuit has impedance lower than impedance of the target circuit, and outputs the voltage corresponding to the output power to the application point as an auxiliary voltage.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: June 7, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Takahiro Naito
  • Patent number: 11356065
    Abstract: Disclosed is a system and a method of baseband linearization for a class G radiofrequency power amplifier, the linearization system including a module for selecting the amplifier power supply voltage, a digital predistortion module, and a module for extracting predistortion coefficients, wherein the linearization system also includes a digital filter with complex coefficients, the input of which is connected to the output of the digital predistortion module, and a module for extracting filter coefficients which is designed to extract filter coefficients used by the digital filter with complex coefficients.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: June 7, 2022
    Assignee: WUPATEC
    Inventors: Emmanuel Gatard, Pierre Lachaud
  • Patent number: 11349438
    Abstract: Power amplifier (PA) packages, such as Doherty PA packages, containing multi-path integrated passive devices (IPDs) are disclosed. In embodiments, the PA package includes a package body through which first and second signal amplification paths extend, a first amplifier die within the package body and positioned in the first signal amplification path, and a second amplifier die within the package body and positioned in the second signal amplification path. A multi-path IPD is further contained in the package body. The multi-path IPD includes a first IPD region through which the first signal amplification path extends, a second IPD region through which the second signal amplification path extends, and an isolation region formed in the IPD substrate a location intermediate the first IPD region and the second IPD region.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: May 31, 2022
    Assignee: NXP USA, Inc.
    Inventors: Yun Wei, Ricardo Uscola, Monte G. Miller
  • Patent number: 11349441
    Abstract: An audio driver circuit includes a modulator circuit configured to receive an audio input signal and produce a first modulated digital pulse signal. The first modulated digital pulse signal has a magnitude that switches between a supply power voltage and a supply ground voltage. The audio driver circuit also includes a switched driver circuit coupled to the modulator circuit to receive the first modulated digital pulse signal and configured to provide a second modulated digital pulse signal for driving an MOS (metal oxide semiconductor) output transistor. The second modulated digital pulse signal has a same timing pattern as the first modulated digital pulse signal and has a magnitude that tracks linearly with the magnitude of the audio input signal.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: May 31, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Peter Holzmann
  • Patent number: 11349442
    Abstract: The present invention provides a differential to single-ended converter including a first input node, a second input node, an operational amplifier and a feedback circuit. The operational amplifier has a first terminal and a second terminal, wherein the first terminal of the operational amplifier receives a first signal from the first input terminal, and the second terminal of the operational amplifier receives a second signal from the second input terminal. The feedback circuit is configured to receive an output signal of the operational amplifier and generate a first feedback signal to the first terminal of the operational amplifier to reduce a swing of the first signal, and generate a second feedback signal to the second terminal of the operational amplifier to balance noises induced by the feedback circuit and inputted to the first terminal and the second terminal.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: May 31, 2022
    Assignee: MEDIATEK INC.
    Inventors: Fong-Wen Lee, Yu-Hsin Lin
  • Patent number: 11349448
    Abstract: Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. For disclosed embodiments, a filter circuit is coupled between a first internal node and a connection pad for an integrated circuit. The filter circuit includes a first inductance, a variable capacitance, and a second inductance. The capacitance amount for the variable capacitance is controlled to tune filtering for the filter circuit to a harmonic of a frequency for a transmit output signal. A power amplifier outputs the transmit output signal to the connection pad without passing through the filter circuit. The filter circuit filters the harmonic of the frequency for the transmit output signal, shunting harmonic current to ground. For one embodiment, the filtered harmonic is a third harmonic of the transmit frequency. For one embodiment, the transmit output signal has an output power greater than or equal to 15 dBm.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: May 31, 2022
    Assignee: Silicon Laboratories Inc.
    Inventors: Ruifeng Sun, Francesco Barale, Vinod Jayakumar, Sherry Xiaohong Wu, Mustafa H. Koroglu, Essam S. Atalla
  • Patent number: 11349444
    Abstract: In a transimpedance amplifier circuit, a control current circuit generates a control current based on a voltage signal and a reference voltage signal and includes an integrating circuit that generates a differential integral signal based on the voltage signal and the reference voltage signal, and a transconductance amplifying circuit that includes a first transconductance circuit that generates a first output current in accordance with the differential integral signal, a second transconductance circuit that generates a second output current in accordance with the differential integral signal, and a current source that supplies a third output current, and a control circuit has an input electrically connected to an output of the first transconductance circuit, an output of the second transconductance circuit, and an output of the current source.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: May 31, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Keiji Tanaka
  • Patent number: 11342890
    Abstract: An apparatus to prevent supply-to-ground current in a comparator is disclosed. The apparatus includes circuitry to determine if first and second output nodes of the comparator have respectively reached first and second logic levels, and circuitry responsive to a determination that the voltage at the first and second output nodes of the comparator has reached the first and second logic levels, to generate a signal. In addition, the apparatus includes circuitry to supply the signal to a transistor, the signal to turn off the transistor and prevent the flow of supply-to-ground current through the comparator.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: May 24, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Meghna Agrawal
  • Patent number: 11336239
    Abstract: A high-frequency amplifier circuit has a source-grounded first transistor that amplifies a high-frequency input signal, a gate-grounded second transistor that further amplifies the amplified signal, a first inductor and a first reference voltage node, a second inductor connected between a first node and a second reference voltage node, a third transistor that is connected between the first node and a drain of the second transistor, is turned on at the time of selecting the first mode to transmit the amplified signal to the first node, and is turned off when selecting a second mode to disconnect the first node from the drain of the second transistor, a bypass path that bypasses the high-frequency input signal from an input node of the high-frequency input signal to the first node at the time of selecting the second mode, and a bypass switching circuit that is connected on the bypass path.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: May 17, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiki Seshita, Yasuhiko Kuriyama
  • Patent number: 11336235
    Abstract: An amplifier is configured in such a way that a first capacitor resonates at the frequency of a second harmonic wave included in a signal outputted from an amplifying element, a circuit including a second transmission line, the first capacitor, and a second capacitor resonates at the frequency of a third harmonic wave included in the signal outputted from the amplifying element, and also matches the impedance for a fundamental wave together with an impedance matching circuit.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: May 17, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Eigo Kuwata, Jun Nishihara
  • Patent number: 11336234
    Abstract: A power amplifier circuit includes a power amplifier that amplifies an input signal and outputs the amplified signal from an output terminal thereof, a first filter circuit that has a frequency characteristic that attenuates an Nth-order harmonic of the amplified signal, N that is an integer greater than or equal to 2, and a second filter circuit that has a frequency characteristic that attenuates the Nth-order harmonic of the amplified signal. The first filter circuit includes a first capacitor and a first inductor. The first capacitor and the first inductor are connected in series between the output terminal and ground. The second filter circuit includes a second capacitor and a second inductor. The second capacitor and the second inductor are connected in series between the output terminal and ground.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: May 17, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi Yamada, Yuuri Honda, Satoshi Tanaka
  • Patent number: 11336236
    Abstract: A transimpedance amplifier is provided for converting a current between its two input terminals to a voltage over its two output terminals comprising a high-speed level shifter configured for creating a difference in input DC voltage and for being transparent for alternating voltages, an input biasing network configured for reverse biasing a photodiode connected to at least one of the input terminals and transparent for a feedback signal from the feedback network which is differentially and DC-coupled with the output terminals of the voltage amplifier and outputs of the feedback network are differentially and DC-coupled with the input biasing network of which outputs are coupled with inputs of the level shifter which is differentially and DC-coupled with input terminals of the voltage amplifier.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: May 17, 2022
    Assignees: UNIVERSITEIT GENT, IMEC VZW
    Inventors: Joris Lambrecht, Hannes Ramon, Bart Moeneclaey, Xin Yin
  • Patent number: 11329619
    Abstract: Disclosed herein is an operational amplifier including a non-inverting input terminal, an inverting input terminal, a P-type metal oxide semiconductor input differential pair, a first input tail current source, an N-type metal oxide semiconductor input differential pair, a second input tail current source, an output stage, a first correction circuit, and a second correction circuit. The first correction circuit and the second correction circuit operate over an operation region of the P-type metal oxide semiconductor input differential pair, an operation region of the N-type metal oxide semiconductor input differential pair, and a transition region in which both the P-type metal oxide semiconductor input differential pair and the N-type metal oxide semiconductor input differential pair operate.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: May 10, 2022
    Assignee: ROHM Co., LTD.
    Inventors: Naohiro Nomura, Takatoshi Manabe
  • Patent number: 11329611
    Abstract: Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: May 10, 2022
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Haopei Deng