Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.

Abstract: A signal output circuit includes an inverting amplifier circuit, a feedback capacitor and a low pass filter. The inverting amplifier circuit includes an input terminal and an output terminal. The inverting amplifier circuit executes an inverting amplification based on an input signal to output a signal to the output terminal at a pull-up state. An output stage of the inverting amplifier circuit is an open collector or an open drain. The feedback capacitor is connected between the input terminal and the output terminal of the inverting amplifier circuit. The low pass filter has an input and an output. The input of the low pass filter is connected to the output terminal of the inverting amplifier. The output of the low pass filter is connected to the feedback capacitor.

Abstract: A multi-band power amplifier module includes at least one transmission input terminal, at least one power amplifier circuit that receives a first transmission signal and a second transmission signal through the at least one transmission input terminal, a first filter circuit that allows the first transmission signal to pass therethrough, a second filter circuit that allows the second transmission signal to pass therethrough, at least one transmission output terminal through which the first and second transmission signals output from the first and second filter circuits are output, a transmission output switch that outputs each of the first and second transmission signals output from the at least one power amplifier circuit to the first filter circuit or the second filter circuit, and a first tuning circuit that adjusts impedance matching between the at least one power amplifier circuit and the at least one transmission output terminal.

Abstract: One aspect of this disclosure is a power amplifier system that includes a control interface, a power amplifier, a passive component, and a bias circuit. The power amplifier and the passive component can be on a first die. The bias circuit can be on a second die. The control interface can operate as a serial interface or as a general purpose input/output interface. The power amplifier can be controllable based at least partly on an output signal from the control interface. The bias circuit can generate a bias signal based at least partly on an indication of the electrical property of the passive component. Other embodiments of the system are provided along with related methods and components thereof.

Abstract: An isolation amplification circuit having an input stage circuitry and a control circuitry stage interconnected through a galvanic isolation barrier. The input stage circuitry includes a first filter network and a second filter network for supplying first and second output signals in response to the application of first and second electrical input signals. The input stage circuitry includes a first feedback path configured for applying a first feedback signal to a common node of the first filter network to close a first feedback loop around the first filter network and a second feedback path configured for applying a second feedback signal to a common node of the second filter network to close a second feedback loop around the second filter network.

Abstract: One embodiment provides a system comprising a single DC voltage source and a Class-D amplifier comprising at least one DC/DC converter operated by the single DC voltage source. The amplifier is configured to receive an input signal for power amplification, and generate, via the at least one DC/DC converter, a DC output voltage that approaches or exceeds a DC supply voltage from the single DC voltage source. A gain of the amplifier is a ratio of the output voltage level to the input signal. A steady-state operating point of the at least one DC/DC converter is zero output.

Abstract: An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.

Abstract: Methods and systems for optimizing amplifier operations are described. The described methods and systems particularly describe a feed-forward control circuit that may also be used as a feed-back control circuit in certain applications. The feed-forward control circuit provides a control signal that may be used to configure an amplifier in a variety of ways.

Abstract: An integrated circuit includes an amplifier for amplifying an electric current signal from an external light receiving element, and a low-pass filter. The low-pass filter has a resistor and a capacitor serial-connection in which multiple capacitive elements are serially connected. With respect to the resistor in the low-pass filter, one end thereof is connected to a power terminal to which the bias voltage is inputted, and the other end thereof is connected to an input terminal of the capacitor serial-connection and to a bias application electrode of the light receiving element through which the bias voltage is applied. With respect to the capacitor serial-connection in the low-pass filter, each connection terminal between two of the serially connected capacitive elements and an output terminal of the capacitor serial-connection, are connected to their respective capacitance terminals to which a ground potential as a reference for the bias voltage is connected selectively.

Abstract: A power transistor die includes a semiconductor die with input and output die sides, and a transistor integrally formed in the semiconductor die between the input die side and the output die side, where the transistor has an input and an output (e.g., a gate and a drain, respectively). The power transistor die also includes an input bondpad and a first output bondpad integrally formed in the semiconductor die between the input die side and the transistor. The input bondpad is electrically connected to the input of the transistor. A conductive structure directly electrically connects the output of the transistor to the first output bondpad. A second output bondpad, which also may be directly electrically connected to the transistor output, may be integrally formed in the semiconductor die between the transistor and the output die side.

Abstract: Amplifiers can be found in pipelined ADCs and pipelined-SAR ADCs as inter-stage amplifiers. The amplifiers can in some cases implement and provide gains in high speed track and hold circuits. The amplifier structures can be open-loop amplifiers, and the amplifier structures can be used in MDACs and samplers of high speed ADCs. The amplifiers can be employed without resetting, and with incomplete settling, to maximize their speed and minimize their power consumption. The amplifiers can be calibrated to improve performance.

Abstract: In one aspect, a power amplifier apparatus comprising a power amplifier (PA) and an adaptive controller is provided. The PA comprises at least one transistor and the adaptive controller is configured to control a bias voltage of the transistor based on a measured power efficiency of the PA and a measure output signal quality of the PA. In another aspect, a method of optimizing PA performance is provided. The PA comprises at least one transistor and the method includes initializing a bias voltage of the transistor, receiving measurements indicating a power efficiency and an output signal quality of the PA, evaluating the received measurements, calculating a new bias voltage for the transistor based on the evaluation, and applying the calculated new bias voltage to the transistor.

Abstract: A method for controlling a signal envelope shape of modulation pulses in a driver of a wireless transmitter includes supplying a first voltage to the driver during a non-modulated state, supplying a second voltage configurable by a configurable modulation index value to the driver during a modulated state, switching between the non-modulated state and the modulated state comprising setting the modulation index value to configure the second voltage level at the same level as the first voltage and then switching between supplying the first voltage to the driver and supplying the second voltage to the driver, and filtering to a limited bandwidth the variations of the second voltage resulting from configuring the modulation index value.

Abstract: A differential amplifier circuit includes a first transistor, a second transistor, a field effect transistor (FET) connected between the first transistor and the second transistor, a first current source connected to the first transistor, a second current source connected to the second transistor, and a control circuit. The first transistor and the second transistor generate a differential output signal in accordance with an input signal and a reference signal. The control circuit includes a first resistor and a second resistor connected in series between the drain and the source of the FET, a center node between the first resistor and the second resistor, a third resistor connected between the gate of the FET and the center node, and a variable current source. The variable current source supplies a control current to the third resistor in accordance with a gain control signal. The control circuit controls on-resistance of the FET.

Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.

Abstract: A variable gain amplifier according to an embodiment comprises a first path, a matching circuit, an amplifier circuit, a second path, and a third path. The first path includes an attenuation circuit, has one end connected to a first input terminal, and attenuates an input signal and outputs an attenuated signal. The matching circuit has one end connected to the other end of the first path. The amplifier circuit has an input connected to the other end of the matching circuit and an output connected to a first output terminal, and amplifies an input signal. The second path is connected in parallel to the first path. The third path has one end connected to the first input terminal, and the other end connected to the first output terminal.

Abstract: An apparatus that generates and limits a bias current of a power amplifier is provided. The apparatus includes a bias current circuit that generates a bias current to bias the power amplifier, and critically limit an increase in bias current, and a band gap reference circuit that provides a reference voltage or a reference current to the bias current circuit. The bias current circuit is configured to critically limit the increase in bias current, as a first bias transistor that generates the bias current is converted from a triode region to a saturation region, based on the reference voltage or the reference current.

Abstract: A bias circuit includes a current generating circuit generating an internal base current based on a reference current, a bias output circuit generating a base bias current based on the internal base current and outputting the base bias current to an amplifying circuit, and a temperature compensation circuit regulating the base bias current based on a temperature voltage reflecting a change in ambient temperature.

Abstract: An instrumentation amplifier with an electronically adjustable gain is disclosed. The gain is adjusted by electronically controlling a resistance coupled to a feedback portion of the instrumentation amplifier. The resistance is adjusted by switches controlled by resistor-control signals references to a common mode voltage appearing at the input of the instrumentation amplifier. Accordingly, the instrumentation amplifier is capable of accommodating a high voltage range of common mode voltages while still providing controllable gain.

Abstract: A multi-bandwidth envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The multi-bandwidth ETIC may be coupled to an amplifier circuit(s) for amplifying a radio frequency (RF) signal modulated in a wide range of modulation bandwidth. In examples discussed herein, the multi-bandwidth ETIC includes an ET voltage circuit configured to generate a modulated voltage based on a supply voltage. The supply voltage may be dynamically adjusted to cause the modulated voltage to transition quickly from one voltage level to another voltage level, particularly when the RF signal is modulated in a higher modulation bandwidth, without compromising efficiency of the ET voltage circuit. As such, the multi-bandwidth ETIC may generate different modulated voltages based on the modulation bandwidth of the RF signal, thus making it possible to employ the multi-bandwidth ETIC in a wide range of wireless communication devices, such as a fifth-generation (5G) wireless communication device.