Abstract: The present technology relates to an electronic device. According to the present technology, a computing system may include a storage device and a host. The storage device may include a plurality of zones. The host may receive storage area information including an optimal write size of an open zone among the plurality of zones from the storage device, determine a target size of data to be flushed to the storage device based on the optimal write size, a history size that is a size of data previously flushed to the storage device, and a buffer data of the host, and flush data having the target size among the buffer data to the storage device.

Abstract: Methods, systems, and devices for adaptive block mapping are described. In some examples, a first superblock and a second superblock may be established across one or more dice of a memory device. The superblocks may each include one or more blocks from a plurality of planes of a memory die. In some examples, the second superblock may include at least one bad block (e.g., defective block) in addition to one or more good blocks (e.g., non-defective blocks). The memory device may receive a command for writing data in a first mode and may write a first subset of the data to the first superblock in the first mode, a second subset of the data to the second superblock in the first mode, and one or more blocks associated with the second superblock in a second mode. Additionally or alternatively, the memory device may receive a second command for writing data in the second mode and may write the data to the first superblock in the first mode.

Abstract: In an example, an apparatus comprises a plurality of compute engines; and logic, at least partially including hardware logic, to detect a cache line conflict in a last-level cache (LLC) communicatively coupled to the plurality of compute engines; and implement context-based eviction policy to determine a cache way in the cache to evict in order to resolve the cache line conflict. Other embodiments are also disclosed and claimed.

Abstract: Aspects described herein relate to a method comprising: receiving a request to write data to a persistent storage device, the request comprising data; determining an affinity of the data; writing the request to a cache line of a cache; associating the cache line with the affinity of the data; and reporting the data as having been written to the persistent storage device.

Abstract: Methods, systems, and devices for managed memory systems with multiple priority queues are described. Memory access commands may be received from a host and stored in a command queue. First and second subsets of the commands, respectively associated with first and second priorities, may be determined. The first and second subsets may be routed from the command queue to first and second queues, respectively. The first and second subsets may be processed from the first and second queues to third and fourth queues, respectively, at a storage controller, according to first and second processes that may be run concurrently according to parameters for prioritization between the first and second priorities. Data associated with the commands may be received from the host, temporarily stored in a buffer, then moved to a storage memory (for write commands) or retrieved from the storage memory, temporarily stored in the buffer, then transmitted to the host (for read commands).

Abstract: A method of a flash memory controller to be used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface includes: using a set-feature signal, which carries a set-feature command, a macro execution feature address, and corresponding macro execution parameter information, as a macro execution signal and transmitting the macro execution signal to the flash memory device to make the flash memory device execute multiple set-feature operations respectively having unique information defined by the corresponding macro execution parameter information carried in the macro execution signal.

Abstract: A storage device is configured to manage a plurality of nonvolatile memories with a plurality of physical streams. An operation method of the storage device includes receiving an input/output request from an external host device, determining a 0-th virtual stream identifier, extracting a 0-th representative value from a 0-th virtual stream feature, extracting a first and second representative values corresponding to first and second physical streams, calculating distance information including first and second similarities between the 0-th virtual stream and each of the first and second physical streams, based on the extracted representative values, assigning one of the plurality of physical streams to the 0-th virtual stream, based on the distance information, and performing an operation corresponding to the input/output request, at the assigned physical stream, and the extracting and the calculating are performed by using machine learning model.

Abstract: A system and method of securing a computer system by controlling write access to a storage medium by monitoring an application; detecting an attempt by the application to write data to said storage medium; interrogating a rules database in response to said detection; and permitting or denying write access to the storage medium by the application in dependence on said interrogation.

Abstract: The present concepts relate to contiguously writing data blocks of a data group in storage media in a one-step writing operation without defragmenting. A host may assign a group identifier to the data group, tag the data blocks in the data group with the group identifier, and send the data blocks to a storage controller. In turn, the storage controller may receive the data blocks that are tagged with the common group identifier, and contiguously write the data blocks in contiguous free space in the storage media. As such, reading the data group from the storage media may be performed faster than if the data group has been allowed to be written with fragmentation. The present concepts may also avoid the costs associated with a two-step writing operation that involves defragmenting.

Abstract: The invention relates to a method, and an apparatus for programming data into flash memory. The method includes: driving, by the routing engine, a host interface (I/F) according to the front-end parameter set when determining that a front-end processing stage needs to be activated for the data-programming transaction; driving, by the accelerator, a Redundant Array of Independent Disks (RAID) engine according to the mid-end parameter set when receiving an activation message of the data-programming transaction from the routing engine and determining that a mid-end processing stage needs to be activated; and driving, by the accelerator, a data access engine according to the back-end parameter set when determining that the mid-end processing stage for the data-write transaction does not need to be activated or the mid-end processing stage for the data-write transaction has been completed, and a back-end processing stage for the data-write transaction needs to be activated.

Abstract: An operation method of a storage device including first and second physical functions respectively corresponding to first and second hosts includes receiving performance information from each of the first and second hosts, setting a first weight value corresponding to the first physical function and a second weight value corresponding to the second physical function, based on the received performance information, selecting one of a first submission queue, a second submission queue, a third submission queue, and a fourth submission queue based on an aggregated value table, the first and second submission queues being managed by the first host and the third and fourth submission queues are managed by the second host, processing a command from the selected submission queue, and updating the aggregated value table based on a weight value corresponding to the processed command from among the first and second weights and input/output (I/O) information of the processed command.

Abstract: Embodiments of the present disclosure relate to the technical field of semiconductors and provide a storage system and a data writing method thereof. The storage system is configured to: enter a write data copy mode in response to a write-copy enable signal; if at least two groups of data in multiple groups of data exported from multiple data ports are a same in the write data copy mode, define the at least two groups of data as a category; generate an identification signal that is used to indicate a data copy; transmit one group of data in the category to an interface of a memory array; and disconnect a transmission path between a data port corresponding to another group of data in the category and another interface of the memory array, wherein the memory array, in response to the write-copy enable signal and the identification signal.

Abstract: There are provided a memory controller and a storage device including the same. The memory controller includes: a command storage including a first read command queue and a second read command queue; a command generation controller for storing a first read command generated in response to a read request and a first physical address in the first read command queue; and a command schedule controller for searching for a first physical address group including at least one second physical address including a page number equal to that of the physical address among the physical addresses stored in the first read command queue and the first physical address, in response to a scheduling event signal provided from the command generation controller.

Abstract: The embodiments of the present disclosure relate to the technical field of semiconductors and provide a storage system and a data reading method thereof. The storage system is configured to: enter a read data copy mode in response to a read-copy enable signal; if at least two groups of data in multiple groups of data exported from a memory array are a same in the read data copy mode, define the at least two groups of data as a category; export an identification signal that is used to indicate a data copy; transmit one group of data in the category to a corresponding data port; and disconnect a transmission path that is used to transmit another group of data in the category to a corresponding data port.

Abstract: A recording medium stores a division program for causing a computer to execute processing including: acquiring, for each application of a plurality of applications capable of sharing a cache memory, memory access information that enables specification of memory addresses accessed when each of the applications is operated in time series; calculating, for each of the applications, a frequency distribution of access intervals to the same memory address based on the acquired memory access information; specifying, for each of the applications, a correspondence relationship between a cache capacity and the number of cache hits to be allocated to each of the applications based on the calculated frequency distribution of the access intervals; and distributing, on based on the correspondence relationship specified for each of the applications, the cache memory to the plurality of applications such that a total number of cache hits of each of the applications is maximized.

Abstract: A partition command is stored at free memory address location of the local memory corresponding to an index of an address array. The index is associated with an entry in the address array. A last entry in a linked list of entries from a tail register is obtained based on an allocation of the stored partition command to a partition command queue of a plurality of partition command queues. The tail register corresponds to the partition command queue of the plurality of partition command queues. Responsive to obtaining the last entry in the linked list, an entry to the linked list after the last entry is appended. The entry corresponds to the index of the address array associated with the stored partition command.

Abstract: A storage device may include a non-volatile memory including a plurality of zones, the non-volatile memory configured to sequentially store data in at least one of the plurality of zones, and a processing circuitry configured to, receive a first write command and first data from a host, the first write command including a first logical address, identify a first zone of the plurality of zones based on the first logical address, compress the first data based on compression settings corresponding to the first zone, and write the compressed first data to the first zone.

Abstract: A memory system includes a nonvolatile memory having a plurality of nonvolatile memory chips incorporated therein, a control circuit that controls the nonvolatile memory, an MPU that controls the control circuit, and an interface circuit that communicates with a host, all of which are mounted on a board of the memory system, and the memory system further includes a bus switch that switches connection of a signal line between the control circuit and the nonvolatile memory chips.

Abstract: Data storage devices function by communication between a controller and a memory device over a data bus. The memory device can, at times, be busy. Attempting to communicate with the memory device while the memory device is busy causes delays. Holding back communications when the memory device is not busy causes avoidable delays. Correctly predicting the timing of when the memory device is available will reduce delays. An adaptive prediction timer is used that increases the time between communications if a status check of the memory device returns a busy indication, and decreases the time between communications if the status check returns a not busy indication.

Abstract: A processing device in a memory sub-system identifies a plurality of word lines at a first portion of a memory device, determines a respective error rate for each of the plurality of word lines, and determines that a first error rate of a first word line of the plurality of word lines and a second error rate of a second word line of the plurality of word lines satisfy a first threshold condition pertaining to an error rate threshold. The processing device further identifies a third word line of the plurality of word lines that is proximate to the first word line and the second word line and relocates data stored at the third word line to a second portion of the memory device, wherein the second portion of the memory device is associated with a lower read latency than the first portion of the memory device.