Patents Examined by Laura Thomas
  • Patent number: 5583317
    Abstract: A controlled oxygen content copper clad laminate product. In accordance with one aspect of the present invention, there is provided a laminate having a first layer of oxygen-free copper joined to a second layer of oxygen-rich copper by the steps of (i) cladding the first layer to the second layer at a relatively low speed to minimize rolling friction, (ii) finish rolling the laminate to substantially increase its thickness tolerance, (iii) slitting the laminate to increase its width tolerance, (iv) profiling a groove at a selected location in the laminate, (v) finish slitting a plurality of ribbons from the laminate, (vi) tension leveling the laminate to straighten and flatten its shape, (vii) stamping the laminate into sections each of a selected configuration, (viii) cleaning laminate surfaces, and (ix) direct bonding the laminate to a substrate material such that the first layer is annealed to the second.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 10, 1996
    Assignee: Brush Wellman Inc.
    Inventors: Joseph P. Mennucci, Charles R. Mead
  • Patent number: 5583321
    Abstract: Multilayer circuit assemblies are made by stacking circuit panels having contacts on their top surfaces, through conductors extending between top and bottom surfaces and terminals connected to the bottomend of each through conductor. The terminals and contacts are arranged so that when the panels are stacked the terminals on the bottom of one panel are in alignment with the contacts on the top surface of the immediately underlying panel. The panels are selectively treated on their top and/or bottom surfaces so as to selectively disconnect or connect each contact to a terminal on the bottom surface of the same panel. For example, the top surface of the panel may be selectively etched to disconnect a contact from one through conductor and hence from the associated terminal. The aligned terminals and contacts are nonselectively connected to one another at each interface so that wherever a terminal and contact on adjacent panels are aligned with one another there are connected to one another.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: December 10, 1996
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Igor Y. Khandros, Gary W. Grube
  • Patent number: 5581051
    Abstract: An insulating assembly for an overhead power line has a main subassembly formed of two parallel spaced insulators joined at their ends by aluminum end pieces. The end pieces each have a slot aligned with the space between the two insulators and a rod projecting from the end piece in alignment with the slot but below the slot. This arrangement enables the subassembly to be hung on a hot power line with the line passing along the slots and the space between the insulators. The rods may be clamped to the line by any suitable device such as wedges and C-shaped clamps. With the subassembly thus mechanically and electrically connected securely to the line, the line can be severed at a location between the end pieces and the free ends forced apart.
    Type: Grant
    Filed: October 21, 1994
    Date of Patent: December 3, 1996
    Inventor: Edward C. Hill
  • Patent number: 5578796
    Abstract: According to the present invention, a method of laminating at least two substrates together and circuitizing at least one surface of the laminate is provided. Pressure is exerted against opposite surfaces of each of said two substrates. An opening extends from a circuit-receiving surface of at least one of said substrates. A plug is provided which is configured to removably fit into said opening and has a support surface thereon which is substantially coplanar with the circuit-receiving surface when said plug is positioned in the opening. The plug is inserted in the opening with the support surface substantially coplanar with the circuit-receiving surface. The substrates are laminated by application of pressure on the opposite surfaces of the substrates. The circuit-receiving surface and the support surface are covered with a sheet of dry film photoresist to seal around the opening with said plug member supporting said sheet of photoresist in the region of the opening.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: November 26, 1996
    Assignee: International Business Machines Corporation
    Inventors: Ashwinkumar C. Bhatt, Thomas P. Duffy, Gerry A. Hackett, Jeffrey McKeveny
  • Patent number: 5576680
    Abstract: The present invention discloses an inductive circuit. The inductive circuit is fabricated on a semiconductor chip including a substrate layer and a dielectric layer. The inductive circuit includes an inductive core composed of high magnetic susceptible material (HMSM) surrounded by an dielectric layer. The dielectric layer which surrounds the inductive core is further surrounded by a conductive line which includes the bottom conductive lines the conductive lines in the `vias` through the surrounding dielectric layer and the top conductive lines. The conductive lines are patterned by employing IC fabrication processes. Thus the inductive core, the dielectric layer surrounding the inductive core, and the surrounding conductive line form an inductive circuit and the inductive circuit is formed on the semi-conductor chip which includes the substrate a layer and a dieletric layer.
    Type: Grant
    Filed: March 1, 1994
    Date of Patent: November 19, 1996
    Assignee: Amer-Soi
    Inventor: Peiching Ling
  • Patent number: 5576519
    Abstract: An interconnect sheet for connecting multiple layers of a circuit board for the manufacture of high interconnect density PWBs. The interconnect sheet preferably comprises an area array grid of 0.003 inch solder columns having a 0.006 inch pitch. The interconnect sheet is preferably used to attach two or more multi-layer boards by placing one sheet at every interconnect surface. This interconnect mechanism has an advantage of redundancy of contact and therefore lower susceptibility to failure than other methods. The interconnect sheet of the present invention also offers a large tolerance for registration error without shorting adjacent pads. The preferred method of fabrication of the interconnect sheet begins with creating equally spaced holes through a 0.5 ounce double sided laminate comprising a dielectric sheet and copper plates on either side of the dielectric. These holes are filled with solder paste and the sheet undergoes a baking process to shrink the paste.
    Type: Grant
    Filed: March 23, 1995
    Date of Patent: November 19, 1996
    Assignee: Dell U.S.A., L.P.
    Inventor: Deepak N. Swamy
  • Patent number: 5576518
    Abstract: A via-structure off a multilayer interconnection ceramic substrate for a multi-chip module, a semiconductor package and an insulating substrate has a high strength and a high reliability being produced at a low cost. A gap is provided at an interface between a via-conductor and ceramics, and filled with a resin. The resin is preferably of a thermosetting polyimide resin or a benzo-cyclo-butene resin.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: November 19, 1996
    Assignee: NEC Corporation
    Inventors: Akinobu Shibuya, Mitsuru Kimura
  • Patent number: 5576517
    Abstract: An electronic structure includes a circuit chip having chip pads and supported by a substrate, and a low dielectric constant porous polymer layer having pores and situated over the substrate and circuit chip. The porous polymer layer has at least one via therein aligned with at least one of the chip pads, and a pattern of electrical conductors extends over a portion of the porous polymer layer and into the at least one via. The pattern of electrical conductors does not significantly protrude into the pores of the porous polymer layer.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: November 19, 1996
    Assignee: General Electric Company
    Inventors: Robert J. Wojnarowski, Herbert S. Cole, Theresa A. Sitnik-Nieters, Wolfgang Daum
  • Patent number: 5576681
    Abstract: A high voltage transformer for a television receiver includes a primary winding and a secondary winding. The secondary winding is compartmentalized and is separated from the primary winding by a space. The secondary winding has a plurality of partial windings which are arranged in cells of a compartmentalized coil form and are connected to one another by diodes. The partial windings are positioned and dimensioned with respect to the primary winding to cause substantially equal pulse voltages of like polarity to exist at the neighboring portions of the primary winding and the partial windings in the vicinity of the space, to substantially eliminate pulse electric fields in the space.
    Type: Grant
    Filed: April 5, 1995
    Date of Patent: November 19, 1996
    Assignee: Deutsche Thomson-Brandt GmbH
    Inventors: Hans-Werner Sander, Wolfgang Reichow, Walter Goseberg
  • Patent number: 5574249
    Abstract: In one embodiment of a cabinet for housing electronic circuitry, a high resistivity inner shield surrounds and is insulated from the enclosed electronic circuitry within the cabinet. The inner shield is surrounded by, and optionally insulated from, an outer, highly conductive shield. This approach may be thought of as shielding the enclosed electronic circuitry from the outside highly conductive metal shield. The inner shield attenuates the effects of fluctuating voltage gradients in the outer shield on the enclosed electronic circuitry.
    Type: Grant
    Filed: July 18, 1994
    Date of Patent: November 12, 1996
    Assignee: Lindsay Audiophile Inc.
    Inventor: David S. Lindsay
  • Patent number: 5572179
    Abstract: A thin film transformer which is fabricated on a substrate includes first and second thin film coils. One of the coils includes either of at least two spiral shaped coil parts that are disposed below an insulation layer and either of at least two spiral shaped coil parts that are disposed above the insulation layer, the coil parts being connected through a connection hole in the insulation layer, with terminals for the coil being located outside the outer loops of the coil parts. The other of the coils includes other coil parts that are connected through a connection hole in the insulation layer, with terminals again being located outside the outer loops of the coil parts. With this configuration, the first and second thin film coils have terminals that are located outside of the outer loops of the coils. Side-by-side transformers whose primaries and secondaries are connected so as to form a single transformer are also disclosed.
    Type: Grant
    Filed: January 10, 1995
    Date of Patent: November 5, 1996
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Naoki Ito, Tsuneo Watanabe, Yoshiyuki Sugahara, Toshio Komori
  • Patent number: 5571996
    Abstract: A circuit board is provided having a plurality of vias and uniformly spaced connector stubs arranged upon one or both outer surfaces of the control board. Sets of trace conductors are formed within the control board between the vias. The trace conductors are arranged in two planes within the control board, wherein trace conductors within one plane are laterally offset from trace conductors in the other plane. Laterally offset trace conductors allow close spacing of the trace conductor planes while maximizing the spacing between trace conductors and corresponding reference conductors also placed within the control board. Additionally, the trace conductors are serpentine-shaped when viewed from a perspective perpendicular to the planar surface of the control board.
    Type: Grant
    Filed: January 17, 1995
    Date of Patent: November 5, 1996
    Assignee: Dell USA, L.P.
    Inventors: N. Deepak Swamy, Victor K. Pecone, Darrell Slupek
  • Patent number: 5572178
    Abstract: A rotary transformer for aircraft deicing apparatus, the transformer including a primary winding adjacent a laminated primary core, and a secondary winding adjacent a laminated secondary core; at least one of the cores being rotatable with respect to the other core.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: November 5, 1996
    Assignee: Simmonds Precision Products, Inc.
    Inventors: Richard J. Becker, Michael J. Douglass, David B. Sweet
  • Patent number: 5569886
    Abstract: A flexible printed circuit board is constituted with a first insulation film covering a first insulating resist layer, a second insulation film covering a second insulating resist layer and a printed circuit formed between the first insulating resist layer and the second insulating resist layer, and a terminal of an electronic component is disposed on the printed circuit, and the second insulation film is pressed and heated.
    Type: Grant
    Filed: April 18, 1995
    Date of Patent: October 29, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kouji Tanabe, Noahiro Nishioka
  • Patent number: 5569884
    Abstract: Trunking, in particular trunking for electrical apparatus, includes a body with inwardly directed lips and a cover adapted to be snap-fastened to the lips. The trunking further includes a cover jointing member extending transversely between the lips of the body to cover the end of the cover. At one end at least it is provided with a latch for locking it to the respective lip of the body.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: October 29, 1996
    Assignees: Legrand, Legrand SNC
    Inventor: Bertrand Decore
  • Patent number: 5567917
    Abstract: A metal base board comprising a metal plate, a circuit conductor section, and an insulating layer provided between the circuit conductor and the metal plate wherein the insulating layer comprises an organic insulating material with flaky inorganic fillers added therein and the flaky inorganic fillers are stacked in the insulating layer in a stratified state.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 22, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Satoru Hayashi
  • Patent number: 5565837
    Abstract: In a low-profile printed circuit device, a first substrate is provided with a planar magnetic transformer and a planar magnetic inductor. The transformer and the inductor each have a primary winding defining spiral conductive patterns disposed on opposite sides of the first substrate relative to each other, and an inductive core extending through a respective inner aperture formed through the first substrate and surrounded by the respective primary winding. A second substrate is also provided, having a secondary transformer winding and a secondary inductor winding. Each secondary winding defines respective spiral conductive patterns disposed on opposite sides of the second substrate, and surrounding respective inner apertures extending through the second substrate.
    Type: Grant
    Filed: June 13, 1994
    Date of Patent: October 15, 1996
    Assignee: Nidec America Corporation
    Inventors: Paul W. Godek, Michael J. Grennan
  • Patent number: 5565656
    Abstract: The present invention provides enclosures for protecting equipment, particularly electrical equipment, from electromagnetic interference. The enclosure includes at least two EMI-shielding portions which, when assembled, at least partially enclose a piece of equipment to be shielded. The first EMI-shielding portion of the enclosure is provided with a first interlocking element. The first interlocking element is integrally formed with the first EMI-shielding portion. A second EMI-shielding portion of the enclosure includes a second integrally-formed interlocking element. The first and second interlocking elements connect the first and second EMI-shielding portions of the enclosure such that electromagnetic energy is not transferred through the connected first and second interlocking elements at a substantially greater rate than through the remaining portions of the enclosure.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: October 15, 1996
    Assignee: Lucent Technologies Inc.
    Inventor: Behzad D. Mottahed
  • Patent number: 5565654
    Abstract: The invention is directed to a printed circuit board arrangement for plug-type connections composed of a blade connector and spring clip, whereby the individual contact passages are surrounded by electrically conductive shield plates that are connected to contactings carrying shield potential that are attached both at the backplane side as well as at the assembly side, and whereby both the contact blades and contact springs as well as the contactings are contacted and secured with press-in technique in the printed circuit boards fashioned as multi-layer multilayers. In order to create an adequate interconnect lead-through width between the contactings, the shield potential in the printed circuit board arrangement of the invention is conducted in a separate shield printed circuit board (3) that is electrically separated from the multilayer (1) by an insulating foil (2).
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: October 15, 1996
    Assignee: Siemens Aktiengesellschaft
    Inventors: Karl Zell, Juergen Seibold, Peter Seidel
  • Patent number: 5563380
    Abstract: An apparatus and method for mounting and connecting a plurality of integrated circuit chip dice to a printed circuit substrate by means of a small circuit board (such as a Mini-Board) that may be adapted to attach and connect into a plurality of different types of printed circuit board systems. A pattern of conductors that monotonically increases in pitch and width from a central point on a planar structure to the perimeter edge of the structure allows matching of any type of printed circuit board connections. A standard Mini-Board may be fabricated and tested before attaching to an electronic system printed circuit board. Repair and rework is easily facilitated with a minimum amount of damage to a printed circuit board by utilizing the present invention. A plurality of active and passive electronic components may also be attached and connected to the planar structure of the present invention. A hybrid mini-system may be fabricated and tested before connecting it into a system printed circuit board.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: October 8, 1996
    Assignee: LSI Logic Corporation
    Inventors: Michael D. Rostoker, Nicholas F. Pasch