Abstract: In a process for fabricating a semiconductor laser by forming a double-heterostructure made up of a first cladding layer, an active layer and a second cladding layer on a semiconductor substrate at the first growth step, forming protecting films for selective growth on both sides of a striped region for current injection, without etching the second cladding layer, and growing a third cladding layer and a contact layer for current injection at a second growth step, the second cladding layer formed at the first growth step is grown to the thickness required for achieving laser characteristics.

Abstract: A method of fabricating a microfuse, deletable by laser pulses utilizes laser pulses of a predetermined spot diameter and beam alignment accuracy. A fusible link forming a portion of the microfuse is defined such that its length is at least equal to the sum of the laser spot diameter and the beam alignment accuracy and its width is no greater than half the laser spot diameter. A method of deleting the microfuse by laser pulses is provided where the microfuse has a predetermined composition, length and width having an axis bisecting the width and parallel to the length and is covered with a passivation layer at least 3 .mu.m thick. The method includes adjusting the diameter of the beam of laser light (i) to at least a minimum diameter of W+.DELTA.P.sub.w, where W equals the width of the microfuse fuse link and .DELTA. P.sub.w equals the accuracy of the beam in the direction of W and (ii) to no more than a maximum diameter of L+.DELTA.P.sub.L, where L equals the length of the microfuse fuse link and .DELTA.P.

Abstract: A method for planarizing a layer (18) begins by forming a layer (18) over a wafer having a substrate (12). Layer (18) has a surface topography which is not planar. A layer of material (20) is formed over the layer (18). The layer of material (20) has a surface which is more planar than the surface of layer (18). The surface of material (20) is transferred into the layer (18) by etching the layer (18) and the material (20) at approximately the same etch rate. The same etch rate is achieved by monitoring one of either the surface of the wafer or the etch environment of an etch system chamber. A computer-controlled feedback path alters an etch chemistry or etch environment to maintain the etch rates within an etch rate tolerance which is also referred to as a process window. By monitoring and altering the etch environment and/or the etch chemistry to maintain a process window, an optimal planar surface is achieved for layer (18).

Abstract: This invention is a method for the controlled growth of single-crystal semiconductor-device-quality films of SiC polytypes on vicinal (0001) SiC wafers with low tilt angles. Both homoepitaxial and heteroepitaxial SiC films can be produced on the same wafer. In particular, 3C-SiC and 6H-SiC films can be produced within selected areas of the same 6H-SiC wafer.

Abstract: A method of synthesizing a large area, single crystalline, semiconductor wafer in which the semiconductor is grown on a substrate having a lower melting temperature and higher specific gravity than the overlying semiconductor. The substrate is disposed within an open container or holder having a drain plug. First, a very thin layer of semiconductor is grown on the substrate. Then, the temperature is raised to melt the substrate and anneal the very thin layer of semiconductor. Next, growth of the semiconductor film now floating on the molten substrate is resumed until the desired thickness is obtained. Then, the molten substrate is drained from the holder, the temperature lowered to room temperature, and the nascent large area semiconductor wafer removed from the holder.

Abstract: A semiconductor light emitting device able to emit a high intensity, stable light. An edge surface lighting type light emitting diode array is formed on a substrate. A light emitting edge surface of each light emitting element is formed by an etching method. A surface of the substrate in front of the light emitting edge surface is formed in multiple stage so that a light beam is not reflected by the surface of the substrate.

Abstract: In the first method, an etching stop layer and a current blocking layer are grown on a semiconductor substrate by MOVPE. Next, the current blocking layer is etched on a region of the etching-stop layer corresponding to an active region, and the active region is formed in the etched portion by the selective growth using MOVPE. In the second method, a ridge is formed on a semiconductor substrate, and a doublehetero structure is grown on the ridge by MOVPE. On the active layer, a p-cladding layer is grown to be covered on the whole surface with (111) B plane entirely. The (111) B plane has the growth speed suppressing effect, so that no semiconductor layer is grown on the p-cladding layer, while a current blocking layer is grown on other regions.

Abstract: A distribution feedback laser diode, comprises a substrate, a waveguide layer provided on the substrate, an active layer provided on the waveguide layer, a diffraction grating provided at an interface between the substrate and the waveguide layer for reflecting an optical radiation formed in the active layer back and forth, a clad layer provided on the active layer for confining the optical radiation within the active layer, a plurality of segmented electrodes provided on the top surface of the clad layer along an elongated direction of the laser diode for injecting the carriers into the active layer, wherein at least one of the segmented electrodes is provided in correspondence to a part of the active layer in which the optical radiation formed in the active layer has a maximum intensity level, and a backside electrode provided at the bottom surface of the substrate for injecting the carriers into the active layer through the substrate.

Abstract: A semiconductor device and processing technique is provided for monolithic integration of a single crystal compound element semiconductor on a ceramic substrate. A high resistivity semi-insulating buffer layer is epitaxially grown on the ceramic substrate and has an elastically transitional lattice constant matching at its lower surface the lattice constant of the ceramic substrate, and matching at its upper surface the lattice constant of the semiconductor layer.

Abstract: A semiconductor light emitting/detecting device has a first doped silicon layer, an intrinsic silicon epitaxial layer formed on the first doped silicon layer, at least one quantum dot embedded within the intrinsic silicon epitaxial layer, and a second doped silicon layer formed on the second intrinsic silicon epitaxial layer.

Abstract: A semiconductor laser of a patterned-substrate type comprises the patterned-substrate having a sloped portion and a planar portion, and a plurality of semiconductor layers formed on the patterned-substrate including a heterostructure. By controlling condition for growing a specific semiconductor layer, a preferable ratio of a sloped portion thickness to a planar portion thickness of the semiconductor layer can be obtained, which enables a lasing current of the laser to be confined in a restricted region, and this results in obtaining a high efficiency and a high power output of the semiconductor laser.

Abstract: A micro MIS type FET comprises first conductivity type source/drain regions formed in a surface of a semiconductor layer mutually spaced apart by a distance of less than 2 .mu.m, a second conductivity type channel layer having an impurity concentration of less than 1.times.10.sup.16 /cm.sup.3 formed between the source/drain regions to have a depth less than depths of the source/drain regions, and a second conductivity type threshold voltage control region having an impurity concentration of more than 1.times.10.sup.17 /cm.sup.3 beneath the channel layer.

Abstract: In one form of the invention, a method is disclosed for removing portions of successive layers of GaAs 34 and GaInP 32 comprising the steps of: performing an anisotropic reactive ion etch on the GaAs layer; and performing an isotropic wet etch on the GaInP layer, whereby a mesa formed as a result of the reactive ion etch and the wet etch has substantially vertical sidewalls, and further whereby GaInP/GaAs structures having dimensions of less than approximately 3.0 .mu.m may be fabricated.

Abstract: A multi-layer type semiconductor device is disclosed, in which a plurality of semiconductor layers are formed in vertically opposite directions. The multi-layer type semiconductor device is obtained by forming a first semiconductor layer, an insulating layer and a second semiconductor layer in the mentioned order on a main surface of a first substrate, forming a semiconductor device by using the second semiconductor layer as a base, with an exposed surface thereof directed upward, forming an insulating film on the semiconductor device, attaching a second substrate to the insulating film, thinning the first substrate to expose the first semiconductor layer, and forming a further semiconductor device by using the first semiconductor layer as a base, with an exposed surface of the first semiconductor layer directed upward.

Abstract: The present invention is a method for fabricating a multiple beam semiconductor laser, wherein the laser includes first and second semiconductor laser dies respectively affixed to a pair of supporting heatsinks. The method utilizes a laminating process to accurately position the supporting heatsinks relative to one another yet on opposite sides of an intermediate spacer to form a sandwich-like element. After permanently affixing the sandwich-like element to a base plate, the intermediate spacer is dissolved or otherwise removed to expose the mounting surfaces for the laser dies. The method not only enables the accurate placement of the heatsinks relative to one another so as to reduce the positional error, but also eliminates the need for subsequent multiple-step laser beam alignment operations.

Abstract: To improve the characteristics of oxides and other insulators formed by conventional techniques, particularly to improve its density, relative dielectric constant, resistance to acid, resistance to reduction and other characteristics, and to provide solid state devices or socharacteristics, the surfaces of the silicon oxide insulator, or the like, is irradiated with electrically neutral particles.

Abstract: A method for planarizing the surface of a semiconductor device which employs spin on glass (SOG) and an etching operation to remove high portions of the SOG prior to a chemical metal polish (CMP) operation. The SOG is baked and cured before etching. Additional layers of SOG and etching operations may be employed as necessary. A thick encapsulating oxide layer is deposited over the SOG layer. For surface irregularities caused by metal lines, an insulating layer may be deposited over the surface before the SOG. Where an additional metal line is to be deposited on the surface, an additional insulating layer is deposited after the CMP operation. In the case of metal lines made of aluminum, provision is also made for preventing Hillock formations on the metal lines.

Abstract: A method for fabricating an AlGaInP semiconductor light emitting device having a substrate and a multilayer structure including an AlGaInP first semiconductor layer formed on the substrate. The method comprises the steps of removing part of the multilayer structure so that the first semiconductor layer is exposed, irradiating with plasma beams an oxide film formed on the exposed first semiconductor layer with the substrate temperature being kept at 500.degree. C. or less, so as to remove the oxide film from the first semiconductor layer and growing a second semiconductor layer on the first semiconductor layer.

Abstract: The present invention provides a method of forming a semiconductor device mprising the steps of:forming a glass block of an acid inert glass having acid etchable glass rods extending therethrough, the acid etchable glass rods having an average diameter of less than 1 micron;partially etching one end of the acid etchable rods surface of the glass block to form cavities in the glass block on one surface thereof having an average diameter of less than 1 micron;depositing material(s) in the cavities to form a semiconductor device.The present invention also provides a method for forming a semiconductor device in which the acid etchable glass rods are completely etched and the deposition material(s) is deposited to fill the nanochannels formed by the etching.The present invention also provides semiconductor devices made by these methods.

Abstract: A process for preparing a polycrystalline semiconductor thin film transistor wherein a non-singlecrystalline semiconductor formed on a transparent insulating substrate is annealed by laser beams, such process comprising forming a gate insulation layer and a gate electrode on the non-singlecrystalline semiconductor; implanting impurity ions into a source-drain region of the semiconductor wherein the gate electrode is used as a mask, and irradiating laser beams from the rear surface side of the transparent insulating substrate to thereby polycrystallize the non-singlecrystalline semiconductor under the gate electrode or improve the crystallinity of the semiconductor without causing the non-singlecrystalline semiconductor in a completely molten state.