Patents Examined by Linda J. Fleck
  • Patent number: 5418183
    Abstract: A method for forming a reflective digitally tunable laser using selective area epitaxy is disclosed. The laser comprises passive waveguides and a plurality of optical amplifiers. The waveguides and optical amplifiers are formed by depositing multiple quantum wells having a suitable bandgap. According to the method, the multiple quantum wells forming both the passive waveguides and the optical amplifiers are deposited simultaneously using a dielectric mask. The mask comprises dual, rectangularly-shaped strips of dielectric material, spaced to form a gap. The multiple quantum wells grown in the gap are suitable for use as optical amplifiers, and those grown outside of the gap are suitable for use as passive waveguides.
    Type: Grant
    Filed: September 19, 1994
    Date of Patent: May 23, 1995
    Assignee: AT&T Corp.
    Inventors: Charles H. Joyner, Judith P. Meester, Martin Zirngibl
  • Patent number: 5416044
    Abstract: A method for producing a surface-emitting laser, includes the steps of: forming a mask pattern to define a top mirror on a semiconductor substrate, the semiconductor substrate having a first semiconductor multilayer formed on the semiconductor substrate, a second semiconductor multilayer formed on the first semiconductor multilayer, and a third semiconductor multilayer formed on the second semiconductor multilayer, the first semiconductor multilayer constituting a bottom mirror, the second semiconductor layer including an upper barrier layer and a lower barrier layer, and an active layer sandwiched between the upper and lower barrier layers, the third semiconductor multilayer constituting a top mirror; forming the top mirror by partially removing the third semiconductor layer by dry etching using the mask pattern as a mask until the surface of the upper barrier layer of the second semiconductor multilayer is exposed; forming an etching protective film at least on the side of the top mirror; partially removing
    Type: Grant
    Filed: March 11, 1994
    Date of Patent: May 16, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Kenichi Matsuda
  • Patent number: 5413956
    Abstract: A method for producing a semiconductor laser device includes the steps of: forming window layers on either one of a top surface of an internal structure or a reverse surface of a substrate and on light-emitting end facets of the internal structure; forming a reflection film on the light-emitting end facets; removing the window layer formed on either one of the top surface or the reverse surface by using an etchant which hardly etches the reflection film; and forming electrodes on the surface from which the window layer is removed by etching and on the other surface. Another method for producing a semiconductor laser device includes the steps of: forming window layers on light-emitting end facets of the bars; inserting the bars into an apparatus having openings for forming electrodes and a supporting portion for preventing a positional shift between the bars and the openings, and forming the electrodes on the top surfaces and the reverse surfaces of the bars; and cutting the bars into the chips.
    Type: Grant
    Filed: December 22, 1992
    Date of Patent: May 9, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masanori Watanabe, Ken Ohbayashi, Kazuaki Sasaki, Osamu Yamamoto, Mitsuhiro Matsumoto
  • Patent number: 5409857
    Abstract: An integrated circuit is formed thereof a conductive wiring pattern. On the conductive wiring semiconductor layer is directly formed in a form of amorphous on the substrate. The amorphous semiconductor layer is annealed to form a polycrystalline structure while avoiding influence of annealing heat for the substrate. In the polycrystalline semiconductor layer is formed a semiconductor element, such as MOS transistor, MIS transistor, TFT and so forth. The semiconductor element is directly connected to the wiring pattern on the substrate.
    Type: Grant
    Filed: September 7, 1989
    Date of Patent: April 25, 1995
    Assignee: Sony Corporation
    Inventors: Seiichi Watanabe, Setsuo Usui
  • Patent number: 5404835
    Abstract: A method of growing a large single crystalline diamond film, in which a nickel substrate is disposed within a diamond growth chamber. After air has been evacuated from the chamber and the substrate has been heated to a temperature exceeding 1145 Celsius, atomic hydrogen is continuously generated from hydrogen gas supplied to the chamber and accelerated toward the substrate, implanting hydrogen atoms in the top substrate surface and converting it to a liquid film of nickel hydride. Then one of two layers of diamond particles of two to three nanometer cross section is deposited on the liquid nickel hydride film, whereby the diamond particles arrange themselves on the liquid nickel hydride film to their lowest free energy state, forming a nascent contiguous single-crystalline diamond film. Thereafter diamond is homoepitaxially grown on the nascent contiguous single-crystalline diamond film to the desired thickness.
    Type: Grant
    Filed: November 8, 1994
    Date of Patent: April 11, 1995
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Max N. Yoder
  • Patent number: 5405803
    Abstract: In a semiconductor device and a method of manufacturing the same according to the present invention, after As and C are introduced to a semiconductor substrate, a semiconductor layer is formed on the semiconductor substrate. When first and second semiconductor layers are to be sequentially formed on a semiconductor substrate, an impurity concentration of As or Sb serving as an impurity of the first semiconductor layer is 10 times or more an impurity concentration of the second semiconductor layer, and the second semiconductor layer has a thickness of 4 to 10 .mu.m.
    Type: Grant
    Filed: September 21, 1993
    Date of Patent: April 11, 1995
    Assignee: Sony Corporation
    Inventor: Takahisa Kusaka
  • Patent number: 5401356
    Abstract: The amount of dust particles deposited on a semiconductor wafer during plasma etching or CVD in manufacturing a semiconductor integrated circuit is decreased by second plasma generating electrode 28 disposed around a lower electrode 15 in a plasma etching chamber 4a. High frequency voltage is applied to the second plasma generating electrode 18 just before the stop of plasma discharge to form a sub-plasma of high density along the outer periphery of the lower electrode 15, there is formed a sub-potential distribution acting to push out negatively charged dust particles stagnating near the main surface of a semiconductor substrate 7 toward the outer periphery of the wafer. The negatively charged dust particles thus pushed out from the vicinity of the main surface of the wafer 7 are moved to the second plasma generating electrode 28 and exhausted by a vacuum pump through an exhaust port 25.
    Type: Grant
    Filed: July 31, 1992
    Date of Patent: March 28, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Hiromichi Enami, Kiyomi Yagi, Masanori Katsuyama, Akihiko Konno
  • Patent number: 5400739
    Abstract: A molecular beam epitaxy (MBE) system (10) is provided to grow thin film, epitaxy layers (44, 46, 48, 50) on compound semiconductor substrates (40). A mass spectrometer detector (95) is used to monitor and control the flux from selected sources (21, 23, 25, 27) within the MBE system (10). A uniform layer of indium gallium arsenide (46, 50) may be grown on a semiconductor substrate (40) by controlling the indium flux with respect to substrate (40) temperature and time. An epitaxy layer (46) of indium gallium arsenide with uniform mole fraction concentration and reduced lattice strain is produced.
    Type: Grant
    Filed: October 9, 1992
    Date of Patent: March 28, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Yung-Chung Kao, Francis G. Celii
  • Patent number: 5399523
    Abstract: In a method for rapid thermal processing of a semiconductor wafer by electromagnetic irradiation, an irradiation arrangement is provided for heating the semiconductor wafer which is surrounded by a quartz chamber. The irradiation arrangement has a reflector design and is employed such that the semiconductor wafer is irradiated so that a substantially identical temperature is achieved in a middle and in an edge region on the basis of an intensity distribution of the light and of the heat emission of the semiconductor wafer, each of which is respectively uniform by itself over the semiconductor wafer. The method serves the purpose of improving rapid thermal processing methods in the manufacture of integrated semiconductor circuits.
    Type: Grant
    Filed: July 7, 1994
    Date of Patent: March 21, 1995
    Assignee: Siemens Aktiengesellscaft
    Inventor: Ronald Kakoschke
  • Patent number: 5397739
    Abstract: We report a method for accurate growth of vertical-cavity surface-emitting lasers (VCSELs). The method uses a single reflectivity spectrum measurement to determine the structure of the partially completed VCSEL at a critical point of growth. This information, along with the extracted growth rates, allows imprecisions in growth parameters to be compensated for during growth of the remaining structure, which can then be completed with very accurate critical dimensions. Using this method, we can now routinely grow lasing VCSELs with Fabry-Perot cavity resonance wavelengths controlled to within 0.5%.
    Type: Grant
    Filed: July 26, 1993
    Date of Patent: March 14, 1995
    Assignee: Sandia Corporation
    Inventors: Scott A. Chalmers, Kevin P. Killeen, Kevin L. Lear
  • Patent number: 5396862
    Abstract: A compound semiconductor thin film is grown on a compound semiconductor surface, which is cleaned by irradiating the surface with gas containing at least hydrogen molecules and by efficiently removing contaminant on the surface at low temperature. A beam containing at least hydrogen molecules is irradiated from a plasma generating room attached to a MBE chamber, and cleans the surface of a compound semiconductor at low temperature. By an additional mechanism attached to the MBE chamber, a compound semiconductor thin film of high quality is grown on the cleaned surface of the compound semiconductor.
    Type: Grant
    Filed: November 15, 1993
    Date of Patent: March 14, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Okawa, Shigeo Hayashi, Takeshi Karasawa, Tsuneo Mitsuyu
  • Patent number: 5397740
    Abstract: First and second junctions are set so as to control electric fields applied to an active layer, independent from each other, and the electric field applied by the first junction controls exciting conditions while the electric field applied by the second junction drives the active layer so as to simplify a drive circuit for an optical semiconductor device.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: March 14, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yukio Toyoda, Shinichi Wakabayashi, Hitomaro Tougou
  • Patent number: 5395792
    Abstract: There is provided a process for fabricating a highly reliable semiconductor laser device operable at a low current with an increased yield, which process includes the steps of: (a) forming a lower clad layer on a semiconductor substrate; (b) forming an active layer of a material larger in refractive index and smaller in forbidden band width than the lower clad layer; (c) forming a first upper clad layer of a material smaller in refractive index and larger in forbidden band width than the active layer; (d) forming an etch stop layer made of GaAs on the first upper clad layer; (e) forming a current-blocking layer of a material smaller in refractive index and larger in forbidden band width than the first upper clad layer; (f) forming a stripe cavity by etching at least a portion of the current-blocking layer down to the etch stop layer; (g) evaporating the etch stop layer remaining in the stripe cavity; (h) forming a second upper clad layer of a material smaller in refractive index and larger in forbidden band w
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: March 7, 1995
    Assignee: Rohm Co., Ltd.
    Inventors: Katsuhiko Ikawa, Hiroshi Matagi
  • Patent number: 5393707
    Abstract: Cleavage of a semiconductor slice is initiated at a peck-mark formed in the upper surface at one edge of the slice by bending the slice over a cutting edge of a semiconductor slice dicing wheel. The cleave is propagated to the far edge of the slice by relative sliding movement of the wheel across the underside of the slice.
    Type: Grant
    Filed: July 19, 1993
    Date of Patent: February 28, 1995
    Assignee: Northern Telecom Limited
    Inventor: Kevin Canning
  • Patent number: 5388548
    Abstract: A method of fabricating a plurality of optoelectronic components on a semiconductor substrate, each optoelectronic component comprising several layers grown in a reactor. Every layer is being grown under a predetermined individual pressure. The active layers of all the components are lying substantially at the same height. Control of the pressure in the reactor during growth allows the thickness of the layer grown to be constant or to vary over the substrate area.
    Type: Grant
    Filed: April 11, 1994
    Date of Patent: February 14, 1995
    Assignee: Interuniversitair Micro-Elektronica VZW
    Inventors: Geert F. M. Coudenys, Piet P. A. R. Demeester
  • Patent number: 5389571
    Abstract: Disclosed are a gallium nitride type semiconductor device that has a single crystal of (Ga.sub.1-x Al.sub.x).sub.1-y In.sub.y N, which suppresses the occurrence of crystal defects and thus has very high crystallization and considerably excellent flatness, and a method of fabricating the same. The gallium nitride type semiconductor device comprises a silicon substrate, an intermediate layer consisting of a compound containing at least aluminum and nitrogen and formed on the silicon substrate, and a crystal layer of (Ga.sub.1-x Al.sub.x).sub.1-y In.sub.y N (0.ltoreq.x.gtoreq.1, 0.ltoreq.y.ltoreq.1, excluding the case of x=1 and y=0). According to the method of fabricating a gallium nitride base semiconductor device, a silicon single crystal substrate is kept at a temperature of 400.degree. to 1300.degree. C.
    Type: Grant
    Filed: April 16, 1993
    Date of Patent: February 14, 1995
    Assignees: Hiroshi Amano, Isamu Akasaki, Pioneer Electronic Corporation, Toyoda Gosei Co., Ltd.
    Inventors: Tetsuya Takeuchi, Hiroshi Amano, Isamu Akasaki, Atsushi Watanabe, Katsuhide Manabe
  • Patent number: 5387543
    Abstract: A VCSEL including a first mirror stack, an active region and a second mirror stack positioned on a substrate having a surface lying in a first plane and a centrally located offset area of the surface lying in a second plane parallel to the first plane and spaced therefrom. Portions of the active region and the first and second mirror stacks being offset from surrounding portions by the offset area in the surface of the substrate so as to define a lateral waveguide which confines the operating region of the VCSEL.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: February 7, 1995
    Assignee: Motorola, Inc.
    Inventor: Donald E. Ackley
  • Patent number: 5382543
    Abstract: In a method of manufacturing a semiconductor device, first strip dielectrics (33) and surfaces (35) were formed by taking first strip parts (31) of a dielectric layer (29) away from a principal surface (13) of a semiconductor substrate (11) in parallel by using a photo-lithography method. Active regions (43) were formed on the first strip surfaces (35) by using a metal organic vapor phase epitaxy method to be covered with lattice planes each of which is (111)B. Second strip dielectrics (35) and surfaces (47) were formed by taking second strip parts (31a) of the first strip dielectrics (31) away from the principal surface (13) with the second strip surfaces (47) positioned between the active regions (43) and the second strip dielectrics (45). Current block regions (57) were formed on the second strip surfaces (47) and the active regions (43) by using the metal organic vapor phase epitaxy method.
    Type: Grant
    Filed: July 22, 1993
    Date of Patent: January 17, 1995
    Assignee: NEC Corporation
    Inventors: Takahiro Nakamura, Tomoji Terakado
  • Patent number: 5378317
    Abstract: The method for removing organic film according to the present invention is very effective for removing a photo resist film in a process for manufacturing semiconductor device. A substrate (32) having a photo resist film (31) formed on it is processed in a wet processing tank (34) filled with a processing solution such as a mixed solution containing sulfuric acid and hydrogen peroxide or by a dry processing using oxygen plasma. Then, it is processed in an ozone processing tank (34) filled with a solution where ozone or ozone water has been infused, and the organic film is removed.
    Type: Grant
    Filed: August 23, 1993
    Date of Patent: January 3, 1995
    Assignee: Chlorine Engineers Corp., Ltd.
    Inventors: Masaharu Kashiwase, Terumi Matsuoka
  • Patent number: 5376582
    Abstract: A planar, topology free, semiconductor quantum-well laser is described. The quantum-well active layer is formed and patterned in a specified region which is constrained on all sides by high bandgaps which are formed through the use of impurity-free diffusion techniques. After the impurity-free diffusion has taken place, an upper portion is then epitaxially deposited to complete the structure. High-power, single fundamental mode laser operation is achieved by funneling current into the constrained quantum-well active region, high bandgap regions in conjunction with low index of refraction in regions surrounding the active area.The structure is further designed to allow low beam divergence in the direction perpendicular to the semiconductor laser junction.
    Type: Grant
    Filed: October 15, 1993
    Date of Patent: December 27, 1994
    Assignee: International Business Machines Corporation
    Inventors: Abbas Behfar-Rad, Christoph S. Harder, Heinz P. Meier