Patents Examined by Long K. Tran
  • Patent number: 10305064
    Abstract: A flexible organic light emitting diode display and a manufacturing method are provided. The method includes steps of forming an active array layer and an organic light emitting display layer sequentially on a flexible substrate, forming a protective layer on the organic light emitting display layer, forming an organic layer on the protective layer, wherein a cross section of the organic layer is trapezoidal, and forming an inorganic layer on the organic layer.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: May 28, 2019
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jiangjiang Jin, Bokun Su, Hsiang-lun Hsu
  • Patent number: 10297592
    Abstract: Monolithic 3D ICs employing one or more local inter-level interconnect integrated intimately with at least one structure of at least one transistor on at least one transistor level within the 3D IC. In certain embodiments the local inter-level interconnect intersects a gate electrode or a source/drain region of at least one transistor and extends through at least one inter-level dielectric layer disposed between a first and second transistor level in the 3D IC. Local inter-level interconnects may advantageously make a direct vertical connection between transistors in different levels of the 3D IC without being routed laterally around the footprint (i.e., lateral, or planar, area) of either the overlying or underlying transistor level that is interconnected.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: May 21, 2019
    Assignee: Intel Corporation
    Inventors: Patrick Morrow, Kimin Jun, M. Clair Webb, Donald W. Nelson
  • Patent number: 10297788
    Abstract: A light emitting apparatus (10) includes a substrate (100), an insulating layer (160), a light emitting element (102), a coating film (140), and a structure (150). The insulating layer (160) is formed over one surface of the substrate (100), and includes an opening (162). The light emitting element (102) is formed in the opening (162). The coating film (140) is formed over the one surface of the substrate (100), and covers a portion of the light emitting element (102), the insulating layer (160), and the one surface of the substrate (100). The coating film (140) does not cover another portion of the substrate (100) (for example, a portion of an end portion: hereinafter, referred to as a first portion). The structure (150) is located between the first portion of the substrate (100) and the insulating layer (160). The coating film (140) also covers the insulating layer (160).
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: May 21, 2019
    Assignees: PIONEER CORPORATION, TOHOKU PIONEER CORPORATION
    Inventors: Koji Fujita, Shinsuke Tanaka, Yuji Saito, Shinji Nakajima
  • Patent number: 10283451
    Abstract: A semiconductor device includes a plurality of line patterns formed apart from one another on a substrate, the plurality of line patterns having a first width and extending parallel to one another in a first direction. A first line pattern of the plurality of line patterns may include a wider portion having a second width in a second direction perpendicular to the first direction that is greater than the first width. One or more second line patterns may be located adjacent to the first line pattern and include a conformal portion conformally formed about the wider portion of the first line pattern. One or more third line patterns may be located adjacent to the second line pattern and include an end portion near the conformal portion of the one or more second line pattern.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: May 7, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-hoon Kim, Woo-sung Yang, Jee-hoon Hwang
  • Patent number: 10276735
    Abstract: A semiconductor nanocrystal include a first I-III-VI semiconductor material and have a luminescence quantum yield of at least 10%, at least 20%, or at least 30%. The nanocrystal can be substantially free of toxic elements. Populations of the nanocrystals can have an emission FWHM of no greater than 0.35 eV.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: April 30, 2019
    Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Peter Matthew Allen, Moungi G. Bawendi
  • Patent number: 10276641
    Abstract: The disclosure discloses a display panel and a display device. Since at least a part of the transparent areas includes the transparent auxiliary electrode electrically connected with the cathode in the adjacent pixel display area and extends to a top of the cathode auxiliary wire to be electrically connected with the cathode auxiliary wire, i.e., the cathode is electrically connected with the cathode auxiliary wire via the transparent auxiliary electrode, resistance of the cathode is reduced by the use of the transparent auxiliary electrode. Furthermore, since the transparent auxiliary electrode is arranged in a transparent area, neither the size of the at least one pixel display area is reduced, nor the transparent function of the transparent areas is affected.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 30, 2019
    Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventor: Junhui Lou
  • Patent number: 10269971
    Abstract: Semiconductor devices and fin field effect transistors (FinFETs) are disclosed. In some embodiments, a representative semiconductor device includes a group III material over a substrate, the group III material comprising a thickness of about 2 monolayers or less, and a group III-V material over the group III material.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Martin Christopher Holland
  • Patent number: 10269935
    Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (PET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Gin-Chen Huang, Tzu-Hsiang Hsu, Chia-Jung Hsu, Feng-Cheng Yang, Teng-Chun Tsai
  • Patent number: 10269709
    Abstract: A semiconductor device includes a substrate including a cell area, a first contact area, and a second contact area; a lower stacked structure extending over the second contact area from the cell area; an upper stacked structure extending over the first contact area from the cell area, the upper stacked structure leaving the second contact area open; N (N is a natural number of 2 or more) first group of stepped grooves penetrating at least one portion of the upper stacked structure in the first contact area; and M (M is a natural number equal to or smaller than N) second group of stepped grooves penetrating at least one portion of the lower stacked structure in the second contact area.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: April 23, 2019
    Assignee: SK hynix Inc.
    Inventor: Nam Jae Lee
  • Patent number: 10267661
    Abstract: This disclosure relates to determining a context of a mobile device. A processor receives from one or more first sensors first sensor data in relation to the context. The processor then selects from multiple second sensors one or more selected sensors based on the first sensor data and based on an energy cost value associated with each of the multiple second sensors, the energy cost value being indicative of energy consumed when requesting data from each of the multiple second sensors. Next, the processor receives from the one or more selected sensors second sensor data and determines the context of the mobile device based on the first sensor data and the second sensor data. This reduces the overall energy consumption and therefore extends the battery life of the mobile device while still providing an accurate context determination.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: April 23, 2019
    Assignee: INCOMING PTY LTD
    Inventors: Maximilian Ott, Lars Henrik Petander
  • Patent number: 10269780
    Abstract: The invention relates to a device for image representation comprising a carrier body, on which are arranged individually driveable luminous bodies connected respectively to a drive unit, wherein the carrier body has a first electrically conductive layer facing the luminous bodies, a second electrically conductive layer facing away from the luminous bodies, and a light-guiding layer for guiding light signals, said light-guiding layer being arranged between the first electrically conductive layer and the second electrically conductive layer, wherein the drive units are connected to the light-guiding layer via light-detecting connections, wherein first electrical connections for connecting the drive units to the first electrically conductive layer and second electrical connections for connecting the drive units to the second electrically conductive layer are provided, wherein the drive units are designed for driving the luminous bodies depending on light signals fed into the light-guiding layer.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: April 23, 2019
    Assignee: TFFI GMBH & CO KG
    Inventor: Sebastian Mayer
  • Patent number: 10256333
    Abstract: The embodiments of the present invention disclose a high electron mobility transistor, comprising: a substrate; a channel layer located on the substrate; a barrier layer located on the channel layer; a source electrode, a drain electrode, and a schottky gate electrode located between the source electrode and the drain electrode, all located on the barrier layer; and at least one semiconductor field ring located on the barrier layer and between the schottky gate electrode and the drain electrode. In the embodiments of the present invention, a concentration of two-dimensional electron gas at an interface between a barrier layer and a channel layer can be adjusted. Therefore, the concentration effect of the electric field at an edge of a gate is effectively improved, and the breakdown voltage of high electron mobility transistors is increased.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: April 9, 2019
    Assignee: GPOWER SEMICONDUCTOR, INC.
    Inventor: Yi Pei
  • Patent number: 10255212
    Abstract: An automatic master slave system and approach for coordinated control of a parameter, for example, a heating, ventilation and air conditioning condition, in an area of multiple spaces controlled by room controllers. Changing a layout of a zone/area in a building such as moving, adding or removing a door, increasing or splitting size of a room through movable walls, or by permanently removing partitions, changing offices to a conference room or vice versa, may occur. A size of a room may be altered within minutes, according to customer demand. For instance, rooms may be converted into a single room by removing partitions. The controllers that were controlling temperatures of the rooms independently earlier, may convert automatically into a master-slave configuration and now work together to control a larger room. If the large room is split into multiple rooms, the controllers may automatically revert to their previous configuration.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: April 9, 2019
    Assignee: Honeywell International Inc.
    Inventors: Jayaprakash Meruva, Wolfgang Schmieder, Balaji Krishnasamy, Vinay Prasad, Yongxi Zhou, Fei Chen
  • Patent number: 10256352
    Abstract: A vertical semiconductor transistor and a method of forming the same. A vertical semiconductor transistor has at least one semiconductor region, a source, and at least one gate region. The at least one semiconductor region includes a III-nitride semiconductor material. The source is formed over the at least one semiconductor region. The at least one gate region is formed around at least a portion of the at least one semiconductor region.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: April 9, 2019
    Assignee: Massachusetts Institute of Technology
    Inventors: Min Sun, Tomas Apostol Palacios
  • Patent number: 10243032
    Abstract: A selection transistor and a light-emitting transistor are formed in a pixel. The selection transistor includes a gate electrode connected to a scan line, a first source/drain electrode connected to a signal line, and a second source/drain electrode. The light-emitting transistor includes a gate electrode connected to the second source/drain electrode of the selection transistor, a first electrode connected to a first line, a second electrode connected to a second line, and a channel layer including quantum dots. The light-emitting transistor controls the quantum dots to emit light by a carrier flowing through the channel layer.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: March 26, 2019
    Assignee: Japan Display Inc.
    Inventor: Toshihiro Sato
  • Patent number: 10217957
    Abstract: An organic EL display device includes: a first support member having flexibility; an organic EL layer layered in a matrix form on the first support member; and a second support member disposed opposite the first support member with the organic EL layer interposed between the first support member and the second support member. Grooves on the first support member and grooves on the second support member overlap with one another. As a result, flexibility of the organic EL display device can be enhanced.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: February 26, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Sonoda, Takashi Ochi, Hisao Ochi, Tohru Senoo, Takeshi Hirase, Akihiro Matsui, Jumpei Takahashi
  • Patent number: 10215554
    Abstract: Disclosed are an apparatus and a method for non-contact sample analysis using terahertz waves. The apparatus includes an emission unit radiating terahertz waves onto a sample provided with a conductive material layer, and a receiving unit receiving terahertz waves reflected from the sample or terahertz waves passing through the sample.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: February 26, 2019
    Assignee: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
    Inventors: Hak-Sung Kim, Wan-Ho Chung, Sung-Hyeon Park, Dong-Hyun Kim
  • Patent number: 10217673
    Abstract: Embodiments of the present disclosure are directed toward an integrated circuit (IC) die. In embodiments, an IC die may include a semiconductor substrate and a buffer layer disposed over the semiconductor substrate. The buffer layer may have a plurality of openings formed therein. In embodiments, the IC die may further include a plurality of group III-Nitride structures. Individual group III-Nitride structures of the plurality of group III-Nitride structures may include a lower portion disposed in a respective opening of the plurality of openings and an upper portion disposed over the respective opening. In embodiments, the upper portion may include a base extending radially from sidewalls of the respective opening over a surface of the buffer layer to form a perimeter around the respective opening. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: February 26, 2019
    Assignee: Intel Corporation
    Inventors: Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung, Robert S. Chau, Ravi Pillarisetty
  • Patent number: 10217931
    Abstract: Provided is a magnetic element which can generate a skyrmion by a stacked film including a magnetic layer and a non-magnetic layer, and a skyrmion memory to which the magnetic element is applied and the like. Provided is a magnetic element for generating a skyrmion, the magnetic element comprising a two-dimensional stacked film, wherein the two-dimensional stacked film is at least one or more multiple layered films including a magnetic film and a non-magnetic film stacked on the magnetic film. Also, provided is a skyrmion memory including a plurality of the magnetic elements stacked in a thickness direction.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: February 26, 2019
    Assignee: RIKEN
    Inventors: Masao Nakamura, Jobu Matsuno, Masashi Kawasaki, Yoshinori Tokura, Yoshio Kaneko
  • Patent number: 10212528
    Abstract: An acquisition system includes a processor, one or more sensors operatively coupled to the processor where the one or more sensors acquire at the ear, on the ear or within an ear canal, one or more of acceleration, blood oxygen saturation, blood pressure or heart-rate, and the one or more sensors configured to monitor a biological state or a physical motion or both for an event. The event can be a detection of a discrepancy when compared with a set of reference data by the one or more sensors or the biological state or the event can be one of a detection of an abrupt movement of a headset operatively coupled to the processor, a change in location of an earpiece operatively coupled the processor, a touching of the headset, a recognizing of a voice command, a starting or ending of a phone call, or a scheduled time.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: February 19, 2019
    Assignee: Staton Techiya, LLC
    Inventor: Steven W Goldstein