Abstract: Provided is a method of manufacturing a patterned substrate. The method may be applied to a process of manufacturing a device such as an electronic device or integrated circuit, or another use, for example, to manufacture an integrated optical system, a guidance and detection pattern of a magnetic domain memory, a flat panel display, a LCD, a thin film magnetic head or an organic light emitting diode, and used to construct a pattern on a surface to be used to manufacture a discrete tract medium such as an integrated circuit, a bit-patterned medium and/or a magnetic storage device such as a hard drive.

Abstract: An embodiment of the present invention relates to a CMP polishing liquid used for polishing a polishing target surface having at least a cobalt-containing portion and a metal-containing portion that contains a metal other than cobalt, wherein the CMP polishing liquid contains polishing particles, a metal corrosion inhibitor and water, and has a pH of 4.0 or less, and when the corrosion potential EA of cobalt and the corrosion potential EB of the metal are measured in the CMP polishing liquid, the absolute value of the corrosion potential difference EA?EB between the corrosion potential EA and the corrosion potential EB is 0˜300 mV.

Abstract: There is provided a plasma etching method for etching a base film by a plasma using a photoresist as a mask. The method includes etching the base film by the plasma, under a first processing condition in which a selectivity of the photoresist to the base film is set to a first selectivity, while using as a mask the photoresist formed in a predetermined pattern by exposure and development and a scum remaining in the photoresist, without performing a process of removing the scum; and switching, during the etching of the base film, the first processing condition to a second processing condition in which the selectivity of the photoresist to the base film is set to a second selectivity lower than the first selectivity and further etching the base film by a plasma while using the photoresist as a mask under the second processing condition.

Abstract: In some embodiments, a method of a semiconductor process includes conformally forming a spacer layer over a plurality of mandrels that are disposed over a mask layer, portions of the spacer layer disposed over opposing sidewalls of adjacent ones of the plurality of mandrels defining trenches therebetween, filling the trenches with a dummy material, and removing first portions of the dummy material in the trenches, thereby forming a plurality of openings in the dummy material. The method further includes filling the plurality of openings with a first material, removing a remaining portion of the dummy material in the trenches, and removing the plurality of mandrels after the removing the dummy material.

Abstract: Methods and apparatus for laterally etching unwanted material from the sidewalls of a recessed feature are described herein. In various embodiments, the method involves etching a portion of the sidewalls, depositing a protective film over a portion of the sidewalls, and cycling the etching and deposition operations until the unwanted material is removed from the entire depth of the recessed feature. Each etching and deposition operation may target a particular depth along the sidewalls of the feature. In some cases, the unwanted material is removed from the bottom of the feature up, and in other cases the unwanted material is removed from the top of the feature down. Some combination of these may also be used.

Abstract: A method includes patterning a resist layer formed over a substrate, resulting in a resist pattern; and transferring the resist pattern to an anti-reflection coating (ARC) layer formed under the resist layer and over the substrate, resulting in a patterned ARC layer. The method further includes treating the patterned ARC layer with an ion beam, resulting in a treated patterned ARC layer, wherein the ion beam is generated with a first gas and is directed towards the patterned ARC layer at a tilt angle at least 10 degrees. The method further includes etching the substrate with the treated patterned ARC layer as an etch mask.

Abstract: A method of making a pine shaped metal nano-scaled grating, the method including: forming a first metal layer on a substrate, forming an isolation layer on the first metal layer, and locating a second metal layer on the isolation layer; placing a first mask layer on the second metal layer, wherein the first mask layer comprises a body, and the body defines a plurality of openings parallel with and spaced apart from each other; etching the first mask layer and the second metal layer to obtain a plurality of triangular prism structures; etching the isolation layer to obtain a plurality of second rectangular structures using the plurality of triangular prism structures as a first mask; and etching the first metal layer to obtain a plurality of first rectangular structures using the plurality of second rectangular structures as a second mask.

Abstract: Provided is a method of forming a spacer sidewall mask, the method comprising: providing a substrate in a process chamber, the substrate having a carbon mandrel pattern and an underlying layer, the underlying layer comprising an amorphous silicon layer above a silicon nitride layer; performing a breakthrough etch process including growth of a conformal native silicon oxide layer, creating an ALD patterned structure; performing a spacer sidewall sculpting process on the ALD patterned structure; performing an amorphous silicon main etch (ME) process on the ALD patterned structure, the ME process causing a spacer oxide open and carbon mandrel removal; and performing an amorphous silicon ME over etch (OE) process on the ALD spacer oxide pattern, the ME OE process transferring the ALD spacer oxide pattern into the amorphous silicon layer, generating a first sculpted pattern comprising a first sculpted sub-structure with a trapezoidal shape.

Abstract: A method for removing a metallic deposit disposed on a surface in a chamber, including the following steps: a) a step of oxidizing the metallic deposit; b) a step of injecting chemical species adapted to volatilized the oxidized metallic deposit, the step b) being implemented during at least a part of step a); and in step b), the chemical species are injected according to a sequence of pulses.

Abstract: A method for etching features in an OMOM stack with first layer of silicon oxide, a second layer of a metal containing material over the first layer, a third layer of silicon oxide over the second layer, and a fourth layer of a metal containing material over the third layer is provided. A hardmask is formed over the stack. The hardmask is patterned. The OMOM stack is etched through the hardmask.

Abstract: An etching method according to an embodiment includes supplying an etchant containing hydrofluoric acid, an oxidizer, and a buffer to a semiconductor substrate including a first region covered with a metal layer made of one or more metals other than noble metals, and a second region covered with a catalyst layer made of a noble metal, such that the etchant comes in contact with the catalyst layer and the metal layer, thereby etching the semiconductor substrate at a position of the catalyst layer.

Abstract: Chemical mechanical polishing (CMP) compositions, methods and systems for polish cobalt or cobalt-containing substrates are provided. Dual, or at least two chelators were used in the CMP polishing compositions as complexing agents for achieving the unique synergetic effects to afford high, tunable Co removal rates and with low static etch rates on Co film surface for the efficient Co corrosion protection during CMP process. The cobalt chemical mechanical polishing compositions also provide very high selectivity of Co film vs. other barrier layers, such as Ta, TaN, Ti, and TiN, and dielectric film, such as TEOS, SiNx, low-k, and ultra low-k films.

Abstract: Electronic flat panel displays (FPDs) including liquid crystal displays (LCDs) may be resized to meet custom size requirements for applications in aerospace and elsewhere. During the resizing process, pixel line defects may occur in the image due to electrical short circuits at the resized cut edge. Methods for repairing such short circuits are described, including use of mechanical, electrical, chemical, thermal, and/or other methods, and any combination thereof, to open the short circuits. The methods may be applied to the sealed cut edge to ruggedize the seal, even if image defects are not exhibited initially. The repaired short circuits may be stress tested to ensure the defects will not recur during the life of the display, and the repaired areas may be resealed.

Abstract: According to the present invention, a dry-etching method for performing plasma etching in a vertical profile while maintaining selectivity relative to a mask, includes: a first process of etching a film to be etched with use of reactive gas to cause an etching profile of the film to be etched to be formed in a footing profile; and a second process of, after the first process, causing the footing profile to be formed in a vertical profile by means of sputtering etching.

Abstract: The method for treatment of parts, characterized in that it comprises the stages of applying an electrolytic chromium plating layer on a part; applying a coating over the entire outer surface of the part; selective stripping of the coating in order to leave the part with at least one coated portion and at least one uncoated portion; carrying out a selective etching on the layer in at least one part of the uncoated portion; metallization of the entire surface of the part; and removal of the coating.

Abstract: A process for chemical mechanical polishing a substrate containing cobalt and TiN to at least improve cobalt: TiN removal rate selectivity. The process includes providing a substrate containing cobalt and TiN; providing a polishing composition, containing, as initial components: water; an oxidizing agent; alanine or salts thereof; and, colloidal silica abrasives with diameters of ?25 nm; and, providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the polishing composition onto the polishing surface at or near the interface between the polishing pad and the substrate; wherein some of the cobalt is polished away such that there is an improvement in the cobalt: TiN removal rate selectivity.

Abstract: In a mask pattern forming method, a resist film is formed over a thin film, the resist film is processed into resist patterns having a predetermined pitch by photolithography, slimming of the resist patterns is performed, and an oxide film is formed on the thin film and the resist patterns after an end of the slimming step in a film deposition apparatus by supplying a source gas and an oxygen radical or an oxygen-containing gas. In the mask pattern forming method, the slimming and the oxide film forming are continuously performed in the film deposition apparatus.

Abstract: A method for forming a semiconductor device in a plasma processing chamber is provided. An atomic layer etch selectively etches SiO with respect to SiN and deposits a fluorinated polymer. The fluorinated polymer layer is stripped, comprising flowing a stripping gas comprising oxygen into the plasma processing chamber, forming a plasma from the stripping gas, and stopping the flow of the stripping gas. A SiN layer is selectively etched with respect to SiO and SiGe and Si.

Abstract: The present invention provides a method of fabricating a semiconductor structure. Firstly, a substrate is provided, a dense region and an isolation region are defined, next, a first dielectric layer is formed on the dense region and the isolation region, and then a plurality of first recesses are formed in the first dielectric layer within the dense region, and a second recess is formed in the first dielectric layer within the isolation region, wherein the width of the second recess is greater than three times of the width of each first recess. Afterwards, a second dielectric layer is then filled in each first recess and the second recess, wherein a top surface of the second dielectric layer within the isolation region is higher than a top surface of the second dielectric layer within the dense region. Next, an etching back process is performed, to remove the second dielectric layer.

Abstract: There are provided a polishing composition and a method for polishing capable of, when a substrate including polysilicon is polished, limiting the polishing rate of the polysilicon, and selectively polishing a silicon compound other than the polysilicon, such as silicon nitride. The polishing composition used includes abrasives, an organic acid and a conjugate base of the organic acid.