Abstract: Disclosed herein is a method of: depositing a patterned mask layer on an N-polar GaN epitaxial layer of a sapphire, silicon, or silicon carbide substrate; depositing an AlN inversion layer on the open areas; removing any remaining mask; and depositing a III-N epitaxial layer to simultaneously produce N-polar material and III-polar material. Also disclosed herein is: depositing an AlN inversion layer on an N-polar bulk III-N substrate and depositing a III-N epitaxial layer to produce III-polar material. Also disclosed herein is: depositing an inversion layer on a III-polar bulk III-N substrate and depositing a III-N epitaxial layer to produce N-polar material. Also disclosed herein is a composition having: a bulk III-N substrate; an inversion layer on portions of the substrate; and a III-N epitaxial layer on the inversion layer. The III-N epitaxial layer is of the opposite polarity of the surface of the substrate.

Abstract: An organometallic compound represented by Formula 1: M(L1)n1(L2)n2??Formula 1 wherein in Formula 1, M, L1, L2, n1, and n2 are the same as described in the specification.

Abstract: A method of forming a memory device on a substrate having memory, core and HV device areas. The method includes forming a pair of conductive layers in all three areas, forming an insulation layer over the conductive layers in all three areas (to protect the core and HV device areas), and then etching through the insulation layer and the pair of conductive layers in the memory area to form memory stacks. The method further includes forming an insulation layer over the memory stacks (to protect the memory area), removing the pair of conductive layers in the core and HV device areas, and forming conductive gates disposed over and insulated from the substrate in the core and HV device areas.

Abstract: Systems and methods are directed to an integrated circuit comprising a reduced height M1 metal line formed of an exemplary material with lower mean free path than Copper, for local routing of on-chip circuit elements of the integrated circuit, wherein the height of the reduced height M1 metal line is lower than a minimum allowed or allowable height of a conventional M1 metal line formed of Copper. The exemplary materials for forming the reduced height M1 metal line include Tungsten (W), Molybdenum (Mo), and Ruthenium (Ru), wherein these exemplary materials also exhibit lower capacitance and lower RC delays than Copper, while providing high electromigration reliability.

Abstract: A transistor with stable electrical characteristics is provided. Provided is a method for manufacturing a semiconductor device that includes, over a substrate, an oxide semiconductor, a first conductor, a first insulator, a second insulator, and a third insulator. The oxide semiconductor is over the first insulator. The second insulator is over the oxide semiconductor. The third insulator is over the second insulator. The first conductor is over the third insulator. The oxide semiconductor has a first region and a second region. To form the first region, ion implantation into the oxide semiconductor is performed using the first conductor as a mask, and then hydrogen is added to the oxide semiconductor using the first conductor as a mask.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate. The metal plug has a contact bottom surface that is substantially convex. The substantially convex contact bottom surface has an increased contact area as compared to a contact bottom surface of a metal plug that is not substantially convex. The increased contact area decreases a resistance of the metal plug. The increased contact area requires a smaller deposition amount to form a metal plug seed layer of the metal plug than a semiconductor device with a smaller contact area. A smaller deposition amount reduces an overhang of the deposited metal plug seed layer material. A reduced overhang of the deposited metal plug seed layer material reduces pitting in a metal plug formed from the deposited metal plug seed layer material.

Abstract: After forming a source/drain contact including a source/drain contact liner and a source/drain contact conductor surrounded by the source/drain contact liner to contact one of source/drain regions formed on opposite sides of a functional gate structure, vertical portions of the source/drain contact liner are recessed partially or completely to provide a cavity between the functional gate structure and the source/drain contact conductor. An etch resistant layer is deposited over the functional gate structure, each source/drain contact and each cavity to pinch off each cavity, thus forming an airgap between the functional gate structure and each source/drain contact.

Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a redistribution layer (RDL), at least one first die, a plurality of conductive terminals and solder balls, a first encapsulant, a plurality of second dies, and a second encapsulant. The RDL has a first surface and a second surface opposite to the first surface. The first die and the conductive terminals are electrically connected to the RDL and are located on the first surface of the RDL. The first encapsulant encapsulates the first die and the conductive terminals. The first encapsulant exposes part of the conductive terminals. The solder balls are electrically connected to the conductive terminals and are located over the conductive terminals exposed by the first encapsulant. The second dies are electrically connected to the RDL and are located on the second surface of the RDL. The second encapsulant encapsulates the second dies.

Abstract: An organic light emitting diode and an organic light emitting display device, the organic light emitting diode including a first electrode and a second electrode facing each other; an emission layer between the first electrode and the second electrode; and a hole transport layer between the first electrode and the emission layer, wherein the hole transport layer includes an organic material and a dipole material, the dipole material including a first component and a second component, the first component having a polarity different from that of the second component and the first component and the second component being combined with each other.

Abstract: An organic compound represented by Chemical Formula 1, an organic optoelectric device including the organic compound, and a display device are disclosed.

Abstract: A light-emitting device in which different electrodes in a work function are used in a first light-emitting element and a second light-emitting element are provided. A light-emitting device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first electrode, an EL layer, and a second electrode in this order. The second light-emitting element includes a third electrode, the EL layer, and the second electrode in this order. The EL layer includes a first light-emitting layer, a layer, and a second light-emitting layer in this order. The structure of the first light-emitting layer is different from the structure of the second light-emitting layer. The first light-emitting element and the second light-emitting element are different in a carrier-injection property.

Abstract: Embodiments of the present disclosure relate to an apparatus and a method for reducing the adverse effects of exposing portions of an integrated circuit (IC) device to various forms of radiation during one or more operations found within the IC formation processing sequence by controlling the environment surrounding and temperature of an IC device during one or more parts of the IC formation processing sequence. The provided energy may include the delivery of radiation to a surface of a formed or a partially formed IC device during a deposition, etching, inspection or post-processing process operation. In some embodiments of the disclosure, the temperature of the substrate on which the IC device is formed is controlled to a temperature that is below room temperature (e.g., <20° C.) during the one or more parts of the IC formation processing sequence.

Abstract: A method for manufacturing an array substrate is disclosed and includes steps of: sequentially forming a first metal layer, an insulating layer and a second metal layer on a glass substrate; forming a passivation layer on the second metal layer; performing a first etching process on the passivation layer to obtain a first groove and a second groove; performing a second etching process on the passivation layer to obtain a third groove; and forming a pixel electrode layer on the passivation layer. The method saves one photomask and a photolithography step, thereby reducing the cost and improving the efficiency.

Abstract: Disclosed is a thin film deposition apparatus and a method of manufacturing an organic light-emitting display apparatus by using the thin film deposition apparatus. The thin film deposition apparatus and the method of manufacturing the organic light-emitting display apparatus using the thin film deposition apparatus reduce manufacturing time and cost.

Abstract: A method for forming features of a vertical FET device, starting with a semiconductor substrate that includes fins and a horizontal surface. The fins also have a base, a top, and sidewalls. An etch process is performed to create bottom lateral recesses at the base of the fins. The method continues with growing a bottom source/drain region in the bottom recesses which forms PN junctions, and etching the fins to form top lateral recesses at the top of the fins. The method continues with growing a top source/drain region in the top recesses of the fins, therefore forming PN junctions.

Abstract: A light emitting device is discussed, and includes a first electrode; a hole transporting layer (HTL) on the first electrode; an organic light-emission layer (EML) having a red emission layer (EML) formed in a red sub pixel area Rp, a green emission layer formed in a green sub pixel area Gp, and a blue emission layer formed in a blue sub pixel area Bp; an electron transporting layer (ETL) on the red, green and blue emission layers; and a second electrode on the electron transporting layer, wherein the green emission layer includes a phosphor host material, a second phosphor host material, and a dopant material.

Abstract: A programmable cell includes a split gate structure. The split gate structure includes a thin gate dielectric region and a thick gate dielectric region disposed below a gate conductor. A thickness of the thick oxide region is more than a thickness of the thin oxide region. The programmable cell can be fabricated using angle doping to dope an area associated with the thin dielectric region.

Abstract: Disclosed is an organic light-emitting display apparatus. The organic light-emitting display apparatus includes a substrate, a first reflective electrode that is disposed over the substrate, an organic layer that is disposed over the first reflective electrode, and includes a light emission layer, and a second reflective electrode that is disposed over the organic layer. At least one of the first and second reflective electrodes comprises a low refractive layer having a refractive index of about 1.4 or less which is smaller than that of the organic layer.

Abstract: Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer.

Abstract: The present invention provides a conductive flexible substrate and a manufacture method thereof and an OLED display device and a manufacture method thereof. The conductive flexible substrate comprises a flexible substrate (1), mesh conductive lines (2) located on the flexible substrate (1) and embossing from a surface of one side of the flexible substrate (1), and a conductive layer (3) filling among the mesh conductive lines (2); a surface of one side of the flexible substrate (1) away from the mesh conductive lines (2) and the conductive layer (3) is flat. The conductive flexible substrate is capable of promoting the conductivity of the flexible substrate, and applying the conductive flexible substrate to an OLED display device can solve the issue of low conductivity of anodes in the OLED display device.