Patents Examined by Marwan Ayash
  • Patent number: 9037828
    Abstract: A method for data storage, including configuring in a data storage system a volume storage pool as data storage resources available for allocation of volumes in the data storage system. The method also includes defining a threshold value for the volume storage pool. When the allocation of the volumes causes the threshold value to be crossed, the method includes performing an action for managing the volume storage pool.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: May 19, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Haim Helman, Omri Palmon, Ofir Zohar, Lior Segev
  • Patent number: 9003110
    Abstract: Various embodiments for storing a logical object are provided. In one such embodiment, by way of example only, incoming data is divided corresponding to a logical data object into a plurality of independent streams, associating each data chunk of a plurality of obtained data chunks with a corresponding stream among the plurality of independent streams. At least one of the obtained data chunks and derivatives thereof is sequentially accommodated in accordance with an order the obtained chunks are received, while keeping the association with the corresponding streams. A global index is generated as a single meta-data stream accommodated in the logical data object and comprising information common to the plurality of independent streams and related to mapping between data in the logical data object and the obtained data chunks.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: April 7, 2015
    Assignee: International Business Machines Corporation
    Inventors: Jonathan Amit, Ori Shalev
  • Patent number: 8984215
    Abstract: Various embodiments for storing a logical object are provided. In one such embodiment, by way of example only, incoming data is divided corresponding to a logical data object into a plurality of independent streams, associating each data chunk of a plurality of obtained data chunks with a corresponding stream among the plurality of independent streams. At least one of the obtained data chunks and derivatives thereof is sequentially accommodated in accordance with an order the obtained chunks are received, while keeping the association with the corresponding streams. A global index is generated as a single meta-data stream accommodated in the logical data object and comprising information common to the plurality of independent streams and related to mapping between data in the logical data object and the obtained data chunks.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: March 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: Jonathan Amit, Ori Shalev
  • Patent number: 8959285
    Abstract: A method of servicing a command sent from a host device file system (HDFS) within a host device (HD) by a local storage device (LSD) in communication with the HD is described. The method includes receiving a first command at the LSD instructing the LSD to execute an operation on associated logical addresses. If the first command is associated with at least a first set of logical addresses, the method includes servicing the first command by the LSD at least by way of sending a second command to a device (RD) external to the LSD that instructs the RD to execute an operation on memory locations within the RD. If the first command is not associated with the first set of logical addresses, the method includes servicing the first command by the LSD only by way of operations executed by the LSD on memory locations within the LSD.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: February 17, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Alain Nochimowski, Alon Marcu, Micha Rave, Itzhak Pomerantz
  • Patent number: 8924642
    Abstract: The present invention provides a monitoring record management technology, which is used to manage a monitoring record stored in a memory, where the monitoring record is used to monitor a chunk in a storage, and by reading at least one monitoring parameter from each monitoring record in the memory, monitoring records between which a monitoring parameter meets a threshold are combined or split. After the monitoring record management technology provided in the present invention is applied, the occupancy of the memory can be reduced or the accuracy of the monitoring record can be improved.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: December 30, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Chen Wang
  • Patent number: 8924662
    Abstract: A method for controlling data flow to a pair of storage devices includes receiving at least one new entry to store in a first storage device or a second storage device in the pair of storage devices and determining a number of entries made to the first and second storage devices out of the at least one new entry. The method also includes calculating a difference between available space in the first storage device and the second storage device, and calculating a number of credits used by the at least one new entry based on the numbers of entries to the first and second storage devices and on the difference in available space.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: December 30, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Brian William Hughes
  • Patent number: 8918597
    Abstract: An integrated circuit includes an array of memory cells and a digital flag generator circuit configured to generate a data inversion flag based on whether a number of logical zero bits contained in a data word to be transmitted from the memory cells is greater than a threshold number. The digital flag generator circuit includes a first digital stage including a first plurality of binary logic circuits. Each of the binary logic circuits is configured to receive a subset of the data word.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: December 23, 2014
    Assignee: Infineon Technologies AG
    Inventors: Martin Brox, Ronny Schneider
  • Patent number: 8918601
    Abstract: Processing within a multiprocessor computer system is facilitated by: logically clearing a data page by setting, in association with invalidate page table entry or set storage key processing, a page initialize bit for the data page to a clear data value without physically clearing data from the data page; and subsequent to the setting of the page initialize bit, physically clearing data from the page in central storage responsive to a first access to the page with the page initialize bit set to the clear data value, thereby minimizing overall time required to both clear and subsequently access cleared page data. Setting of the page initialize bit may include setting a line clear bit for each page line to the clear data value, and allocating a state machine to clear each line responsive to the line being first accessed with the its line clear bit set.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventor: Gary A. Woffinden
  • Patent number: 8892839
    Abstract: Exemplary embodiments relate to methods, systems, and storage mediums for managing content storage and selection activities. The method includes aggregating content from content providers and presenting the content to a content device. The method also includes monitoring consumption of storage space with respect to storage capacity in the content device, relocating content contained in the storage space of the content device when a predetermined condition is met, and providing access to relocated content. The relocation is operable for freeing up the storage space of the content device.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: November 18, 2014
    Assignee: Chanyu Holdings, LLC
    Inventors: Barbara J. Roden, Douglas A. Bulleit
  • Patent number: 8886909
    Abstract: Systems, methods, and computer readable medium for allocating physical storage in a disk array are disclosed. According to one aspect, the subject matter described herein includes a method for allocating portions of storage area of a storage array. The method includes receiving, from a requesting entity, a request for allocation of a portion of storage area of a storage array, the storage array comprising a plurality of storage entities and a plurality of data buses for transferring data to and from the plurality of storage entities, wherein the plurality of storage entities are organized into at least one logical unit, wherein each logical unit is subdivided into at least one slice. In response to receiving the request for allocation, at least one slice is selected for allocation for use by the requesting entity, based on anticipated system resource utilization during access to data to be stored in the storage array.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: November 11, 2014
    Assignee: EMC Corporation
    Inventors: Miles Aram De Forest, Charles Christopher Bailey, Michael D. Haynes, David Haase, Jackson Brandon Myers, Dipak Prasad
  • Patent number: 8868845
    Abstract: Example embodiments of the present invention include a method, system and computer program product for managing spinlocks in a multi-core computer system. The method comprises providing a spinlock per core in the multi-core computer system and storing each spinlock in a respective memory location configured to be access independently by respective cores of the multi-core computer system. A request is then received at a core in the multi-core computer system to perform an operation on a spinlock in the multi-core computer system. A multi-reader/single writer spinlock is obtained in response to the request.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: October 21, 2014
    Assignee: EMC Corporation
    Inventor: David W. Harvey
  • Patent number: 8819359
    Abstract: A memory system that interleaves storage of data across and within a plurality memory modules is described. The memory system includes a hybrid interleaving mechanism which maps physical addresses to locations within memory modules and ranks so that physical addresses for a given page all map to the same memory module, and physical addresses for the given page are interleaved across the plurality of ranks which comprise the same memory module.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: August 26, 2014
    Assignee: Oracle America, Inc.
    Inventors: Sanjiv Kapil, Blake Alan Jones
  • Patent number: 8812796
    Abstract: Private or shared read-only memory regions. One embodiment may be practiced in a computing environment including a plurality of agents. A method includes acts for declaring one or more memory regions private to a particular agent or shared read only amongst agents by having software utilize processor level instructions to specify to hardware the private or shared read only memory address regions. The method includes an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents. As a result of an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents, a hardware component monitoring the one or more memory regions for conflicting accesses or prevents conflicting accesses on the one or more memory regions.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: August 19, 2014
    Assignee: Microsoft Corporation
    Inventors: Jan Gray, David Callahan, Burton Jordan Smith, Gad Sheaffer, Ali-Reza Adl-Tabatabai
  • Patent number: 8812816
    Abstract: Systems and methods are provided for handling uncorrectable errors that may occur during garbage collection of an index page or block in non-volatile memory.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: August 19, 2014
    Assignee: Apple Inc.
    Inventors: Daniel J. Post, Vadim Khmelnitsky
  • Patent number: 8782325
    Abstract: The present disclosure includes systems and techniques relating to data type based alignment of data written to non-volatile memory. In some implementations, an apparatus includes an input, an output, and control logic coupled with the input and the output, where the control logic is configured to modify placement of data written to a non-volatile memory based on a first data type of the data. The first data type is distinct from a second data type also written to the non-volatile memory, and the placement of the data of the first data type is modified in relation to placement of data of the second data type in the non-volatile memory.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: July 15, 2014
    Assignee: Marvell International Ltd.
    Inventor: Xueshi Yang
  • Patent number: 8775718
    Abstract: A network storage controller uses a non-volatile solid-state memory (NVSSM) subsystem which includes raw flash memory as stable storage for data, and uses remote direct memory access (RDMA) to access the NVSSM subsystem, including to access the flash memory. Storage of data in the NVSSM subsystem is controlled by an external storage operating system in the storage controller. The storage operating system uses scatter-gather lists to specify the RDMA read and write operations. Multiple client-initiated reads or writes can be combined in the storage controller into a single RDMA read or write, respectively, which can then be decomposed and executed as multiple reads or writes, respectively, in the NVSSM subsystem. Memory accesses generated by a single RDMA read or write may be directed to different memory devices in the NVSSM subsystem, which may include different forms of non-volatile solid-state memory.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: July 8, 2014
    Assignee: NetApp, Inc.
    Inventors: Arkady Kanevsky, Steve C. Miller
  • Patent number: 8775769
    Abstract: A partition-based method for diagnosing memory leaks in Java systems, comprising dividing heap memory of a Java virtual machine into a plurality of partitions based on a partition plan, wherein each partition has at least one partition owner; monitoring the status of the respective partitions to determine whether there is a partition in which the memory space is exhausted; and if there is a partition in which the memory space is exhausted, determining that the memory leak may occur in the partition and analyzing the partition to obtain leaked objects and objects related to the leaked objects. The present invention also provides a partition-based apparatus for diagnosing memory leak in Java systems.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: July 8, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ying Li, Quan Long, Tiancheng Lui, Jie Qiu
  • Patent number: 8769211
    Abstract: Systems, apparatus, and method of monitoring synchronization in a distributed cache are described. In an exemplary embodiment, a first and second processing core process a first and second thread respectively. A first and second distributed cache slices store data for either or both of the first and second processing cores. A first and second core interface co-located with the first and second processing cores respectively maintain a finite state machine (FSM) to be executed in response to receiving a request from a thread of its co-located processing core to monitor a cache line in the distributed cache.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: July 1, 2014
    Assignee: Intel Corporation
    Inventors: James R. Vash, Bongjin Jung, Rishan Tan
  • Patent number: 8762654
    Abstract: Devices, systems, methods, and other embodiments associated with selectively scheduling memory accesses in parallel are described. In one embodiment, a method determines an access speed for a page request. The access speed is a number of clock cycles used to access a memory device of a group of memory devices. The page request is a request to access a memory page mapped to the memory device. Different page requests are selectively scheduled to access different memory devices in parallel. The different page requests access the different memory devices in a same number of clock cycles.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: June 24, 2014
    Assignee: Marvell International Ltd.
    Inventors: Xueshi Yang, Chi Kong Lee
  • Patent number: 8732423
    Abstract: A network memory system is disclosed. The network memory system comprises a first appliance configured to encrypt first data, store the encrypted first data in a first memory device. The first appliance also determines whether the encrypted first data exists in a second appliance and transmits a store instruction comprising the encrypted first data based on the determination that the encrypted first data does not exist in the second appliance. The second appliance is configured to receive the store instruction from the first appliance and store the encrypted first data in a second memory device. The second appliance is further configured to receive a retrieve instruction comprising a location indicator indicating where the encrypted first data is stored, process the retrieve instruction to obtain encrypted response data, and decrypt the encrypted response data.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: May 20, 2014
    Assignee: Silver Peak Systems, Inc.
    Inventor: David Anthony Hughes