Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate, a memory element including a first gate electrode having a first thickness disposed on a first insulation film on the semiconductor substrate, and a first peripheral element other than a memory element including a second gate electrode having a second thickness disposed on a second insulation film on the semiconductor substrate. The first gate electrode and second gate electrode comprise a plurality of film layers, and the configuration of the film layers are different as between the first gate electrode of the memory element and the second gate electrode of the peripheral element, and the first thickness is different from the second thickness.

Abstract: Semiconductor devices, and methods for fabricating a semiconductor device, include forming a contact hole penetrating an interlayer insulating layer and exposing a conductor defining a bottom surface of the contact hole, forming a sacrificial layer filling the contact hole, forming a first trench overlapping a part of the contact hole by removing at least a part of the sacrificial layer, forming a spacer filling the first trench, forming a second trench by removing a remainder of the sacrificial layer, and forming a metal electrode filling the contact hole and the second trench using electroless plating.

Abstract: Semiconductor device packages and methods of manufacturing the semiconductor device packages are provided. A semiconductor device package may include a bonding layer between a substrate and a semiconductor chip, and the bonding layer may include an intermetallic compound. The intermetallic compound may be a compound of metal and solder material. The intermetallic compound may include Ag3Sn. A method of manufacturing the semiconductor device package may include forming a bonding layer, which bonds a semiconductor chip to a substrate, by using a mixed paste including metal particles and a solder material. The bonding layer may be formed by forming an intermetallic compound, which is formed by heating the mixed paste to react the metal particles with the solder material.

Abstract: It is an object to provide a thin film transistor having favorable electric characteristics and high reliability and a semiconductor device which includes the thin film transistor as a switching element. An In—Ga—Zn—O-based film having an incubation state that shows an electron diffraction pattern, which is different from a conventionally known amorphous state where a halo shape pattern appears and from a conventionally known crystal state where a spot appears clearly, is formed. The In—Ga—Zn—O-based film having an incubation state is used for a channel formation region of a channel etched thin film transistor.

Abstract: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.

Abstract: A stratified gate dielectric stack includes a first high dielectric constant (high-k) gate dielectric comprising a first high-k dielectric material, a band-gap-disrupting dielectric comprising a dielectric material having a different band gap than the first high-k dielectric material, and a second high-k gate dielectric comprising a second high-k dielectric material. The band-gap-disrupting dielectric includes at least one contiguous atomic layer of the dielectric material. Thus, the stratified gate dielectric stack includes a first atomic interface between the first high-k gate dielectric and the band-gap-disrupting dielectric, and a second atomic interface between the second high-k gate dielectric and the band-gap-disrupting dielectric that is spaced from the first atomic interface by at least one continuous atomic layer of the dielectric material of the band-gap-disrupting dielectric.

Abstract: Embodiments of the invention include a method for fabricating a nano-ribbon transistor device and the resulting structure. A nano-ribbon transistor device including a substrate, a nano-ribbon channel, a core region in the center of the nano-ribbon channel, a gate formed around the nano-ribbon channel, a spacer formed on each sidewall of the gate, and a source and drain region epitaxially formed adjacent to each spacer is provided. The core region in the center of the nano-ribbon channel is selectively etched. A dielectric material is deposited on the exposed portions of the nano-ribbon channel. A back-bias control region is formed on the dielectric material within the core of the nano-ribbon channel and on the substrate adjacent to the nano-ribbon transistor device. A metal contact is formed in the back-bias control region.

Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, an interlayer dielectric, an inter-source layer, an inter-source plug, an inter-drain layer, an inter-drain plug, an inter-gate layer, and an inter-gate plug. The active layer is made of III-V group semiconductors. The source electrode, the drain electrode, and the gate electrode are disposed on the active layer. The gate electrode is disposed between the source electrode and the drain electrode. The interlayer dielectric covers the source electrode, the drain electrode, and the gate electrode. The inter-source layer, the inter-drain layer, and the inter-gate layer are disposed on the interlayer dielectric. The inter-source plug is electrically connected to the source electrode and the inter-source layer. The inter-drain plug is electrically connected to the drain electrode and the inter-drain layer. The inter-gate plug is electrically connected to the gate electrode and the inter-gate layer.

Abstract: A light emitting device has a base body equipped with a base material and a pair of connection terminals disposed from a first main face to a second main face that is on the opposite side from the first main face; a light emitting element connected to the connection terminals on the first main face; and a light reflecting member that covers the side faces of the light emitting element, the base material having a protruding component on the second main face, and the connection terminals being disposed on the first main face from the second main face on both sides of the protruding component, and being partly exposed from the light reflecting member on both sides of the first main face.

Abstract: Fabricating a semiconductor device includes providing a strained semiconductor material (SSM) layer disposed on a dielectric layer, forming a first plurality of fins on the SSOI structure, at least one fin of the first plurality of fins is in a nFET region and at least one fin is in a pFET region, etching portions of the dielectric layer under portions of the SSM layer of the at least one fin in the pFET region, filling areas cleared by the etching, forming a second plurality of fins from the at least one fin in the nFET region such that each fin comprises a portion of the SSM layer disposed on the dielectric layer, and forming a third plurality of fins from the at least one fin in the pFET region such that each fin comprises a portion of the SSM layer disposed on a flowable oxide.

Abstract: An electroluminescent device and its manufacture method are disclosed. The electroluminescent device comprises a color film substrate (20) comprising a substrate (21) and a color filter layer, a boss layer (27), a first electrode (24), an organic electroluminescence layer (25) and a second electrode (26) disposed on the substrate (21); said color filter layer comprises a black matrix (221) and color blocks (222) separated by the black matrix (221); said boss layer (27) is disposed between said color filter layer and said first electrode (24), and the boss layer located above the color blocks (222) protrudes towards the side away from the substrate (21) to form a boss (271); said first electrode (24), said organic electroluminescence layer (25) and said second electrode (26) are disposed on the boss layer (27) orderly, and the second electrode (26) is located above said boss (271).

Abstract: A semiconductor device includes a source and drain on a substrate; a first and second gate on the source, and the second gate and a third gate on the drain; a source contact over the source and between the first and second gates, the source contact including first and second portions, the first portion in contact with the source and extending between the first and second gates, and the second portion contacting the first portion and extending over the first and second gates; and a drain contact formed over the drain and between the second and third gates, the drain contact including first and second portions, the first portion contacting the drain, extending between second and third gates, and recessed with respect to the first portion of the source contact, and the second portion in contact with the first portion and extending between and over the second and third gates.

Abstract: A solid-state imaging device according to an aspect of the present disclosure includes pixel including: a first and second electrode located in a same layer, the second electrode being located between the first electrode and the other first electrodes included in adjacent pixels; an organic photoelectric conversion film including a first surface and a second surface, the first surface being in contact with the first electrode and the second electrode; and a counter electrode located on the second surface. The organic photoelectric conversion film extends over the pixels. The first electrode is an electrode through which electrons or holes generated in the organic photoelectric conversion film are extracted. An area ratio of the first electrode to the each pixel is 25% or less. And a total area ratio of a sum of the first electrode and the second electrode to the each pixel is 40% or greater.

Abstract: Provided is a semiconductor device and methods of forming the same. The semiconductor device includes a substrate having source/drain regions and a channel region between the source/drain regions; a gate structure over the substrate and adjacent to the channel region; source/drain contacts over the source/drain regions and electrically connecting to the source/drain regions; and a contact protection layer over the source/drain contacts. The gate structure includes a gate stack and a spacer. A top surface of the source/drain contacts is lower than a top surface of the spacer, which is substantially co-planar with a top surface of the contact protection layer. The contact protection layer prevents accidental shorts between the gate stack and the source/drain regions when gate vias are formed over the gate stack. Therefore, gate vias may be formed over any portion of the gate stack, even in areas that overlap the channel region from a top view.

Abstract: Various embodiments may relate to a method for producing an optoelectronic component. The method may include providing an optoelectronic component comprising a dielectric layer on or above an electrically conductive layer, wherein the dielectric layer is designed for sealing the electrically conductive layer substantially hermetically impermeably with regard to water, wherein the dielectric layer has diffusion channels, and closely closing the dielectric layer, wherein at least some of the diffusion channels in the dielectric layer are closed.

Abstract: An image sensor device includes a semiconductor substrate having a front surface and a back surface; an array of pixels formed on the front surface of the semiconductor substrate, each pixel being adapted for sensing light radiation; an array of color filters formed over the plurality of pixels, each color filter being adapted for allowing a wavelength of light radiation to reach at least one of the plurality of pixels; and an array of micro-lens formed over the array of color filters, each micro-lens being adapted for directing light radiation to at least one of the color filters in the array. The array of color filters includes structure adapted for blocking light radiation that is traveling towards a region between adjacent micro-lens.

Abstract: A semiconductor device includes a source and drain on a substrate; a first and second gate on the source, and the second gate and a third gate on the drain; a source contact over the source and between the first and second gates, the source contact including first and second portions, the first portion in contact with the source and extending between the first and second gates, and the second portion contacting the first portion and extending over the first and second gates; and a drain contact formed over the drain and between the second and third gates, the drain contact including first and second portions, the first portion contacting the drain, extending between second and third gates, and recessed with respect to the first portion of the source contact, and the second portion in contact with the first portion and extending between and over the second and third gates.

Abstract: A semiconductor device includes a first chip including a PN junction diode, and a second chip including a Schottky barrier diode, connected in parallel to the first chip. A first inductive metal member has a first end connected to a cathode of the PN junction diode, and a second end connected to a cathode of the Schottky barrier diode. A second inductive metal member has a third end connected to the cathode of the Schottky barrier diode. An output line is connected to a fourth end of the second connection member, and electrically connected to the cathode of the PN junction diode via a first path formed by the first and second metal members, and to the cathode of the Schottky barrier diode via a second path formed by the second metal member and exclusive of the first metal member, so that the first path has greater inductance than the second.

Abstract: A wireless transceiver includes a semiconductor device configured to perform a transmission process and a reception process using a radio wave, the semiconductor device including a transmission unit and a reception unit. The wireless transceiver further includes an antenna configured to transmit an output signal from the transmission unit and provide a received input signal to the reception unit, and a baseband circuit configured to receive an output signal from the reception unit and output the output signal to the transmission unit.

Abstract: A light emitting device is provided. The light emitting device includes a blue light emitting diode (LED); and phosphors including first to third phosphors, wherein the first phosphor is excited by light emitted from the blue LED, emits light having a main wavelength of about 495 nm to about 510 nm, and includes BaSi2O2N2:Eu or (Bax,Sr1-x)Si2O2N2:Eu where 0<x<1, the second phosphor is excited by light emitted from the blue LED, emits light having a main wavelength of about 555 nm to about 575 nm, and includes Lu3Al5O12:Ce or (Lux,Gd1-x)3Al5O12:Ce where 0<x<1, and the third phosphor is excited by light emitted from the blue LED, emits light having a main wavelength of about 580 nm to about 605 nm, and includes (Cax,Sr1-x)AlSiN3:Eu where 0<x<1.