Abstract: A digital signal processor architecture allows the digital signal processor to be used efficiently for multiplying words which are longer than the word length for which the architecture is primarily designed. The multiplication unit has a register file which is adapted to store data words of a first length, and a multiplier which is adapted to multiply together data words of a second length, the second length being twice the first length. In a first mode, the architecture multiplies data words of the first length, by extending them to the second length. In a second mode, the architecture multiplies data words of the second length, by retrieving each of the data words in two parts, each part being of the first length.

Abstract: A variable passband ARMA filter has as inputs a signal to be filtered, a reverse version of the signal to be filtered and a variable coefficient to produce as an output a filtered signal. The variable coefficient is generated by a variable equivalent sample rate coefficient converter having as inputs an initial coefficient and a variable resampling rate parameter which controls the passband.

Abstract: A business software framework supports business software applications. The framework includes a class library component that has a plurality of class libraries of business components, including business entities and business processes. The framework also includes an application framework that has a programming model, the programming model providing a set of application services for relating the business components to one another, and for providing desired services relative to the business components in order to obtain the business application.

Abstract: Disclosed is a V-BLAST system for a MIMO communication system. In the V-BLAST system for a MIMO communication system, a pseudo inverse matrix calculator receives a channel transfer function matrix including channel information and produces a cofactor matrix and a determinant for a pseudo inverse matrix. A norm & minimum calculator calculates a minimum index for the cofactor matrix outputted from the pseudo inverse matrix calculator, a weight vector selector selects a row vector having the minimum index and calculates a transposed matrix for the row vector; an adder adds the transposed matrix to a received input symbol, and a subtractor subtracts the determinant to the output. A demapper performs a determined function operation to the output and produces estimated information.

Abstract: A device for calculating a result or an integer multiple of the result of a division of a numerator by a denominator includes a unit for providing a factor which is selected such that a product of the factor and the denominator is greater than the result. The device further includes a unit for modularly reducing a first product of the numerator and the factor using a modulus equaling a sum of a second product of the denominator and the factor and of an integer to obtain an auxiliary quantity having the result. A unit is used to extract the result or the integer multiple of the result from the auxiliary quantity. A division is thus reduced to a modular reduction and an extraction which is uncomplicated as far as calculation is concerned so that, in particular in long-number division tasks, the speed on the one hand and the safety on the other hand are increased.

Abstract: A multiplying system for binary digits. The digits are multiplied in a rectangular memory array, where the digits are placed along the edges, and intersections between 1's form blocks of 1's in the memory array. The blocks of 1's are evaluated based on a weighting assigned to positions within the memory, either directly, or by reducing each block to a reduced block representation. The system can be used for multiplications, partial multiplications, and divisions, as well as applications thereof.

Abstract: A method is disclosed for graphically building business rule conditions. The method of graphically building business rule conditions comprises displaying a menu of function icons for the user, and a menu of business rule attribute icons for the user. The method allows the user to freely drag and drop functions and attributes onto a staging canvas, and relate the functions and attributes to build a graphical depiction of the desired business rule condition. The method generates source code directly from the graphical depiction such that the user does not have to understand the specific syntax and nuances of the development environment or runtime environment for the business rule.

Abstract: A system for planning and managing a software development project uses an extreme programming (XP) process and includes a graphical user interface (GUI) for displaying graphs and for entering, displaying and modifying underlying planning data. In one embodiment, the GUI includes first, second and third windows. The first window displays bar graphs reflecting both estimated development work and available resources (developer hours) for working on development. The second window displays bar graphs representing both estimated testing work and available resources for working on testing. The third window displays underlying data (e.g., project components and assignment of project components to scheduled development periods). A project manager may use the third window to adjust underlying data in order to better balance work and resources displayed in the first and second windows. Additional underlying data (individual developers, assigned hours, estimates of work on individual project components, etc.

Abstract: A method for the generation of addresses of successive pairs of input data values of stages of a Fast Fourier Transform calculation stored contiguously in a memory includes initializing at most once per stage a first base address pointer to an address of a first input data value of an initial butterfly calculation of the stage and a second base address pointer to an address of a second input data value of the initial butterfly calculation, and initializing at most once per stage a first constant and a second constant. Pairs of input data values of successive butterfly calculations in the stage are then addressed using the first base address pointer, the second base address pointer, the first constant and the second constant.

Abstract: A system, method, and computer program product are disclosed for providing automatic software distribution and installation throughout a multi-tiered computer architecture. The multi-tiered architecture includes a global tier, a hub tier below the global tier, and a target tier that is below the hub tier. A distribution request is received within a global computer system that is in the global tier. The distribution request is to distribute a file package to a target computer system that is in the target tier. The global computer system starts a distribution process in the hub computer system. The file package and an installation process are transferred to the hub computer system from the global computer system. The file package and installation process are automatically distributed to the target computer system from the hub computer system utilizing the distribution process. The target computer system then automatically installs the file package utilizing the installation process.

Abstract: A method and apparatus to square an element A when a defining polynomial of a finite field GF(2n) is expressed as f ? ( x ) = x n + ? i = 1 t ? ? x k i + 1 , and the element A contained in the finite field is expressed as A=(a0,a1,a2, . . . ,an?1)?GF(2n).

Abstract: An M-point Fractional Fourier is described using several 2M-points traditional Fourier transforms. The signal path is fed through a series of blocks including a first multiplier, a zero pad, an FFT, a second multiplier, an IFFT, a first half element, and a third multiplier. The first and third multipliers have as their other inputs a value exp(?j?n2?) for n=0:M?1, derived from the clock offset signal represented by ?.

Abstract: A rules runtime engine for scheduling and concurrently processing of rules. The engine efficiently runs a large number of rules in a parallel fashion. This is accomplished by authoring rules in a rule definition language, passing these rules through the translator for communication to the runtime engine and, scheduling and concurrently processing the translated instructions using the runtime engine. The engine also receives configuration data that instantiates the instructions thus, giving form to a living set of rules.

Abstract: A method of obtaining C=(c0, . . . , cn?1) of a product of two elements A and B of a finite field GF(2n). The method includes permuting the last d coefficients (an?1, . . . , an?d) of a multiplier A with predetermined variables (sn?1, . . . , sn?d); operating C:C=?(bi+j?A) for (I+j)th coefficient of a multiplicand B to update coefficients of C, where i and j are integers, and A:=(s, . . . ,?x?2)?(0,xn?1?j?f1, . . . ,sx?1?j?fx?d,0, . . . ,0) repeatedly for j=0 to (d?1) to update coefficients of A, where ? represents an XOR operation and ? represents an AND operation; and repeatedly performing the permuting and operating by increasing i from 0 to (n?1) by d.

Abstract: A process for migrating a system or application from a localized language to a localization independent language. The process comprises at least a process for determining which strings need to be set to a localization independent language and at least a second process for handling the conversion of the strings to the localization independent language.

Abstract: A file-update apparatus, which can mount a removable information recording medium storing a FAT and a directory entry that show a storage location, on the medium, of data constituting a content of a file, and which executes a plurality of update procedures to update the file, records progress information showing which of the update procedures have been executed in updating the file into an internal memory having a continuous power supply. Even if an abnormal stoppage of the update procedures caused by a power-down or the like occurs during updating of the FAT, for example, the progress and update information remain in the memory. Thus, the FAT and the like can be re-updated and inconsistencies resolved using this information, after recovering from the abnormal stoppage.

Abstract: A subsystem provides for negotiating a common version for interfaces of objects supported by the subsystem and a remote subsystem. In one embodiment, the subsystem determines a list of interfaces, including a version range for each interface, of objects supported by the subsystem, and a list of interfaces, including a version range for reach interface, of objects supported by the remote subsystem. The subsystem then negotiates a list of a version of each interface supported by both the subsystem and the remote subsystem by matching the versions for each interface and selecting the highest version that is common to both the list of interfaces of objects supported by the subsystem and the list of interfaces of objects supported by the remote subsystem.

Abstract: A Java-based interface can be used to allow a Java client or application to access an application view component. An application view component can provide an interface to an application or enterprise system, using a resource adapter to expose functionality in the enterprise system. A Java-based interface for the resource adapter can allow the Java client to access the application view component. The interface can be a design-time graphical user interface, which can include a set of Java server pages and can be Web-based. The interface can allow a Java client to access the application view component in order to accomplish a task such as creating, defining, deploying, and testing the application view component. Each of these tasks can have their own page in the interface, such as a Java server page.

Abstract: A computer application program executing on a computer, such as a portable computer, is selected for termination by first identifying computer application programs executing on the computer. A priority value is assigned to each of the identified computer applications. The priority value is based on multiple characteristics of the identified computer application programs. The computer application program with the smallest priority value is automatically terminated. If the computer application program with the smallest priority value is in a modal state in which it waits for a response from a user, then a default response is provided to the application prior to terminating the computer application program. The characteristics associated with the computer application programs may include average launch times, average memory usages, a class or type of application, frequencies of usage, and an amount of data stored on the computer by the computer application program.

Abstract: A random number generator (RNG) resistant to side channel attacks includes an activation pseudo random number generator (APRNG) having an activation output connected to an activation seed input to provide a next seed to the activation seed input. A second random number generator includes a second seed input, which receives the next seed and a random data output, which outputs random data in accordance with the next seed. An input seed memory is connected to the activation seed input and a feedback connection from the activation output so that the next seed is stored in the input seed memory to be used by the APRNG as the activation seed input at a next startup cycle.