Patents Examined by Michelle Mandala
  • Patent number: 10418431
    Abstract: A display device may include a light emitting element, a buffer layer, a gate insulation layer, and a switching element. A refractive index of the gate insulation layer may be equal to a refractive index of the buffer layer. The switching element may be electrically connected to the light emitting element and may include an active layer and a gate electrode. The active layer may be positioned between the buffer layer and the gate insulation layer and may directly contact at least one of the buffer layer and the gate insulation layer. The gate insulation layer may be positioned between the active layer and the gate electrode and may directly contact at least one of the active layer and the gate electrode.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: September 17, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hye-Hyang Park, Joo-Hee Jeon, Seung-Ho Jung, Chaun-Gi Choi, Hyeon-Sik Kim, Hui-Won Yang, Eun-Young Lee
  • Patent number: 10418239
    Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer formed of Al-doped GaN and suppresses diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 17, 2019
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Patent number: 10418421
    Abstract: A silicon-based OLED image transceiving device includes a substrate, multiple photodiodes for sensing light, and multiple OLEDs for emitting light. The OLED includes a metal interconnect anode, a hole transport layer, an organic light emitting layer, an electronic transport layer, and a transparent cathode layer. The hole transport layer, the organic light emitting layer, the electronic transport layer, and the transparent cathode layer are sequentially formed on the metal interconnect anode. The organic light emitting layer is only located on an area corresponding to the metal interconnect anode, and does not extend to an area corresponding to the photodiode. The multiple photodiodes and organic light emitting layers of the multiple OLEDs are arranged to form a pixel matrix of the image transceiving device. The silicon-based OLED image transceiving device has relatively high sensitivity of the photodiode.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: September 17, 2019
    Assignee: SHENZHEN DIANBOND TECHNOLOGY CO., LTD
    Inventor: Ping Liu
  • Patent number: 10410859
    Abstract: An epitaxial substrate for semiconductor elements which suppresses the occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer adjacent to the free-standing substrate; a channel layer adjacent to the buffer layer; and a barrier layer provided on an opposite side of the buffer layer with the channel layer provided therebetween, wherein the buffer layer is a diffusion suppressing layer that suppresses the diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 10, 2019
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Patent number: 10411087
    Abstract: A semiconductor capacitor includes a semiconductor substrate having a first and second principal surfaces. A first set of one or more trenches is formed on the first principal surface and a second set of one or more trenches formed on the second principal surface. A first dielectric film is located on the first principal surface and least inner walls of the first set of one or more trenches. A second dielectric film is located on the second principal surface and least inner walls of the second set of one or more trenches. A first conductor film located on the first dielectric film. A second conductor film located on the second dielectric film. The semiconductor substrate is formed of Si, SiC, GaN, or the like. The dielectric film has a two-layer structure of SiO2 and Si3N4.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: September 10, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Shigeki Nishiyama
  • Patent number: 10403854
    Abstract: An OLED is disclosed that includes an enhancement layer having optically active metamaterials, or hyperbolic metamaterials, which transfer radiative energy from the organic emissive material to a non-radiative mode, wherein the enhancement layer is disposed over the organic emissive layer opposite from the first electrode, and is positioned no more than a threshold distance away from the organic emissive layer, wherein the organic emissive material has a total non-radiative decay rate constant and a total radiative decay rate constant due to the presence of the enhancement layer, and the threshold distance is where the total non-radiative decay rate constant is equal to the total radiative decay rate constant; and an outcoupling layer disposed over the enhancement layer, wherein the outcoupling layer scatters radiative energy from the enhancement layer to free space.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: September 3, 2019
    Assignee: UNIVERSAL DISPLAY CORPORATION
    Inventors: Nicholas J. Thompson, Marc A. Baldo, Michael S. Weaver, Vinod M. Menon
  • Patent number: 10403686
    Abstract: The present invention provides a color film substrate and display device. The color film substrate comprises a bottom substrate; a black matrix disposed on the bottom substrate and a plurality of opening areas arranged in matrix at intervals are formed in the black matrix to be sub-pixel areas of the color film substrate; and a first conversion material layer formed within a first sub-pixel area of the sub-pixel areas, wherein the first conversion material layer converts an incident light with a first wavelength into a first emitting light with a second wavelength, and the first wavelength is greater than the second wavelength. The performance and lifetime of a display panel can be improved by this technique solution.
    Type: Grant
    Filed: November 23, 2017
    Date of Patent: September 3, 2019
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd
    Inventor: Wen Shi
  • Patent number: 10403696
    Abstract: Disclosed are an organic light emitting display device improving opening ratio and a method of fabricating the same. The organic light emitting display device includes a light emitting device disposed at each sub-pixel of a substrate, a pixel circuit driving the light emitting device, a bank providing a first light emitting region at a remaining region except for a region where the pixel circuit is disposed, and a second light emitting region at the region where the pixel circuit is disposed, and a color filter disposed at the first and second light emitting regions, wherein at least one of electrodes included in the pixel circuit includes a transparent conductive layer at the second light emitting region.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: September 3, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Kyoung-Jin Nam, Jeong-Oh Kim, Yong-Min Kim
  • Patent number: 10396122
    Abstract: A CMOS integrated circuit includes a Hall sensor having a Hall plate formed in a first isolation layer which is formed concurrently with a second isolation layer under a MOS transistor. A first shallow well with a conductivity type opposite from the first isolation layer is formed over, and extending to, the Hall plate. The first shallow well is formed concurrently with a second shallow well under the MOS transistor. The Hall sensor may be a horizontal Hall sensor for sensing magnetic fields oriented perpendicular to the top surface of the substrate of the integrated circuit, or may be a vertical Hall sensor for sensing magnetic fields oriented parallel to the top surface of the substrate of the integrated circuit.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: August 27, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Keith Ryan Green, Rajni J. Aggarwal, Ajit Sharma
  • Patent number: 10384325
    Abstract: A backgrind (BG) tape includes an adhesive material having a thinner tape region with a first thickness having an area sized to accommodate a substrate therein including an active semiconductor top side surface including a plurality of chips each including at least one transistor and at least one metallization level with bond pads connected to nodes of the transistor and bumps on or coupled to the bond pads. The BG tape also includes a thicker tape region along at least a periphery of the BG tape having a second thickness that is greater than the first thickness.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: August 20, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Randy Collo Ramos, Jeniffer Viera Otero, Mark Daniel Pabalate Minoc, Cherry Lyn Marquez Aranas, Russel Rosales Borreo
  • Patent number: 10385237
    Abstract: The present application relates to an organic electronic device, a method for preparing same, and a lighting apparatus and a display device comprising same. The present application enables an organic electronic device to show excellent moisture-blocking properties and have flexibility as well as excellent and reliable durability at high temperature and high humidity.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: August 20, 2019
    Assignee: LG CHEM, LTD.
    Inventors: Kyung Yul Bae, Hyun Jee Yoo, Se Woo Yang, Yoon Gyung Cho, Sang Min Park
  • Patent number: 10388822
    Abstract: An encased adhesive tape includes: an adhesive tape composite that includes adhesive tapes and connecting components, the adhesive tapes each including a base film and being arranged adjacent to one another in a longitudinal direction of the base film, the connecting components being band-shaped and each being arranged between the adhesive tapes; and a housing that is connected to one end of the adhesive tape composite in the longitudinal direction, and houses the adhesive tape composite. Each of the adhesive tapes includes a non-adhesive region in which an adhesive layer is not disposed, in an end portion out of end portions of the base film in the longitudinal direction, the end portion being on the same side as the one end of the adhesive tape composite.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: August 20, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Junya Mihara
  • Patent number: 10381308
    Abstract: Some embodiments include electrical interconnects. The interconnects may contain laminate structures having a graphene region sandwiched between non-graphene regions. In some embodiments the graphene and non-graphene regions may be nested within one another. In some embodiments an electrically insulative material may be over an upper surface of the laminate structure, and an opening may extend through the insulative material to a portion of the laminate structure. Electrically conductive material may be within the opening and in electrical contact with at least one of the non-graphene regions of the laminate structure. Some embodiments include methods of forming electrical interconnects in which non-graphene material and graphene are alternately formed within a trench to form nested non-graphene and graphene regions.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: August 13, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej S. Sandhu
  • Patent number: 10373885
    Abstract: Disclosed herein is a package comprising a first die having a first redistribution layer (RDL) disposed on a first side of a first substrate and a second die having a second RDL disposed on a first side of a second substrate, with the first RDL bonded to the second RDL. A third die having a third RDL is disposed on a first side of a third substrate, the third die mounted over the second die, with the second die disposed between the first die and the third die. First vias extend through, and are electrically isolated from, the second substrate, with the first vias each contacting a conductive element in the first RDL or the second RDL. Second vias extend through, and are electrically isolated from, the third substrate, with the second vias each contacting a conductive element in the third RDL or one of the first vias.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: August 6, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Ming-Fa Chen, Wen-Sen Lu, Wen-Chih Chiou, Wen-Ching Tsai
  • Patent number: 10374072
    Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: August 6, 2019
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Ralph G. Nuzzo, John A. Rogers, Etienne Menard, Keon Jae Lee, Dahl-Young Khang, Yugang Sun, Matthew Meitl, Zhengtao Zhu
  • Patent number: 10367036
    Abstract: An organic light-emitting structure is described herein. The organic light emitting structure includes a first light-emitting unit, a second light-emitting unit, a third light-emitting unit, and a fourth light-emitting unit. An emission wavelength of the first light-emitting unit, an emission wavelength of the second light-emitting unit, an emission wavelength of the third light-emitting unit, and an emission wavelength of the fourth light-emitting unit successively increase. Each of a luminous efficiency of the second light-emitting unit, and a luminous efficiency of the third light-emitting unit is greater than each of a luminous efficiency of the first light-emitting unit and a luminous efficiency of the fourth light-emitting unit. The color gamut range of the organic light-emitting structure is increased, the color saturation of the light-emitting device is improved, and quantity of colors is increased, so that the development trend of color reproducibility for the display devices can be satisfied.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: July 30, 2019
    Assignee: SHANGHAI TIANMA AM-OLED CO., LTD.
    Inventor: Yuji Hamada
  • Patent number: 10366996
    Abstract: Fabrication method for a semiconductor memory device and structure are provided, which includes: providing at least two mask layers over a pair of fin structures extended above a substrate, wherein a first mask layer of the at least two mask layers is orthogonal to a second mask layer of the at least two mask layers; and patterning the pair of fin structures to define a pass-gate transistor, wherein the first mask layer facilitates removing of a portion of a first fin structure of the pair of fin structures to define a first pass-gate fin portion of the pass-gate transistor, and the second mask layer protects a second fin structure of the pair of fin structures to define a second pass-gate fin portion of the pass-gate transistor.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: July 30, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Robert C. Wong, Lei Zhuang, Ananthan Raghunathan
  • Patent number: 10361076
    Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: July 23, 2019
    Assignee: Lam Research Corporation
    Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis Hausmann, Bart J. van Schravendijk, Adrien LaVoie
  • Patent number: 10361403
    Abstract: The present invention relates to a method comprising the steps: a) providing a layered structure applicable for preparing an organic electronic device, comprising: aa) a substrate comprising a first electrode structure and a non-electrode part; bb) a grid formed by a grid material, wherein open areas of the grid are arranged above at least a part of the first electrode structure and the grid material is arranged above at least a part of the non-electrode part; and cc) a layer stack comprising at least one redox-doped layer having a conductivity of at least 1E?7 S/cm, the layer stack being deposited on the grid; wherein the optical density measured by absorption spectroscopy of the grid material is higher than the optical density of the open areas; and b) irradiating light pulses having a duration of <10 ms and an energy of 0.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: July 23, 2019
    Assignee: Novaled GmbH
    Inventors: Oliver Langguth, Tobias Canzler
  • Patent number: 10355055
    Abstract: This organic EL display device is provided with: a TFT substrate; a counter substrate; an organic EL element provided on the TFT substrate; a sealing film that seals the organic EL element; a color filter layer provided on the counter substrate on a side closer to the organic EL element; and a filler layer that is filled between the sealing film and the color filter layer. This organic EL display device satisfies nM(h?1)/nMh×LM(h?1)/?(TM(h?1)2+LM(h?1)2)?1, nMh/ng×LMh/?(TMh2+LMh2)?1, ng/nCF×Lg/?(Tg2+Lg2)?1, nCF/nGL×LCF/?(TCF2+LCF2)?1, or nGL/nair×LGL/?(TGL2+LGL2)?1, while satisfying XEC/2+XBM/2??(TMi×tan ?Mi)+Tg×tan ?g+TCF×tan ?CF.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: July 16, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Seiji Fujiwara, Takeshi Hirase, Tetsuya Okamoto, Tohru Senoo, Tohru Sonoda