Abstract: An LED lighting assembly integrated with dielectric liquid lens, including: a heat dissipation substrate; an LED chip, located on the heat dissipation substrate; a transparent material, covering the heat dissipation substrate and the LED chip and having a curved surface; a transparent liquid, located above the transparent material; a transparent layer, located above the transparent liquid; a first dielectric liquid, located above the transparent layer; a second dielectric liquid, located above the first dielectric liquid and having a curved surface, wherein the second dielectric liquid has a second dielectric constant smaller than a first dielectric constant of the first dielectric liquid; a transparent electrode layer, located above the second dielectric liquid for applying a control voltage to generate a dielectric force on the second dielectric liquid; and an enclosing body.

Abstract: Embodiments of the invention provide a crystalline aluminum carbide thin film, a semiconductor substrate having the crystalline aluminum carbide thin film formed thereon, and a method of fabricating the same. Further, the method of fabricating the AlC thin film includes supplying a carbon containing gas and an aluminum containing gas to a furnace, to growing AlC crystals on a substrate.

Abstract: The present invention provides a resin composition comprising a liquid crystal polyester and a titanium oxide filler, wherein when a value obtained by converting the content of aluminum in the titanium oxide filler to the content of aluminum oxide is A (% by weight) and the volume average particle diameter of the titanium oxide filler is B (?m), A and B satisfy the formula (I): A?0.1 and the formula (II): A/B2?25, a reflective board obtained by molding the resin composition, and a light-emitting apparatus comprising the reflective board and a light-emitting element. According to the resin composition of the present invention, a reflective board having high reflectance and high heat resistance can be obtained. Furthermore, a light-emitting apparatus which is excellent in properties such as luminance can be obtained by using the reflective board.

Abstract: Disclosed are a semiconductor light emitting device. The semiconductor light emitting device comprises a light emitting structure comprising a plurality of compound semiconductor layers, a passivation layer at the outside of the light emitting structure, a first electrode layer on the light emitting structure, and a second electrode layer under the light emitting structure.

Abstract: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer and/or p+ deep diffused layer. Consequently, the present invention delivers high device performances, such as low crosstalk, low radiation damage, high speed, low leakage dark current, and high speed, using a thin active layer.

Abstract: A light emitting device package includes a base, a light emitting element, a mask, metal wires, an encapsulating layer and a cover layer. The base has a first surface bearing electrical structure thereon and an opposite second surface. The mask is arranged on the first surface to define a space receiving the light emitting element. Two openings are defined in the mask. The light emitting element has two pads exposed to an outside through the two openings respectively. The metal wires electrically connect the pads and the electrical structures. The encapsulating layer is filled in the space and two through holes in the base and encapsulates the light emitting element. The encapsulating layer is separated from the metal wires. The cover layer covers and protects the mask and the metal wires. A method of manufacturing the package is also provided.

Abstract: Apparatus for semiconductor device structures and related fabrication methods are provided. One method for fabricating a semiconductor device structure involves forming a gate structure overlying a region of semiconductor material, wherein the width of the gate structure is aligned with a <100> crystal direction of the semiconductor material. The method continues by forming recesses about the gate structure and forming a stress-inducing semiconductor material in the recesses.

Abstract: A multifunction MEMS element includes a first cantilever, a second cantilever and a MEMS component. The first cantilever, the second cantilever and the MEMS component together form a MEMS structure. The MEMS component includes an inductor device.

Abstract: A low contact resistance semiconductor structure includes a substrate, a semiconductor stacked layer, a low contact resistance layer and a transparent conductive layer. The low contact resistance layer is formed on one side of a P-type GaN layer of the semiconductor stacked layer. The low contact resistance layer is formed at a thickness smaller than 100 Angstroms and made of a material selected from the group consisting of aluminum, gallium, indium, and combinations thereof. Through the low contact resistance layer, the resistance between the P-type GaN layer and transparent conductive layer can be reduced and light emission efficiency can be improved when being used on LEDs. The method of fabricating the low contact resistance semiconductor structure of the invention forms a thin and consistent low contact resistance layer through a Metal Organic Chemical Vapor Deposition (MOCVD) method to enhance matching degree among various layers.

Abstract: Galvanic isolation between a high-voltage die and a low-voltage die in a multi-die chip is provided by a galvanic isolation die that physically supports the high-voltage die and the low-voltage die, and provides capacitive structures with high breakdown voltages that allow the high-voltage die to capacitively communicate with the low-voltage die.

Abstract: An organic light-emitting display device is manufactured via a simple process and has an improved aperture ratio. The organic light-emitting display device comprising: a substrate; an auxiliary electrode formed on the substrate; a thin film transistor (TFT) formed on the auxiliary electrode, the TFT comprising an active layer, a gate electrode, a source electrode and a drain electrode; an organic electroluminescent (EL) device electrically connected to the TFT and formed by sequentially stacking a pixel electrode formed on the same layer by using the same material as portions of the source and drain electrodes, an intermediate layer comprising an organic light emission layer (EML), and an opposite electrode disposed to face the pixel electrode; and a contact electrode formed on the same layer by a predetermined distance by using the same material as the source and drain electrodes, and electrically connecting the auxiliary electrode and the opposite electrode.

Abstract: A field effect transistor (FET) includes source and drain electrodes, a channel layer, a barrier layer over the channel layer, a passivation layer covering the barrier layer for passivating the barrier layer, a gate electrode extending through the barrier layer and the passivation layer, and a gate dielectric surrounding a portion of the gate electrode that extends through the barrier layer and the passivation layer, wherein the passivation layer is a first material and the gate dielectric is a second material, and the first material is different than the second material.

Abstract: A method of manufacturing a thin film transistor is provided. The method includes forming a lower organic semiconductor layer, forming an upper organic semiconductor layer on the lower organic semiconductor layer, the upper organic semiconductor layer having solubility and conductivity higher than those of the lower organic semiconductor layer, forming a source electrode and a drain electrode spaced apart from each other and respectively overlapping the upper organic semiconductor layer, and dissolving the upper organic semiconductor layer selectively by using the source electrode and the drain electrode as a mask.

Abstract: A method for producing oblique surfaces in a substrate, comprising a formation of recesses on both surfaces of the substrate, until the recesses are so deep that the substrate is perforated by the two recesses. One recess is produced going out from a first main surface in the region of a first surface, and the other recess is produced going out from the second main surface in the region of a second surface, so that the first surface and the second surface do not coincide along a surface normal of the main surfaces of the substrate. Subsequently, flexible diaphragms are attached over the recesses on each of the main surfaces. If a vacuum pressure is then produced inside the recesses, the flexible diaphragms each curve in the direction of the recesses until their surfaces facing the substrate come into contact with one another, generally in the center of the recesses.

Abstract: An organic light-emitting display device comprises: a lower substrate; an upper substrate facing the lower substrate; and a spacer formed in a sealed space between the lower substrate and the upper substrate and dividing the space into two or more sections; wherein air holes are formed in the spacer and allow air to flow between the sections of the space.

Abstract: An electrostatic discharge (ESD) protection clamp (21, 21?, 70, 700) for protecting associated devices or circuits (24), comprises a bipolar transistors (21, 21?, 70, 700) in which doping of facing base (75) and collector (86) regions is arranged so that avalanche breakdown occurs preferentially within a portion (84, 85) of the base region (74, 75) of the device (70, 700) away from the overlying dielectric-semiconductor interface (791). Maximum variations (?Vt1)MAX of ESD triggering voltage Vt1 as a function of base-collector spacing dimensions D due, for example, to different azimuthal orientations of transistors (21, 21?, 70, 700) on a semiconductor die or wafer is much reduced. Triggering voltage consistency and manufacturing yield are improved.

Abstract: An LED comprises an electrode layer comprising a first a second sections electrically insulated from each other; an electrically conductive layer on the second section, an electrically conductive pole protruding from the electrically conductive layer; an LED die comprising an electrically insulating substrate on the electrically conductive layer, and a P-N junction on the electrically insulating substrate, the P-N junction comprising a first electrode and a second electrode, the electrically conductive pole extending through the electrically insulating substrate to electrically connect the first electrode to the second section; a transparent electrically conducting layer on the LED die, the transparent electrically conducting layer electrically connecting the second electrode to the first section; and an electrically insulating layer between the LED die, the electrically conductive layer, and the transparent electrically conducting layer, wherein the electrically insulating layer insulates the transparent ele

Abstract: An electrostatic discharge (ESD) protection device is provided. The ESD protection device includes an epitaxy layer disposed on a semiconductor substrate. An isolation pattern is disposed on the epitaxy layer to define a first active region and a second active region, which are surrounded by a first well region. A gate is disposed on the isolation pattern. A first doped region and a second doped region are disposed in the first active region and the second active region, respectively. A drain doped region is disposed in the first doped region. A source doped region and a first pick-up doped region are disposed in the second doped region. A source contact plug having an extended portion connects to the source doped region. A ratio of an area of the extended portion covering the first pick-up doped region to an area of first pick-up doped region is between zero and one.

Abstract: A method of manufacturing a semiconductor device includes: forming a first metal film on an insulating film over a substrate; forming a capacitor lower electrode by patterning the first metal film; and forming a dielectric film on upper and side surfaces of the capacitor lower electrode and on the insulating film. The method further includes: forming a conductive protection film on the dielectric film; patterning the conductive protection film into a shape of covering the capacitor lower electrode; forming a capacitor dielectric film in a shape of covering the upper and side surfaces of the capacitor lower electrode, by patterning the dielectric film so that the patterned conductive protection film covers an upper surface of the capacitor dielectric film; forming a second metal film on the patterned conductive protection film; and forming a capacitor upper electrode that covers at least an upper surface of the patterned conductive protection film.

Abstract: A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active region of the semiconductor substrate, and a charge storage pattern may be provided on the tunnel insulation layer. An interface layer pattern may be provided on the charge storage pattern, and a blocking insulation pattern may be provided on the interface layer pattern. Moreover, the block insulation pattern may include a high-k dielectric material, and the interface layer pattern and the blocking insulation pattern may include different materials. A control gate electrode may be provided on the blocking insulating layer so that the blocking insulation pattern is between the interface layer pattern and the control gate electrode. Related methods are also discussed.