Abstract: A data processing method and device, and a distributed storage system are described. The method and device are applied in a dual-control storage server. The dual-control storage server comprises two controllers. If one controller fails due to abnormalities, the other controller determines the storage device managed by the failed controller, and the other controller scans the data in the determined storage device to obtain the metadata of the storage device, and uses the metadata to read the data stored in the determined storage device. It can be seen that in this solution, if one controller is abnormal, the other controller will take the place of the failed controller to provide external services. This improves the stability of the data storage by the dual-control storage server.

Abstract: The disclosure supports both trickle and burst input/output (I/O) admission rates in journaling file systems. Examples include receiving incoming data; based at least on receiving the incoming data, generating metadata for a journal entry; adding the metadata to an active metadata batch; issuing a data write to write the incoming data to a storage medium; monitoring for a first trigger comprising determining that a data write for an entry in the active metadata batch is complete; based at least on the first trigger, closing the active metadata batch; and issuing a journal write to write entries of the active metadata batch to the storage medium. A second trigger comprises determining that a batch open time exceeds a selected percentage of a moving average of data write durations. A third trigger comprises determining that a batch counter exceeds a count threshold. These triggers work together to reduce I/O latencies.

Abstract: Techniques for managing a storage unit involve: determining space usage indicators of a storage system including disks, each disk is divided into disk slices, and at least part of the disk slices are organized into a storage unit. The techniques further involve: determining a target priority of a data migration task based on the space usage indicators, wherein the data migration task is used to migrate data in a group of disk slices allocated to at least one storage unit to another group of disk slices. The techniques further involve: if the target priority is different from a current priority of the data migration task, adjusting the current priority of the data migration task to the target priority, and determining system resources for the data migration task based on the target priority. Accordingly, a priority of a data migration task can be dynamically adjusted to accommodate different scenarios.

Abstract: A memory controller is capable of issuing a first write command for writing data of a predetermined size in a DRAM, and a second write command for writing data of a size smaller than the predetermined size in the DRAM. The memory controller comprises a receiving unit configured to receive a request to the DRAM from a bus; a determining unit configured to determine whether a command that is after the second write command when a reception sequence of a request is observed is issuable in a period until the second write command is issued after a preceding command is issued; and an issuing unit configured to issue a command determined to be issuable before the second write command.

Abstract: Drives of a RAID group are classified as either healthy or failing using a trained learning process. The failure probability is then determined for each failing drive using a Venn-ABERS framework which provides a boundary range on the failure prediction probability. A variable sparing mechanism is used to enable one or more drives of the RAID group to be used as dual-purpose drives. In a first state, the dual-purpose drives are user-addressable drives and are available to be used to process IO workload on the RAID group. Spreading the IO workload on the RAID group across a larger number of drives results in increased performance in the form of reduced latency. In a second state, the dual-purpose drives are not user-addressable and are spare drives in the RAID group, which improves the level of protection provided to data stored in the RAID group.

Abstract: A storage control device includes a memory and a processor. The processor configured to, when a request for writing first data to a first unit region among unit regions included in a first storage region is received, write the first data to the first unit region in a second storage region corresponding to a snapshot, the snapshot being corresponding to the first storage region. The processor is further configured to send a first completion response to the request for writing. The processor is further configured to, when a first read request requesting for reading from the first unit region in the second storage region is received, send second data stored in the first unit region in the first storage region, as read data in accordance with the first read request.

Abstract: Techniques manage a storage system. In accordance with such techniques, an access request for target data is received; a storage position of the target data is determined, the storage position indicating one of a storage device and a cache; a target element corresponding to the target data is determined from a first replacement list and a second replacement list associated with the first replacement list based on the storage position, the first replacement list including at least a counting element, the counting element indicating an access count of data in the storage device, the second replacement list including a low-frequency access element, the low-frequency access element indicating a cache page with a low access frequency in the cache; and a position of the target element in a replacement list where the target element exist is updated. Therefore, the overall performance of the storage system can be improved.

Abstract: An apparatus includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller includes an interface configured to send first data to be stored to the non-volatile memory. The controller further includes a control circuit configured to generate updated control information based on storing of the first data to the non-volatile memory. The interface is further configured to concurrently send second data and the updated control information to be stored at the non-volatile memory.

Abstract: A storage device includes a non-volatile memory (NVM) and a storage device controller. The storage device controller includes a NVM interface coupled to the NVM and one or more task queues. The storage device controller is operable to pick a task from one or more queues of the storage device. The task is parsed based upon presence of an extra header segment with an execution condition. The task without the extra header segment is sent to execution. Whether the execution condition of the extra header segment of the task is met is determined. The task with the execution condition met is sent to execution. The task with the execution condition unmet is postponed.

Abstract: Respective memory devices are assigned to respective processor devices in a disaggregated computing system, the disaggregated computing system having at least a pool of the memory devices and a pool of the processor devices. An iterative learning algorithm is used to define data boundaries of a dataset for performing an analytic function on the dataset simultaneous to a primary compute task, unrelated to the analytic function, being performed on the dataset in the pool of memory devices using memory bandwidth not currently committed to the primary compute task, thereby efficiently employing the unused memory bandwidth to prevent underutilization of the pool of memory devices.

Abstract: An approach is provided for reducing command bus traffic between memory controllers and PIM-enabled memory modules using special PIM commands. The term “special PIM command” is used herein to describe embodiments and refers to a PIM command for which the corresponding module-specific command information is provided to memory modules via a non-command bus data path. A memory controller generates and issues a special PIM command to multiple PIM-enabled memory modules via a command bus and provides module-specific command information (e.g., address information) for the special PIM command to the PIM-enabled memory modules via the non-command bus data path that is shared by the PIM-enabled memory modules and the memory controller.

Abstract: A data processing system includes a processor, a memory system, a cache controller and a cache accessible by the processor via the cache controller. The cache controller provides an asynchronous interface between the processor and the memory system. Instructions, issued by the processor to the cache controller, are completed by the cache controller without blocking the processor. In addition, the cache controller tracks a completion status of the memory operation associated with each instruction and enables the completion status to be queried by the processor. Status of the memory operation may be recorded as an entry in a log, where the log, or a property of the log, is accessible by the processor.

Abstract: A system and method for addressing split modes of persistent memory are described herein. The system includes a non-volatile memory comprising regions of memory, each region comprising a range of memory address spaces. The system also includes a memory controller (MC) to control access to the non-volatile memory. The system further includes a device to track a mode of each region of memory and to define the mode of each region of memory. The mode is a functional use model.

Abstract: The techniques described herein improve cache traffic performance in the context of contended lock instructions. More specifically, each core maintains a lock address contention table that stores addresses corresponding to contended lock instructions. The lock address contention table also includes a state value that indicates progress through a series of states meant to track whether a load by the core in a spin-loop associated with semaphore acquisition has obtained the semaphore in an exclusive state. Upon detecting that a load in a spin-loop has obtained the semaphore in an exclusive state, the core responds to incoming requests for access to the semaphore with negative acknowledgments. This allows the core to maintain the semaphore cache line in an exclusive state, which allows it to acquire the semaphore faster and to avoid transmitting that cache line to other cores unnecessarily.

Abstract: A hardware based block moving controller of an active device such as an implantable medical device that provides electrical stimulation reads a parameter data from a block of memory and then writes the parameter data to a designated register set of a component that performs an active function. The block of memory may include data that specifies a size of the block of memory to be moved to the register set. Multiple individual block mover components of the controller may move respective blocks, each responsive to a dedicated trigger or to a same trigger. Furthermore, a given block mover or individual block mover component may have multiple selectable triggers. The block moving hardware based controller may have one or more memory devices to access, and the firmware may write to one memory while the block moving hardware based controller may read from another.

Abstract: A storage device includes a first memory, a controller circuit configured to control an access to the first memory, a connector connectable to host apparatuses, and a connection detection circuit configured to detect disconnection of the connector from a host apparatus based on a state of a signal line of the connector.

Abstract: A storage system comprises a plurality of enclosures and a storage controller. Each enclosure comprises at least one processing device and a plurality of drives configured in accordance with a redundant array of independent disks (RAID) arrangement. The storage controller obtains data pages associated with an input-output request, provides the data pages to a processing device of a given enclosure, and issues a command to the processing device to perform at least one operation based at least in part on the data pages. The processing device of the given enclosure receives the data pages from the storage controller, generates compressed data pages based at least in part on the received data pages, stores one or more of the compressed data pages on the plurality of drives according to the RAID arrangement and returns information associated with the storage of the compressed data pages to the storage controller.

Abstract: A method in one embodiment comprises detecting one or more storage arrays in an information technology infrastructure, and receiving input-output (IO) operation performance data recorded over a given time period from the one or more storage arrays. The performance data comprises a plurality of IO operation counts, each IO operation count comprising a number of IO operations per time unit for a component of a given storage array. The method also includes analyzing metadata for the IO operation counts to generate a time series comprising the IO operation counts sorted over a plurality of ordered time intervals of the given time period, and identifying a plurality of time blocks within the time series, each of the time blocks comprising a subset of the ordered time intervals. A proposed time interval for performance of a planned maintenance activity is generated based on one or more of the time blocks.

Abstract: Disclosed is a method, apparatus, and system for dynamically changing a backup policy, the operations comprising: automatically detecting a change in a backup source system; automatically activating a new backup policy, wherein the new backup policy is determined based on the change in the backup source system and an old backup policy; and performing a backup session based on the new backup policy.

Abstract: According to one embodiment of the present invention, an apparatus is disclosed. The apparatus includes a memory array having a plurality of memory cells. The apparatus further includes memory access circuits coupled to the memory array and configured to perform write operations responsive to control signals. The apparatus further includes control logic coupled to the memory access circuits and configured to apply a set of write parameters based, at least in part, on a number of write operations performed by the memory access circuits and further configured to provide control signals to the memory access circuits to perform write operations on the plurality of memory cells according to the set of write parameters.