Patents Examined by Mohamed M Gebril
  • Patent number: 11144479
    Abstract: This disclosure is directed to a system for address mapping and translation protection. In one embodiment, processing circuitry may include a virtual machine manager (VMM) to control specific guest linear address (GLA) translations. Control may be implemented in a performance sensitive and secure manner, and may be capable of improving performance for critical linear address page walks over legacy operation by removing some or all of the cost of page walking extended page tables (EPTs) for critical mappings. Alone or in combination with the above, certain portions of a page table structure may be selectively made immutable by a VMM or early boot process using a sub-page policy (SPP). For example, SPP may enable non-volatile kernel and/or user space code and data virtual-to-physical memory mappings to be made immutable (e.g., non-writable) while allowing for modifications to non-protected portions of the OS paging structures and particularly the user space.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: October 12, 2021
    Assignee: Intel Corporation
    Inventors: Ravi L. Sahita, Gilbert Neiger, Vedvyas Shanbhogue, David M. Durham, Andrew V. Anderson, David A. Koufaty, Asit K. Mallick, Arumugam Thiyagarajah, Barry E. Huntley, Deepak K. Gupta, Michael Lemay, Joseph F. Cihula, Baiju V. Patel
  • Patent number: 11133075
    Abstract: Apparatus and methods are disclosed including a memory device or a memory controller configured to receive, from a host device over a host interface, a request for a device descriptor of a memory device, and to send to the host, over the host interface, the device descriptor, the device descriptor including voltage supply capability fields that are set to indicate supported voltages of the memory device, the supported voltages selected from a plurality of discrete voltages. The host device can utilize the supported voltages to supply an appropriate voltage to the memory device. Methods of operation are disclosed, as well as machine-readable medium, a host computing device, and other embodiments.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: September 28, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Greg A. Blodgett, Sebastien Andre Jean
  • Patent number: 11119923
    Abstract: A cache coherence technique for operating a multi-processor system including shared memory includes allocating a cache line of a cache memory of a processor to a memory address in the shared memory in response to execution of an instruction of a program executing on the processor. The technique includes encoding a shared information state of the cache line to indicate whether the memory address is a shared memory address shared by the processor and a second processor, or a private memory address private to the processor, in response to whether the instruction is included in a critical section of the program, the critical section being a portion of the program that confines access to shared, writeable data.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: September 14, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Amin Farmahini Farahani, Nuwan Jayasena
  • Patent number: 11119660
    Abstract: Provided are a computer program product, system, and method for using a machine learning module to determine when to replace a storage device. Input on attributes of the storage device is provided to a machine learning module to produce an output value. A determination is made whether the output value indicates to replace the storage device. Indication is made to replace the storage device in response to determining that the output value indicates to replace the storage device.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: September 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew G. Borlick, Karl A. Nielsen, Clint A. Hardy, Lokesh M. Gupta
  • Patent number: 11099743
    Abstract: Provided are a computer program product, system, and method for using a machine learning module to determine when to replace a storage device. Input on attributes of the storage device is provided to a machine learning module to produce an output value. A determination is made whether the output value indicates to replace the storage device. Indication is made to replace the storage device in response to determining that the output value indicates to replace the storage device.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: August 24, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew G. Borlick, Karl A. Nielsen, Clint A. Hardy, Lokesh M. Gupta
  • Patent number: 11093410
    Abstract: Embodiments of the present disclosure provide a cache management method, storage system and computer program product. The cache management method includes determining an access frequency for each of a plurality of cache pages in a storage system. The method further includes organizing the plurality of cache pages into a plurality of queues based on the access frequency. The method further includes allocating solid-state disks for the plurality of queues based on the access frequency, so that queues where pages with higher access frequency are located have more solid state disks.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: August 17, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Jian Gao, Xinlei Xu, Lifeng Yang, Changyu Feng, Yousheng Liu, Baote Zhuo
  • Patent number: 11080201
    Abstract: Techniques that facilitate hybrid memory access frequency are provided. In one example, a system stores access frequency data for storage class memory and volatile memory in a translation lookaside buffer. The access frequency data is indicative of a frequency of access to the storage class memory and the volatile memory. The system also determines whether to store data in the storage class memory or the volatile memory based on the access frequency data stored in the translation lookaside buffer.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: August 3, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hubertus Franke, Bulent Abali, Damir Anthony Jamsek, Marcio Augusto Silva
  • Patent number: 11073986
    Abstract: A memory management unit receives a transaction request to perform an operation with respect to data in memory, the transaction request including control information. The memory management unit identifies, based on the control information, one of a plurality of versions of a given memory data, where the plurality of versions of the given memory data include a first version of the given memory data and a second version of the given memory data that is modified from the first version. The memory management unit accesses the identified version of the given memory data in response to the transaction request.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: July 27, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Michael R. Krause
  • Patent number: 11062774
    Abstract: Apparatus, methods, and computer-readable media for programming, reading, and servicing non-volatile storage device to improve data retention time and data density are disclosed. According to one embodiment, a method of managing a non-volatile memory storage device includes generating output values based on an expected pattern of discrete states stored in memory cells of the storage device, comparing output values for the memory cells to expected output values using a pre-selected threshold, and based on the comparing, programming other memory cells of the storage device to refresh the programming of the other memory cells. Methods of performing service and management operations for interrupting a host system coupled a non-volatile memory storage device are also disclosed.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: July 13, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: David Michael Callaghan
  • Patent number: 11055226
    Abstract: Particular embodiments described herein provide for an electronic device that can be configured to receive a request for data, wherein the request is received on a system that regularly stores data in a cache and provide the requested data without causing the data or an address of the data to be cached or for changes to the cache to occur. In an example, the requested data is already in a level 1 cache, level 2 cache, or last level cache and the cache does not change its state. Also, a snoop request can be broadcasted to acquire the requested data and the snoop request is a read request and not a request for ownership of the data. In addition, changes to a translation lookaside buffer when the data was obtained using a linear to physical address translation is prevented.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventor: Vadim Sukhomlinov
  • Patent number: 11055183
    Abstract: A method includes monitoring a sequence of transactions in one or more volumes. The transactions are transferred to a primary storage (112) in a given order, and are replicated to a secondary storage (114). The volumes belong to a volume group (204) for which the transactions are guaranteed to be replicated while retaining the given order. Artificial write transactions (228) are periodically issued to a protection application field, which is predefined in a given volume (212) belonging to the volume group. Records indicative of the transactions, including the artificial transactions, are stored in a disaster-proof storage unit (144). Upon verifying that a given artificial transaction has been successfully replicated in the secondary storage, the records corresponding to the given artificial write transaction and the transactions that precede it in the sequence are deleted from the disaster-proof storage unit.
    Type: Grant
    Filed: September 11, 2016
    Date of Patent: July 6, 2021
    Assignee: AXXANA (ISRAEL) LTD.
    Inventor: Alex Winokur
  • Patent number: 11042309
    Abstract: A method, computer program product, computing system, and system for recovery of virtual machine files are described. The method may include creating a backup archive file, the backup archive file including a backup of a first virtual disk corresponding to a virtual machine hosted by a virtualization host device. The method may further include storing the backup archive file including the backup. The method may also include creating a second virtual disk that emulates the first virtual disk using data from the backup archive file. The method may additionally include communicatively attaching the second virtual disk to the virtual machine hosted by the virtualization host device. Moreover, the method may include transferring data from the second virtual disk to the first virtual disk corresponding to the virtual machine hosted by the virtualization host device.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: June 22, 2021
    Inventors: Yuri Per, Maxim V. Lyadvinsky, Serguei M. Beloussov, Dmitry Egorov, Sergey Kandaurov
  • Patent number: 11037625
    Abstract: A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect the SSD to a computing device such that a central processing unit (CPU) of the computing device exclusively reads data from, and writes data to, the DRAM. The SSD controller writes data to the flash memory from the DRAM independently of received commands from the computing device.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: June 15, 2021
    Assignee: THSTYME BERMUDA LIMITED
    Inventors: Charles I. Peddle, Martin Snelgrove, Robert Neil McKenzie, Xavier Snelgrove
  • Patent number: 11029857
    Abstract: A set of device maintenance related data is received from each of a plurality of non-volatile memory modules. Each of the plurality of non-volatile memory modules comprise a plurality of non-volatile memory devices. Based at least in part on said set of device maintenance related data a maintenance operation to be performed is determined. The determined device maintenance related operation is performed.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: June 8, 2021
    Assignee: EMC IP Holding Company LLC
    Inventor: Michael Nishimoto
  • Patent number: 10983712
    Abstract: A storage control system acquires, for each of a plurality of power control groups in which a plurality of storage devices which form the basis of a plurality of redundancy configuration groups are classified, an I/O (Input/Output) amount of the power control group. For each of the plurality of power control groups, the storage control system controls power consumption of each of the storage devices belonging to the power control group in power control group units, based on the acquired I/O amount relating to the power control group. None of the plurality of redundancy configuration groups spans two or more power control groups among the plurality of power control groups, all being contained in any of the plurality of power control groups.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: April 20, 2021
    Assignee: HITACHI, LTD.
    Inventor: Ryosuke Matsubara
  • Patent number: 10976959
    Abstract: An optimized solution for accessing virtual machine state while restoration of a respective virtual machine is underway. Specifically, the optimized solution disclosed herein implements a fetching mechanism for retrieving granular virtual machine state over a network and/or from a remote storage system. The fetching mechanism leverages block allocation information in parallel with disk caching to provide instant (or near instant) access to a virtual machine state while also, concurrently, restoring the respective virtual machine.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: April 13, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Aaditya Bansal, Shelesh Chopra, Soumen Acharya, Sunil Yadav
  • Patent number: 10956325
    Abstract: Embodiments provide for a processor including a cache a caching agent and a processing node to decode an instruction including at least one operand specifying an address range within a distributed shared memory (DSM) and perform a flush to a first of a plurality of memory devices in the DSM at the specified address range.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: March 23, 2021
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Mohan J. Kumar, Thomas Willhalm, Robert G. Blankenship
  • Patent number: 10949346
    Abstract: A data processing system includes a plurality of processing units and a system memory coupled to a memory controller. The system memory includes a persistent memory device and a non-persistent cache interposed between the memory controller and the persistent memory device. The memory controller receives a flush request of a particular processing unit among the plurality of processing units, the flush request specifying a target address. The memory controller, responsive to the flush request, ensures flushing of a target cache line of data identified by target address from the non-persistent cache into the persistent memory device.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: March 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Derek E. Williams, Guy L. Guthrie, John Dodson
  • Patent number: 10936494
    Abstract: A method, article of manufacture, and apparatus for providing a site cache manager is discussed. Data objects may be read from a site cache rather than an authoritative object store. This provides performance benefits when a client reading the data has a better connection to the site cache than to the authoritative object store. The site cache manager controls the volume of stored data on the site cache to enhance performance by increasing the frequency of data object being read from or written to the site cache rather than the authoritative object store.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: March 2, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Vijay Panghal, Deepti Chheda
  • Patent number: 10922236
    Abstract: The present application discloses a cascade cache refreshing method, system, and device. The method in an embodiment of the present specification includes: determining a cache refreshing sequence based on a dependency relationship between caches in a cascade cache; and sequentially determining, based on the cache refreshing sequence, whether the caches in the cascade cache need to be refreshed, and refreshing a cache that needs to be refreshed, where when it is determined that a current cache needs to be refreshed, it is determined whether a cache following the current cache in the cache refreshing sequence needs to be refreshed after the current cache is refreshed.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: February 16, 2021
    Assignee: Advanced New Technologies Co., Ltd.
    Inventor: Yangyang Zhao