Abstract: Embodiments herein describe techniques for an integrated circuit (IC). The IC may include a lower device layer that includes a first transistor structure, an upper device layer above the lower device layer including a second transistor structure, and an isolation wall that extends between the upper device layer and the lower device layer. The isolation wall may be in contact with an edge of a first gate structure of the first transistor structure and an edge of a second gate structure of the second transistor structure, and may have a first width to the edge of the first gate structure at the lower device layer, and a second width to the edge of the second gate structure at the upper device layer. The first width may be different from the second width. Other embodiments may be described and/or claimed.

Abstract: A semiconductor device includes a substrate having a channel region; a gate stack over the channel region; a seal spacer covering a sidewall of the gate stack, the seal spacer including silicon nitride; a gate spacer covering a sidewall of the seal spacer, the gate spacer including silicon oxide, the gate spacer having a first vertical portion and a first horizontal portion; and a first dielectric layer covering a sidewall of the gate spacer, the first dielectric layer including silicon nitride.

Abstract: A method for manufacturing a light emitting device including forming a plurality of first light emitting cells and a plurality of second light emitting cells on one surface of a first substrate, providing a second substrate to face the first and second light emitting cells, selectively bonding the first light emitting cells onto the second substrate, and cutting the second substrate to a mounting unit including at least two first light emitting cells.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a first standard cell; and a second standard cell; wherein a cell width of the first standard cell along a first direction is substantially the same as a cell width of the second standard cell along the first direction, and a cell height of the first standard cell along a second direction perpendicular to the first direction is substantially greater than a cell height of the second standard cell along the second direction.

Abstract: The present disclosure provided an organic light-emitting display device comprising: a substrate where a first direction and a second direction intersecting each other are defined, the substrate on which sub-pixels arranged along the first direction and the second direction; first electrodes of organic light-emitting diodes allocated respectively to the sub-pixels; a first bank having first openings exposing the first electrodes; and a second bank having second openings exposing the first electrode on the first bank, wherein in at least one region, the second opening simultaneously exposes at least two first electrodes neighboring in the third direction.

Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, a cell stacked structure stacked on the substrate in the cell region, a channel layer in one structure penetrating the cell stacked structure, a driving transistor formed in the peripheral region, and a plug structure coupled to the driving transistor and including a stacking structure of at least two contact plugs shorter than the channel layer, wherein each of the contact plugs is arranged at a same height as a part of the cell stacked structure.

Abstract: A light-receiving device of an embodiment of the present disclosure includes a photoelectric conversion layer that includes a first compound semiconductor with a first conductivity type and absorbs a wavelength of an infrared region, a first semiconductor layer formed on the photoelectric conversion layer, and an insulation layer formed to surround the photoelectric conversion layer and the first semiconductor layer, the first semiconductor layer having a second conductivity-type region at a middle region excluding a periphery facing the photoelectric conversion layer.

Abstract: Embodiments of the present disclosure relate to a method of forming a low-k dielectric material, for example, a low-k gate spacer layer in a FinFET device. The low-k dielectric material may be formed using a precursor having a general chemical structure comprising at least one carbon atom bonded between two silicon atoms. A target k-value of the dielectric material may be achieved by controlling carbon concentration in the dielectric material.

Abstract: A field-effect transistor includes a gate structure comprising a structure in which a first insulating layer, a first gate electrode, and a second insulating layer are sequentially stacked on a first conductive layer, the gate structure surrounding a first hole through the first insulating layer and exposing a part of the first conductive layer; a second conductive layer on the second insulating layer and surrounding a second hole connected to the first hole and exposing a part of the first conductive layer; a first gate insulating layer covering an inner wall of the gate structure exposed by the first hole; a semiconductor layer covering a part of the first conductive layer exposed through the first hole and the second hole, the first gate insulating layer, and the second conductive layer; a second gate insulating layer covering the semiconductor layer; and a second gate electrode filling the first and second holes.

Abstract: A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.

Abstract: A method of manufacturing a package structure includes: forming a backside RDL structure on a carrier; forming TIVs on the backside RDL structure; mounting at least one passive device on the backside RDL structure, so that the at least one passive device is disposed between the TIVs; placing a die on the at least one passive device, so that the at least one passive device is vertically sandwiched between the die and the backside RDL structure; forming an encapsulant laterally encapsulating the die, the TIVs, and the at least one passive device; forming a front side RDL structure on a front side of the die, the TIVs, and the encapsulant; releasing the backside RDL structure from the carrier; and mounting a package on the backside RDL structure, wherein the package is electrically connected to the at least one passive device by conductive connectors and solders.

Abstract: A Schottky diode comprises: a first electrode; a second electrode; and a body of semiconductive material connected to the first electrode at a first interface and connected to the second electrode at a second interface, wherein the first interface comprises a first planar region lying in a first plane and the first electrode has a first projection onto the first plane in a first direction normal to the first plane, the second interface comprises a second planar region lying in a second plane and the second electrode has a second projection onto the first plane in said first direction, at least a portion of the second projection lies outside the first projection, said second planar region is offset from the first planar region in said first direction, and one of the first interface and the second interface provides a Schottky contact.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate electrode over the semiconductor substrate. The semiconductor device structure also includes a source/drain structure adjacent to the gate electrode. The semiconductor device structure further includes a spacer element over a sidewall of the gate electrode, and the spacer element has an upper portion having a first exterior surface and a lower portion having a second exterior surface. Lateral distances between the first exterior surface and the sidewall of the gate electrode are substantially the same. Lateral distances between the second exterior surface and the sidewall of the gate electrode increase along a direction from a top of the lower portion towards the semiconductor substrate.

Abstract: A semiconductor device including a substrate; a first active pattern on the substrate and extending in a first direction, an upper portion of the first active pattern including a first channel pattern; first source/drain patterns in recesses in an upper portion of the first channel pattern; and a gate electrode on the first active pattern and extending in a second direction crossing the first direction, the gate electrode being on a top surface and on a side surface of the at least one first channel pattern, wherein each of the first source/drain patterns includes a first, second, and third semiconductor layer, which are sequentially provided in the recesses, each of the first channel pattern and the third semiconductor layers includes silicon-germanium (SiGe), and the first semiconductor layer has a germanium concentration higher than those of the first channel pattern and the second semiconductor layer.

Abstract: The present disclosure provided an organic light-emitting display device comprising: a substrate where a first direction and a second direction intersecting each other are defined, the substrate on which sub-pixels arranged along the first direction and the second direction; first electrodes of organic light-emitting diodes allocated respectively to the sub-pixels; a first bank having first openings exposing the first electrodes; and a second bank having second openings exposing the first electrode on the first bank, wherein in at least one region, the second opening simultaneously exposes at least two first electrodes neighboring in the third direction.

Abstract: A flexible display apparatus includes a panel that includes a display area that displays images and a fan-out portion in which a plurality of wirings connected to the display area are located, and a driving chip connected to the fan-out portion and connected to the display area via the plurality of wirings. The plurality of wirings arranged in the fan-out portion may include first wirings at a first layer on the panel and second wirings at a second layer that is different from the first layer. The first wirings and the second wirings may be in an overlapping relationship above and below each other.

Abstract: A planarization method includes forming a dielectric layer over a polish stop layer. The dielectric layer is polished until reaching the polish stop layer, and the polished dielectric layer has a concave top surface. A compensation layer is formed over the concave top surface. The compensation layer is polished.

Abstract: Methods of manufacture are described. A method includes forming a first cavity in a substrate and placing a backplane in the first cavity. At least one layer of dielectric material is formed over the substrate and the backplane. A second cavity is formed in the at least one layer of the dielectric material to expose at least a portion of a surface of the backplane. A heat conductive material is placed in the second cavity and in contact with the at least the portion of the surface of the backplane.

Abstract: A semiconductor device includes a substrate having an active pattern therein, a gate electrode extending across the active pattern and a source/drain region on the active pattern laterally adjacent the gate electrode. The device further includes a contact structure including a first contact on the source/drain region, a second contact on the first contact and a spacer on sidewalls of the first and second contacts.

Abstract: A display device includes a driving transistor and an organic EL element. The driving transistor includes an oxide semiconductor layer; a first gate electrode that includes a region overlapping the oxide semiconductor layer; a first insulating layer between the first gate electrode and the oxide semiconductor layer; a second gate electrode that includes a region overlapping the oxide semiconductor layer and the first gate electrode; a second insulating layer between the second gate electrode and the oxide semiconductor layer; and a first and a second transparent conductive layer that are provided between the oxide semiconductor layer and the first insulating layer and each include a region contacting the oxide semiconductor layer. The organic EL element includes a first electrode; a second electrode; a light emitting layer between the first electrode and the second electrode; and an electron transfer layer between the light emitting layer and the first electrode.