Patents Examined by Nikolay Yushin
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Patent number: 9640584Abstract: According to one embodiment, a magnetoresistive memory device, includes a metal buffer layer provided on a substrate, a crystalline metal nitride buffer layer provided on the metal buffer layer, and a magnetoresistive element provided on the metal nitride buffer layer. The metal nitride buffer layer and the metal buffer layer contain a same material.Type: GrantFiled: March 11, 2015Date of Patent: May 2, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Makoto Nagamine, Youngmin Eeh, Koji Ueda, Daisuke Watanabe, Kazuya Sawada, Toshihiko Nagase
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Patent number: 9640701Abstract: A method of manufacturing a photodiode including a useful layer made of a semi-conductor alloy. The useful layer has a band gap value which decreases from its upper face to its lower face. A step of producing a first doped region forming a PN junction with a second doped region of the useful layer, said production of a first doped region including a first doping step, so as to produce a base portion; and a second doping step, so as to produce at least one protuberance protruding from the base portion and in the direction of the lower face.Type: GrantFiled: October 21, 2015Date of Patent: May 2, 2017Assignee: Commissariat à l'énergie atomique et aux énergies alternativesInventors: Olivier Gravrand, Johan Rothman
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Patent number: 9640770Abstract: An thin film transistor includes an insulating substrate, an MgO layer, a semiconductor carbon nanotube layer, a functional dielectric layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor carbon nanotube layer is sandwiched between the MgO layer and the functional dielectric layer. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer. The gate electrode is sandwiched between the insulating substrate and the MgO layer.Type: GrantFiled: December 30, 2015Date of Patent: May 2, 2017Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Guan-Hong Li, Qun-Qing Li, Yuan-Hao Jin, Shou-Shan Fan
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Patent number: 9634200Abstract: A semiconductor light emitting device comprises a supporting substrate that has light reflecting characteristics; a wavelength conversion layer that is disposed on the supporting substrate, and contains semiconductor nanoparticles developing a quantum size effect; an optical semiconductor laminate that is disposed on the wavelength conversion layer and has light emitting characteristics; and a photonic crystal layer that is disposed on the optical semiconductor laminate, and that has first portions having a first refractive index and second portions having a second refractive index different from the first refractive index, the first portions and the second portions being arranged in a two-dimensional cyclic pattern.Type: GrantFiled: January 7, 2016Date of Patent: April 25, 2017Assignee: STANLEY ELECTRIC CO., LTD.Inventors: Takuya Kazama, Wataru Tamura, Yasuyuki Miyake
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Patent number: 9634195Abstract: A light-emitting device is provided. The light-emitting device comprises: a semiconductor system comprising a light-emitting semiconductor stack; and an electrode comprising a surface next to the semiconductor system and comprising a base material and a contact material different from the base material, wherein the contact material diffuses into the semiconductor system; wherein the contact material has a largest intensity at a first depth position from a SIMS spectrum, and a distance between the first depth position and the surface is not less than 500 nm.Type: GrantFiled: February 4, 2016Date of Patent: April 25, 2017Assignee: EPISTAR CORPORATIONInventors: Tsen-Kuei Wang, Ming-Yung Jow, Bor-Cherng Chen, Tsung-Ta Yu
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Patent number: 9627568Abstract: Disclosed is a photovoltaic device comprising a substrate composed of an oriented polycrystalline zinc oxide sintered body in a plate shape, a photovoltaic layer provided on the substrate, and an electrode provided on the photovoltaic layer. According to the present invention, a photovoltaic device having high photoelectric conversion efficiency can be inexpensively provided.Type: GrantFiled: October 22, 2015Date of Patent: April 18, 2017Assignee: NGK Insulators, Ltd.Inventors: Mikiya Ichimura, Jun Yoshikawa, Katsuhiro Imai
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Patent number: 9620683Abstract: A light emitting device is provided that may include a light emitting structure including a first conductivity-type semiconductor layer, an active layer provided on the first conductivity-type semiconductor layer, and a second conductivity-type semiconductor layer provided on the active layer, a first electrode that conductively contacts the first conductivity-type semiconductor layer, an insulating layer provided on a portion of the light emitting structure and the first electrode, and a second electrode that conductively contacts the second conductivity-type semiconductor layer, the first electrode including a first portion protruding from a side surface of the first conductivity-type semiconductor layer.Type: GrantFiled: December 28, 2015Date of Patent: April 11, 2017Assignee: LG INNOTEK CO., LTD.Inventors: Keon Hwa Lee, Kwang Ki Choi
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Patent number: 9614082Abstract: The present disclosure relates to a semiconductor structure and a method of preparation including a silicon monocrystalline substrate, and a III-V structure abutting the silicon monocrystalline substrate. The semiconductor structure includes an InaGabAs structure overlaying the III-V structure, where a is from 0.40 to 1, b from 0 to 0.60, and a+b equal to 1.00. The III-V structure has a top surface facing away from the silicon substrate. The top surface is GagXxPpSbsZz, where X includes one or more group III elements other than Ga and Z is one or more group V elements other than P or Sb. g is from 0.80 to 1.00, x is from 0 to 0.20, z is from 0 to 0.30, p is from 0.10 to 0.55, and s is from 0.50 to 0.80, g+x is equal to 1.00 and p+s+z is equal to 1.00.Type: GrantFiled: July 13, 2016Date of Patent: April 4, 2017Assignee: IMEC VZWInventors: Bernardette Kunert, Robert Langer
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Patent number: 9613999Abstract: A semiconductor device is disclosed, which includes: at least one a device layer being a crystallized layer for example including: a superlattice layer and/or a layer of group III-V semiconductor materials; and a passivation structure comprising one or more layers wherein at least one layer of the passivation structure is a passivation layer grown in-situ in a crystallized form on top of the device layer, and at least one of the one or more layers of the passivation structure includes material having a high density of surface states which forces surface pinning of an equilibrium Fermi level within a certain band gap of the device layer, away from its conduction and valence bands.Type: GrantFiled: April 14, 2016Date of Patent: April 4, 2017Assignee: SEMI CONDUCTOR DEVICES—AN ELBIT SYSTEMS-RAFAEL PARTNERSHIPInventors: Philip Klipstein, Olga Klin, Eliezer Weiss
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Patent number: 9608069Abstract: A method of forming a semiconductor device that may include etching source and drain portions of a fin structure of a first semiconductor material selectively to an underlying semiconductor layer of a second semiconductor material, and laterally etching undercut region in the semiconductor layer underlying the fin structure. The method may further include filling the undercut region with a first conductivity type semiconductor material, and forming a second conductivity type semiconductor material for a source region and a drain region on opposing sides of the channel region portion of the fin structure.Type: GrantFiled: April 13, 2016Date of Patent: March 28, 2017Assignee: Intenational Business Machines CorporationInventors: Veeraraghavan S. Basker, Zuoguang Liu, Tenko Yamashita, Chun-Chen Yeh
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Patent number: 9608011Abstract: The present invention discloses a thin-film transistor and a fabricating method thereof, an array substrate and a display apparatus. An active layer in the thin-film transistor comprises a first active layer and a second active layer which are stacked; wherein, an orthographic projection of the first active layer on the substrate covers orthographic projections of the source electrode, the drain electrode as well as a gap located between the source electrode and the drain electrode on the substrate, and covers an orthographic projection of the gate electrode on the substrate; the second active layer is located at the gap between the source electrode and the drain electrode, and an orthographic projection of the second active layer on the substrate is located in a region where the orthographic projection of the gate electrode on the substrate is located.Type: GrantFiled: March 16, 2015Date of Patent: March 28, 2017Assignees: Boe Technology Group Co., Ltd., Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Ying Zhang, Xin Li, Hong Zhu, Hongjun Yu
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Patent number: 9608046Abstract: The present disclosure relates to an organic light emitting diode display having a quantum dot. The present disclosure suggests an organic light emitting diode display including a substrate having a plurality of pixel area, each pixel area having a light emitting area and a non-light emitting area; a thin film transistor disposed in the non-light emitting area; an organic light emitting diode including an anode electrode, a cathode electrode and a source energy layer between the anode electrode and the cathode electrode, connected to the thin film transistor, and disposed in the light emitting area; an encapsulation layer joined on the substrate; and a quantum light emitting layer radiating lights having any one wavelength by an energy from the source energy layer, and disposed on an inner surface of the encapsulation layer as corresponding to the source energy layer.Type: GrantFiled: December 28, 2015Date of Patent: March 28, 2017Assignee: LG DISPLAY CO., LTD.Inventors: Choonghoon Lee, Sungjin Park
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Patent number: 9608217Abstract: The present invention provides a transistor element having a laminated structure, the laminated structure comprising a sheet-like base electrode being arranged between an emitter electrode and a collector electrode; at least one p-type organic semiconductor layer being provided on each of the surface and the back sides of the base electrode; and a current transmission promotion layer being formed, on each of the surface and back sides of the base electrode, between the base electrode and the p-type organic semiconductor layer or layers provided on each of the surface and back sides of the base electrode. According to the present invention, it becomes possible to provide a transistor element (MBOT) that is, in particular, stably supplied through a simple production process, has a structure capable of being mass-produced, and has a large current modulation effect and an excellent ON/OFF ratio at a low voltage in the emitter electrode and the collector electrode.Type: GrantFiled: April 27, 2012Date of Patent: March 28, 2017Assignees: DAINICHISEIKA COLOR & CHEMICALS MFG. CO., LTD.Inventors: Ken-ichi Nakayama, Junji Kido, Ryotaro Akiba, Naomi Oguma, Naoki Hirata
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Patent number: 9608007Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.Type: GrantFiled: March 8, 2016Date of Patent: March 28, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
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Patent number: 9601562Abstract: A highly reliable semiconductor device including an oxide semiconductor is provided. Provided is a semiconductor device including an oxide semiconductor layer, an insulating layer in contact with the oxide semiconductor layer, a gate electrode layer overlapping with the oxide semiconductor layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The oxide semiconductor layer includes a first region having a crystal whose size is less than or equal to 10 nm and a second region which overlaps with the insulating layer with the first region provided therebetween and which includes a crystal part whose c-axis is aligned in a direction parallel to a normal vector of the surface of the oxide semiconductor layer.Type: GrantFiled: March 8, 2016Date of Patent: March 21, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masahiro Takahashi, Takuya Hirohashi, Masashi Tsubuku, Masashi Oota
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Patent number: 9601671Abstract: Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities.Type: GrantFiled: July 15, 2015Date of Patent: March 21, 2017Assignees: The Board of Trustees of the University of Illinois, Semprius, Inc.Inventors: John Rogers, Ralph Nuzzo, Matthew Meitl, Etienne Menard, Alfred Baca, Michael Motala, Jong-Hyun Ahn, Sang-Il Park, Chang-Jae Yu, Heung Cho Ko, Mark Stoykovich, Jongseung Yoon
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Patent number: 9601604Abstract: An electronic device and a method of fabricating an electronic device are disclosed. The device includes a body of semiconductor material, and a conductive material defining at least three conducting contacts to form respective terminals. The semiconductor material and the conducting contacts overlap at least partially to define the device, so that the electrical characteristics of the device between any pair of terminals correspond to those of a varistor. The body of semiconductor material may be a layer deposited by printing or coating. The varistor characteristics between each pair of terminals enable switching of an electrical current between one terminal and any two other terminals in such a manner that when there is a positive current into a first terminal, there is a negligible current through a second terminal at which a positive potential is applied and a positive current out of a third terminal which is held at a negative potential with respect to the second terminal.Type: GrantFiled: September 20, 2013Date of Patent: March 21, 2017Assignee: PST Sensors (Proprietary) LimitedInventors: David Thomas Britton, Margit Haerting, Stanley Douglas Walton
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Patent number: 9601603Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.Type: GrantFiled: March 16, 2016Date of Patent: March 21, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Takeshi Osada, Shunpei Yamazaki
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Patent number: 9601656Abstract: A low cost, high efficiency light-emitting diode design is disclosed. In some embodiments, a p-n junction of a light-emitting diode is formed in an epitaxial layer grown on a substrate. Grinding the backside of an associated wafer after encapsulation not only opens a light path for the light emitting diode but removes most residual defects.Type: GrantFiled: June 15, 2015Date of Patent: March 21, 2017Assignee: Silego Technology, Inc.Inventor: John Othniel McDonald
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Patent number: 9589952Abstract: A reverse conducting IGBT is provided with a trench gate member that is provided in an IGBT region and has a lattice-pattern layout, and a trench member that is provided in a diode region and has a stripe-pattern layout. The diode region of the semiconductor substrate includes an anode region of a first conductive type, a drift region of a second conductive type and a barrier region of the second conductive type. The barrier region is electrically connected to a top surface electrode via a pillar member that extends from a top surface of the semiconductor substrate.Type: GrantFiled: April 11, 2016Date of Patent: March 7, 2017Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Masaru Senoo