Abstract: A method of forming a well on a semiconductor substrate and a transistor on the main surface of this well. A mask exposing a region for the well is formed on the main surface of the semiconductor substrate. Subsequently, ions of impurities for forming the well are implanted on the main surface of the region for the well of the semiconductor substrate using this mask with high energy giving concentration distribution of impurities which becomes maximum at a place deeper than a region for a transistor. Subsequently, ions of impurities of the same conductivity type as that of ions for forming the well are implanted on the main surface of the region for the well of the semiconductor substrate using the mask with low energy giving concentration distribution of impurities in which impurities stay in the region for the channel of the transistor.

Abstract: A quantum effective device and its method of manufacture are disclosed, wherein said device comprises quantum well boxes composes of a semiconductor substrate and a compound semiconductor on the surface of the semiconductor substrate at least comprising a first and a second elemental component and a semiconductor overlayer overlying said quantum well boxes and the surface portion of the exposed semiconductor substrate and wherein the quantum well boxes have an epitaxially grown single crystal structure obtained by depositing fine droplets of liquid phase composed of the first elemental component on the surface of the semiconductor substrate in the heated state and then incorporating a second elemental component different from the first elemental component in said droplets.

Abstract: According to this invention, there is provided to a method of manufacturing semiconductor devices including the steps of ion-implanting at least one impurity selected from As, P, Sb, Si, B, Ga, and Al in a wafer prior to a predetermined manufactural process of semiconductor devices in the semiconductor wafer grown by the Czochralski technique, and thereafter annealing the wafer at a temperature of at least 900.degree. C. Nonuniformity of an impurity concentration of the wafer can be improved. The difference in characteristics among the semiconductor devices manufactured in the wafer is decreased, a product yield can be increased, and the quality of the semiconductor devices can be improved.

Abstract: After doping a conductive layer made of a semiconductive material with impurites, a conductive layer with a deep trap level is formed by low temperature annealing. For forming such a conductive layer with a deep level, lattice defects are introduced into a conventional conductive layer through ion implantation and after that, only stable lattice defects, that can work as deep levels, remain by annealing at low temperature.

Abstract: Apparatus and method for buffing articles, such as leather goods, silverware and the like. The apparatus includes a flexible container for receiving an article to be buffed. The interior of the container has a buffing material therein and is of a size to permit relative movement of the article and the buffing material so that, when the container is moved about, such as in the drum of a clothes dryer, the article and the buffing material move continuously into frictional engagement with each other causing a buffing action to occur. Several embodiments of the container are disclosed. A clothes dryer can be used for moving the container. In the alternative, a coin operated drum can be provided.

Abstract: A single crystal silicon substrate which comprises an electric insulation member and a single crystal silicon film formed on the insulation member. The silicon film has first regions and second regions. Each of the first regions is formed as a strip shape and has a high density of inorganic impurities implanted thereinto. Each of the second regions is formed as a strip shape and has a low density of the impurities. The first and second regions are alternatively arranged contacting with each other so that the first regions are separated from each other.

Abstract: A hollow graphite susceptor for supporting semiconductor substrates during processing in epitaxial reactor systems. The susceptor has reduced wall thickness to provide lower thermal mass for rapid heating and high wafer throughput. Early failure of this thin-walled susceptor is avoided by providing a raised reinforcing boss on its interior surface in alignment with each recess on the exterior surface.

Abstract: A method and structure for forming a trench within a semiconductor layer (12) of material is provided. A first mask structure comprising a third insulating layer (20) and a fourth insulating layer (22) is formed adjacent a semiconductor layer (12). Sidewall spacers comprising a first and second portion (30) and (32) are formed along the sidewall (25) of layers (20) and (22) and extending outwardly therefrom. A second mask structure comprising a field insulating region (36) is formed adjacent first sidewall spacer portions (30) and along semicondcutor layer (12). The foot portions (34) of first sidewall spacer portions (30) are removed thereby defining an exposed area (38) between the first mask structure and second mask structure. A trench (40) may then be formed between the two mask structures and filled with dielectrical material in order to isolate a semiconductor mesa (42) from semiconductor regions (44a) and 44b).

Abstract: A method of fabricating a semiconductor integrated circuit carrying a first type semiconductor device wherein at least a part thereof is formed within a substrate and a second type semiconductor device which is provided on an oxide layer formed on the substrate, comprises steps of providing a silicon nitride film on the substrate selectively in correspondence to where the first type semiconductor device is to be formed, oxidizing the substrate using the silicon nitride film as an oxidation resistant mask to form an oxide layer in correspondence to where the substrate is not covered by the silicon nitride film, depositing a silicon layer on the substrate so as to bury thereunder the silicon nitride film and the oxide layer, annealing the silicon layer such that the silicon layer is caused to melt and crystallized subsequently to form a single crystal silicon layer, and patterning the single crystal silicon layer such that the single crystal silicon layer is removed except for a part thereof covering a region o

Abstract: A planar type semiconductor laser having p-side and n-side electrodes on the same side of the substrate. The substrate carries a number of layers including lower and upper cladding layers sandwiching an active layer. Both of the cladding layers are of n-type material. A pair of p-type diffusion regions serve to define the width of an undisordered active stripe in the active layer. A first relatively deep diffusion region penetrates both cladding layers and extends into the substrate. A second shallower diffusion region spaced, from the first, penetrates only to the lower cladding layer and leaves a channel below the diffusion front in the lower cladding layer for conduction of carriers. The distance between the p-type diffusion regions defines the width of the active layer. An n-side electrode is formed on the upper surface of the semiconductor device and in electrical contact with the n-type cladding layers.

Abstract: A process of decontaminating a surface contaminated with a toxic chemical agent in which there is applied to the contaminated surface, a macroporous cross-linked hydrophobic copolymer containing an agent which is a decontaminant for the toxic chemical agent present on the surface. The decontaminant can be a chemical neutralizer such as sodium hydroxide; lithium hydroxide; concentrated bleach; and mixtures of diethylene triamine, 2-methoxy ethanol, and sodium hydroxide, for example.

Abstract: A method and apparatus for removing surface contaminants from the surface of a substrate by high-energy irradiation is provided. The invention enables removal of surface contaminants without altering of the substrate's underlying molecular structure. The source of high-energy irradiation may comprise a pulsed laser.

Abstract: The ratio between variations in the oxygen concentration before and after a silicon wafer is subjected to two types of heat treatments in which the temperatures and processing times are different is defined. The silicon wafer is subjected to a first heat treatment, and the interstitial oxygen concentrations before and after the first heat treatment are respectively set to [Oi].sub.1ini and [Oi].sub.1af. The silicon wafer is successively subjected to second and third heat treatments, and the interstitial oxygen concentrations before and after the second and third heat treatments are respectively set to [Oi].sub.2ini and [Oi].sub.2af. At this time, the interstitial oxygen concentrations [Oi].sub.1ini, [Oi].sub.1af, [Oi].sub.2ini and [Oi].sub.2af are so set as to satisfy the condition that ([Oi].sub.2ini -[Oi].sub.2af)/[Oi].sub.1ini -[Oi].sub.1af).gtoreq.20.

Abstract: A semiconductor device which has a non-single crystal semiconductor layer formed on a substrate and in which the non-single crystal semiconductor layer is composed of a first semiconductor region formed primarily of non-single crystal semiconductor and a second semiconductor region formed primarily of semi-amorphous semiconductor. The second semiconductor region has a higher degree of conductivity than the first semiconductor region so that a semiconductor element may be formed.

Abstract: A low-temperature (650.degree. C. to 800.degree. C.) in-situ dry cleaning process (FIG. 2) for removing native oxide (and other contaminants) from a semiconductor surface can be used with either multi-wafer or single-wafer semiconductor device manufacturing reactors. A wafer is contacted with a dry cleaning mixture of germane GeH.sub.4 and hydrogen gas (51), such that the germane:hydrogen flow ratio is less than about 0.15:12000 sccm. The dry cleaning mixture can include a halogen-containing gas (such as HCl or HBr) (52, 54) to enhance cleaning of metallic contaminants, and/or anhydrous HF gas (53, 54) to further lower the process temperature. The dry cleaning process can be achieved by introducing some or all of the hydrogen and/or an inert gas as a remote plasma. The dry cleaning process is adaptable as a precleaning step for multiprocessing methodologies that, during transitions between process steps, reduce thermal cycling (FIGS. 3c-3e) by reducing wafer temperature only to an idle temperature (350.

Abstract: The invention is a method of ion implantation of dopant ions into a substrate of silicon carbide. In the method, the implantation takes place at elevated temperatures, following which the substrate may be oxidized or annealed.

Abstract: A semiconductor device comprises a first electrode provided on a semiconductor substrate, and constituting a lower wiring layer, an insulating layer provided on the first electrode and the substrate, and a second electrode, which constitutes an upper wiring layer and is connected to the first electrode through a contact hole pierced through the insulating layer. The first electrode includes at least one of high melting point metal layer and high melting point metal silicide layer. The surface of the insulating layer is flattened by heat treatment.

Abstract: A lift-off method for fine patterning includes the steps of: applying a photoresist layer to a substrate; implanting ions into predetermined regions in a surface layer of the photoresist layer; irradiating the photoresist layer with ultraviolet from above; developing the photoresist layer to form a resist pattern for lift-off; depositing a desired material with a predetermined thickness from above the resist pattern; and removing the resist pattern, thereby lifting off the material on the resist pattern, whereby a fine pattern of the desired material is left on the substrate.

Abstract: An improved method for conditioning the surface of a pad for polishing a dielectric layer formed on a semiconductor substrate is disclosed. In one embodiment, the serrated edge of an elongated blade member is first placed in radial contact with the surface of the polishing pad. The table and the pad are then rotated relative to the blade member. At the same time, the blade member is pressed downwardly against the pad surface such that the serrated edge cuts a plurality of substantially circumferential grooves into the pad surface. These grooves are dimensioned so as to facilitate the polishing process by creating point contacts which increases the pad area and allows more slurry to applied to the substrate per unit area. Depending on the type of pad employed, the number of teeth per inch on the serrated edge, the type of slurry used, etc., the downward force applied to the blade member in the rotational speed of the table are optimized to obtain the resultant polishing rate and uniformity desired.

Abstract: The method of treating a surface of a substrate (12) comprises the steps of physically treating the surface by jetting hydrogen peroxide containing ice particles (28) onto the substrate surface, and chemically treating the substrate surface with hydrogen peroxide solution obtained by melting the hydrogen peroxide containing ice particles (28).