Patents Examined by Patricia Nguyen
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Patent number: 8854127Abstract: Embodiments provide a DC-DC converter (DC-DC=direct current to direct current) for envelope tracking. The DC-DC converter includes a digital control stage and a driving stage. The digital control stage is configured to provide a digital control signal based on digital information describing an amplitude of a digital baseband transmit signal. The driving stage is configured to provide a supply voltage for an RF amplifier (RF=radio frequency) based on the digital control signal.Type: GrantFiled: May 15, 2012Date of Patent: October 7, 2014Assignee: Intel Mobile Communications GmbHInventor: Franz Kuttner
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Patent number: 8841972Abstract: An electronic device, a fiber-optic communication system comprising the electronic device and a method of operating the electronic device are provided. The electronic device comprises a transimpedance-type amplifier having a transimpedance stage comprising an amplifier which is coupled in series with an input node. A feedback resistor is coupled in series between an output node of the amplifier and an inverting input node of the amplifier to provide a virtual ground node which is coupled to the input node, the inverting input node of the amplifier and to the feedback resistor. A current source is coupled to the virtual ground node so as to compensate for an offset current in an input signal which is coupled to the input node of the electronic device. Further, the electronic device comprises a control stage which is configured to control the current source as a function of a current through the feedback transistor.Type: GrantFiled: October 19, 2012Date of Patent: September 23, 2014Assignee: Texas Instruments Deutschland GmbHInventor: Gerd Schuppener
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Patent number: 8836421Abstract: An output network for use with a multi-transistor amplifier circuit comprises N transistors configured to provide a Chireix outphasing behavior. The N transistors coupled to receive different amplitude and/or phase signals relative to a source signal. The output network comprises: a plurality of branches arranged in a hierarchical structure between N input nodes and an output node; at least one branch connection arranged between the input nodes and the output node, wherein each branch connection is arranged to couple first and second branches from an input side to a single branch on an output side. The hierarchical structure is arranged asymmetrically such that at least one branch connection comprises a different number of input nodes ultimately connected to its first branch compared to the number of input nodes ultimately connected to its second branch.Type: GrantFiled: May 31, 2012Date of Patent: September 16, 2014Assignee: Telefonaktiebolaget L M Ericsson (Publ)Inventor: Richard Hellberg
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Patent number: 8836432Abstract: An amplifier includes an amplifying element that amplifies an input signal; an output terminal that outputs the signal amplified by the amplifying element; a matching circuit disposed in series between the amplifying element and the output terminal, and performing impedance matching; an impedance converter disposed in series between the amplifying element and the matching circuit or between the matching circuit and the output terminal; and a first resonator and a second resonator connected at the ends of the impedance converter.Type: GrantFiled: January 13, 2013Date of Patent: September 16, 2014Assignee: Fujitsu LimitedInventors: Toru Maniwa, Shigekazu Kimura
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Patent number: 8829995Abstract: A method is provided for process, voltage, temperature (PVT) stable transfer function calibration in a differential amplifier. The gain resistors of a differential amplifier are initially selected to achieve a flat amplitude transfer function in the first frequency band. After calibration, the degeneration capacitor is connected and tuned until a peaked amplitude transfer function is measured, which is resistant to variations in PVT. As an alternative, the degeneration capacitor is not disconnected during initial calibration. Then, the gain resistors and the degeneration capacitor values are selectively adjusted until the first peaked amplitude transfer function is obtained. The peaked amplitude transfer function remains even more stable to variations in PVT than the flat amplitude calibration method.Type: GrantFiled: September 9, 2013Date of Patent: September 9, 2014Assignee: Applied Micro Circuits CorporationInventor: Hanan Cohen
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Patent number: 8823458Abstract: A cascode circuit includes a first transistor and a second transistor. The first transistor and the second transistor are connected to make a cascode. In addition, the circuit has a block capacitance which is connected between a control terminal of the second transistor and a source terminal of the first transistor. In addition, the circuit has a feedback element which is connected between a drain terminal of the second transistor and a control terminal of the first transistor.Type: GrantFiled: September 27, 2012Date of Patent: September 2, 2014Assignee: Intel Mobile Communications GmbHInventors: Stephan Leuschner, Jan-Erik Mueller
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Patent number: 8816768Abstract: A power module for envelope tracking includes a linear amplifier and a DC-to-DC (Direct Current to Direct Current) converter. The linear amplifier has a positive input terminal for receiving a first control signal, a negative input terminal, and an output terminal for outputting a first adaptive supply voltage, wherein the output terminal is fed back to the negative input terminal. The DC-to-DC converter receives a second control signal, and supplies a second adaptive supply voltage to the linear amplifier according to the second control signal. The first control signal is related to the second control signal.Type: GrantFiled: September 12, 2012Date of Patent: August 26, 2014Assignee: Mediatek Inc.Inventors: Chun-Yen Tseng, Yen-Hsun Hsu
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Patent number: 8816767Abstract: A system and method of calibrating an amplifier are presented. The amplifier has a first amplification path and a second amplification path. A first state of the amplifier is identified defining a first phase shift of the first path and a second phase shift of the second path resulting in a maximum efficiency of the amplifier when an attenuation of the first path and an attenuation of the second path are set to first attenuation values. The attenuation of the first path and the attenuation of the second path is set to achieve a maximum efficiency of the amplifier when the phase shift of the first path and the phase shift of the second path are set according to the first state.Type: GrantFiled: January 10, 2014Date of Patent: August 26, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Abdulrhman M. S. Ahmed, Paul R. Hart, Ramanujam Shinidhi Embar
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Patent number: 8810312Abstract: An apparatus and an operating method of an asymmetric Doherty power amplifier. A Doherty power amplifier apparatus includes a power divider configured to provide a power signal to a carrier amplifier and a peaking amplifier. The apparatus also includes the carrier amplifier configured to amplify a power of the signal input from the power divider. The apparatus further includes the peaking amplifier configured to have a maximum output power magnitude different from the carrier amplifier and amplify the power of the signal input from the power divider. The apparatus still further includes at least two offset transmission lines disposed at ends of the carrier amplifier and the peaking amplifier and configured to regulate a load impedance. The apparatus also includes an output combiner configured to combine and output outputs of the carrier amplifier and the peaking amplifier of different sizes.Type: GrantFiled: January 6, 2012Date of Patent: August 19, 2014Assignees: Samsung Electronics Co., Ltd., Postech Academy-Industry Foundation Postech Univ. of Science and TechnologyInventors: Il-Du Kim, Bumman Kim
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Patent number: 8803606Abstract: An apparatus for amplifying power is provided. The apparatus includes a supply modulator for generating a supply voltage based on an amplitude component of a transmission signal, and a power amplify module for amplifying power of the transmission signal using the supply voltage, wherein the power amplify module includes a first power amplifier and a second power amplifier, and when an output power of the transmission signal is greater than a reference power, the first power amplifier amplifies the power of the transmission signal using the supply voltage, and when the output power of the transmission signal is equal to or less than the reference power, the second power amplifier amplifies the power of the transmission signal using the supply voltage.Type: GrantFiled: December 27, 2013Date of Patent: August 12, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hyung-Sun Lim, Hee-Sang Noh, Young-Eil Kim, Bok-Ju Park, Sang-Hyun Baek, Ji-Seon Paek, Jun-Seok Yang
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Patent number: 8803605Abstract: An integrated circuit is described for providing a power supply to a radio frequency (RF) power amplifier (PA). The integrated circuit includes a low-frequency power supply path including a switching regulator and a high-frequency power supply path arranged to regulate an output voltage of a combined power supply at an output port of the integrated circuit for coupling to a load. The combined power supply is provided by the low-frequency power supply path and high-frequency power supply path. The high-frequency power supply path includes: an amplifier including a voltage feedback and arranged to drive a power supply signal on the high-frequency power supply path; and a capacitor operably coupled to the output of the amplifier and arranged to perform dc level shifting of the power supply signal.Type: GrantFiled: January 9, 2012Date of Patent: August 12, 2014Assignee: MediaTek Singapore Pte. Ltd.Inventors: Paul Fowers, Patrick Stanley Riehl
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Patent number: 8803600Abstract: An output buffer circuit capable of enhancing stability includes an operational amplifier, a capacitive load and an output control unit. The operational amplifier has a positive input terminal, a negative input terminal and an output terminal, and generates an output voltage to the output terminal according to an input voltage received by the positive input terminal. The output control unit is coupled between the output terminal of the operational amplifier and the capacitive load, and is utilized for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to form a signal output path and for adjusting impedance of the signal output path when the signal output path is formed. The output control unit comprises a plurality of output switches for individually turning on or off the electrical connection between the output terminal and the capacitive load of the operational amplifier.Type: GrantFiled: August 23, 2012Date of Patent: August 12, 2014Assignee: NOVATEK Microelectronics Corp.Inventors: Xie-Ren Hsu, Ji-Ting Chen, Yao-Hung Kuo
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Patent number: 8803607Abstract: There is provided a power amplifier capable of increasing linear output power and efficiency without sacrificing an overall gain by employing a vector modulation function in a driving stage, with no separate vector modulator. The power amplifier includes a driving stage performing vector-modulation on an input RF signal to provide an I channel signal and a Q channel signal having different phases and amplifying the I channel signal and the Q channel signal to set gains; and a power stage amplifying power levels of the signals amplified by the driving stage.Type: GrantFiled: February 28, 2012Date of Patent: August 12, 2014Assignees: Samsung Electro-Mechanics Co., Ltd., Korea Advanced Institute of Science & TechnologyInventors: Ki Yong Son, Gyu Suck Kim, Yoo Sam Na, Song Cheol Hong, Bon Hoon Koo
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Patent number: 8797102Abstract: A high-frequency module including a power amplifying circuit includes a high-frequency power amplifying element, a matching circuit, and a driving power-supply circuit. The high-frequency power amplifying element includes a high-frequency amplifying circuit and a directional coupler. A first end of a main line of the directional coupler is connected to an output terminal of a latter-stage amplifying circuit of the high-frequency amplifying circuit. A second end of the main line of the directional coupler is connected through an output matching circuit to a high-frequency signal output terminal of the high-frequency power amplifying element. The output terminal of the latter-stage amplifying circuit is also connected to a second driving power-supply voltage application terminal of the high-frequency power amplifying element. The second driving power-supply voltage application terminal is connected to the high-frequency signal output terminal by a connecting conductor.Type: GrantFiled: October 22, 2012Date of Patent: August 5, 2014Assignee: Murata Manufacturing Co., Ltd.Inventor: Hiroyuki Hirooka
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Patent number: 8791755Abstract: A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.Type: GrantFiled: October 6, 2011Date of Patent: July 29, 2014Assignee: Lantiq Deutschland GmbHInventors: Dario Giotta, Thomas Poctscher, David San Segundo Bello, Andreas Wiesbauer
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Patent number: 8791753Abstract: Embodiments of a capacitance sensing system including an integrating amplifier and methods for operating the same to provide a higher slew rate and bandwidth are described. In one embodiment, the integrating amplifier comprises an input stage including an inverting input coupled to an electrode of a capacitor to sense a capacitance and a non-inverting input coupled to a reference potential, and an output stage including a compensating capacitor coupled to an output. The compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor.Type: GrantFiled: August 21, 2012Date of Patent: July 29, 2014Assignee: Cypress Semiconductor CorporationInventors: Saravanan Murugesan, Paul Walsh, Gerard Baldwin, Kaveh Hosseini
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Patent number: 8786372Abstract: This application reduces the power of series combined transformers and of parallel combined transformers while maintaining efficiency. In one embodiment, a series combined transformer is provided with a switch between a first primary inductor and a second primary inductor, in order to provide at least two modes. In a high power mode, the switch is open and the series combined transformer operates normally. In a low power mode, the switch is closed, one amplifier from a first differential amplifier pair is shut down, one amplifier from a second differential pair is shut down, and the series combined transformer operates efficiently in a low power mode.Type: GrantFiled: October 22, 2012Date of Patent: July 22, 2014Assignee: RF Micro Devices, Inc.Inventors: Wayne D. Tattershall, David E. Jones
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Patent number: 8786373Abstract: Techniques for bypassing a supply voltage for an amplifier are disclosed. In an exemplary design, an apparatus includes an amplifier and an adjustable bypass circuit. The amplifier (e.g., a power amplifier) receives a supply voltage from a supply source. The adjustable bypass circuit is coupled to the supply source and provides bypassing for the supply voltage. The adjustable bypass circuit includes an adjustable capacitor or a fixed capacitor coupled to an adjustable resistor. The supply source may be (i) a power supply source providing a fixed supply voltage for the amplifier or (ii) an envelope tracker providing a variable supply voltage for the amplifier.Type: GrantFiled: February 21, 2012Date of Patent: July 22, 2014Inventors: Calogero D. Presti, Jose Cabanillas
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Patent number: 8779851Abstract: A circuit for linearizing a power amplifier. The circuit includes a main signal path comprising a digital-to-analog converter, wherein a main signal is transmitted through the main signal path to said power amplifier; and a digital pre-distortion path disposed outside of the main signal path, wherein the digital pre-distortion path includes a digital pre-distorter for digitally pre-distorting the main signal.Type: GrantFiled: May 15, 2012Date of Patent: July 15, 2014Assignee: Integrated Device Technology, Inc.Inventor: Kiomars Anvari
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Patent number: 8779858Abstract: An amplifier circuit comprises a measurement path with an amplifier (1) for providing an output voltage (Vout) depending on a measuring current (Ipd) with a first and a second amplifier input (11, 12), and an amplifier output (13). A return path of the amplifier circuit comprises a first filter (2), an auxiliary amplifier (3) and a second filter (4). In this case, the first filter (2) is designed to filter a DC voltage from the output voltage (Vout) and is connected to the amplifier output (13). The auxiliary amplifier (3) serves to convert an input voltage (Vfil) into an output current (Ifil) and has a first and a second auxiliary amplifier input (31, 32) and an auxiliary amplifier output (33). In this case, the first auxiliary amplifier input (31) is connected to the first filter (2). The second filter (4) is designed to filter noise from the output current (Ifil) and couples the auxiliary amplifier output (33) to the first amplifier input (11).Type: GrantFiled: March 3, 2011Date of Patent: July 15, 2014Assignee: ams AGInventors: Mark Niederberger, Vincenzo Leonardo