Patents Examined by Patricia Nguyen
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Patent number: 8773201Abstract: An amplifying device 1 of the present invention performs distortion compensation on distortion appearing in input-output characteristics of an amplifier 4 based on an input signal and an output signal of the amplifier 4, and includes a predistorter 23 that obtains the input signal and the output signal and performs distortion compensation of the amplifier; an ACLR calculation unit 25 that detects the distortion level of the distortion of the amplifier 4; and an adjustment unit 26 that adjusts the power of the input signal in accordance with the distortion level.Type: GrantFiled: September 8, 2010Date of Patent: July 8, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takashi Yamamoto, Tadashi Araki
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Patent number: 8766716Abstract: An apparatus of a hybrid power modulator using interleaving switching is provided. The apparatus includes a linear switching unit for generating an output signal by comparing an envelope input signal and a feedback signal, an interleaving signal generator for generating an interleaving switching signal arranged not to supply the signal to input stages of P-type Metal-Oxide-Semiconductor (MOS) Field Effect Transistors (FETs) and N-type MOS FETs of power cells at the same time by comparing the output signal and a reference signal, and a switching amplifying unit for determining a level of the switching signal using the interleaving switching signal. Hence, the hybrid power modulator using the interleaving switching method in the envelope signal of the wide bandwidth maintains high efficiency and high linearity. In addition, the buck converter can use the single inductor by preventing the simultaneous on/off of the power cells.Type: GrantFiled: October 15, 2012Date of Patent: July 1, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Ji-Seon Paek, Dong-Ki Kim, Hee-Sang Noh, Hyung-Sun Lim, Jun-Seok Yang, Young-Eil Kim
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Patent number: 8766717Abstract: Embodiments of the present invention include a method and system for control of a multiple-input-single output (MISO) device. For example, the method includes determining a change in power output level from a first power output level to a second power output level of the MISO device. The method also includes varying one or more weights associated with respective one or more controls of the MISO device to cause the change in power output. The one or more controls can include one or more of (a) a phase control of one or more input signals to the MISO device, (b) a bias control of the MISO device, and (c) an amplitude control of the input signals to the MISO device.Type: GrantFiled: August 2, 2012Date of Patent: July 1, 2014Assignee: ParkerVision, Inc.Inventors: David F. Sorrells, Gregory S. Rawlins
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Patent number: 8766728Abstract: A trans-impedance amplifier (TIA) for an optical receiver is disclosed, in which the TIA enhances the dynamic range thereof but suppresses the variation of the input impedance thereof. The TIA enhances the dynamic range by subtracting from the photocurrent input therein, which varies the input impedance. The TIA also provides the variable gain amplifier with a feedback resistor. The variable gain of the amplifier compensates the variation of the input impedance due to the current subtraction.Type: GrantFiled: November 26, 2012Date of Patent: July 1, 2014Assignee: Sumitomo Electric Industries, LtdInventors: Makoto Ito, Yoshiyuki Sugimoto, Keiji Tanaka
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Patent number: 8766718Abstract: An exemplary system comprises a linearizer, a power amplifier, and a feedback block. The linearizer may be configured to use a predistortion control signal to add predistortion to a receive signal to generate a predistorted signal. The power amplifier may be configured to amplify power of the predistorted signal to generate a first amplified signal. The power amplifier may also add high side and low side amplifier distortion to the predistorted signal. The high side and low side amplifier distortion may cancel at least a portion of the predistortion. The feedback block may be configured to capture a feedback signal based on a previous amplified signal from the power amplifier, to determine high side and low side distortion of the captured feedback signal, and to generate the predistortion control signal based on the determined high side and low side distortion.Type: GrantFiled: October 1, 2012Date of Patent: July 1, 2014Assignee: Aviat U.S., Inc.Inventors: Frank Matsumoto, Youming Qin
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Patent number: 8754709Abstract: The present invention discloses a Doherty power amplifier and a method for implementing the Doherty power amplifier. The Doherty power amplifier includes a peak amplifying branch and a carrier amplifying branch, wherein, the peak amplifying branch includes a radio frequency switch, and the radio frequency switch is configured to control on/off of a last stage peak power amplifier in the peak amplifying branch; wherein, a high voltage heterojunction bipolar transistor (HVHBT) device is adopted for a last stage carrier power amplifier of the carrier amplifying branch, and a laterally diffused metal oxide semiconductor (LDMOS) device is adopted for the last stage peak power amplifier of the peak amplifying branch of the power amplifier. By the present invention, it avoids that the peak power consumption is increased when the peak power amplifier is on ahead of time and enhances the efficiency of the whole power amplifier.Type: GrantFiled: October 27, 2011Date of Patent: June 17, 2014Assignee: ZTE CorporationInventors: Huazhang Chen, Jianli Liu, Xiaojun Cui
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Patent number: 8754705Abstract: An audio amplifier is powered by a switch mode power supply optimized for audio applications. The power supply includes a rectifier circuit and a discontinuous mode multiphase isolated flyback power circuit and does not require a separate power factor correction stage. The discontinuous mode multiphase isolated flyback power circuit includes multiple isolated flyback converters operating synchronously to each convert a portion of the power and supply a phase-summed direct current voltage to the audio amplifier.Type: GrantFiled: May 15, 2012Date of Patent: June 17, 2014Assignee: Crestron Electronics Inc.Inventor: Robert Buono
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Patent number: 8749312Abstract: Techniques for optimizing a cascade gain device comprising at least two gain stages are disclosed. A first noise figure associated with the first gain stage is incrementally increased by a plurality of noise figure increments determined based, at least in part, on a minimum noise figure and a maximum noise figure associated with the first gain stage. At each of the plurality of noise figure increments, at least a gain value that corresponds to the noise figure increment is calculated. One of the plurality of noise figure increments and the corresponding gain value is selected as an optimum noise figure of the first gain stage and an optimum gain value of the first gain stage respectively. Parameters of an inter-stage matching network associated with the first gain stage are configured based on the optimum noise figure and the optimum gain of the first gain stage.Type: GrantFiled: April 18, 2012Date of Patent: June 10, 2014Assignee: QUALCOMM IncorporatedInventor: Celestino A. Corral
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Patent number: 8742852Abstract: A differential amplifier capable of canceling an input offset current and expanding a linearly operating range is disclosed. The differential amplifier, which is preferably applicable to an optical receiver to convert a photocurrent into a voltage signal, includes a trans-impedance amplifier and an offset canceller that detects output offset and extracts input current to cancel the output offset. Moreover, the extracted input current traces the average level of the input voltage to widen the linearly operating range of the trans-impedance amplifier.Type: GrantFiled: May 2, 2012Date of Patent: June 3, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventor: Yoshiyuki Sugimoto
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Patent number: 8742843Abstract: Various embodiments are directed to apparatuses and methods to reduce average power dissipation in transceiver stages such as power amplifiers and low noise amplifiers (LNAs) that process signals of varying output amplitudes. Power dissipation may be reduced by varying the supply voltage in sympathy with the amplitude of the signal and/or the stage current density which may also be varied in sympathy with the signal amplitude.Type: GrantFiled: December 19, 2011Date of Patent: June 3, 2014Assignee: Intel CorporationInventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
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Patent number: 8742853Abstract: An amplifier system comprises a cascode common-source (CS) amplifier including a plurality of transistors connected in a common-source configuration. A stress reducing circuit is connected to at least one of the plurality of transistors to equalize a voltage drop across the plurality of transistors. The stress reducing circuit includes a first transistor including a control terminal, a first terminal and a second terminal. The second terminal of the first transistor is connected to a first terminal of a first one of the plurality of transistors. A capacitance has a first terminal connected to the control terminal of the first transistor and a second terminal connected to a control terminal of a second one of the plurality of transistors.Type: GrantFiled: October 19, 2012Date of Patent: June 3, 2014Assignee: Marvell World Trade Ltd.Inventors: Aaron Vinh Thanh Do, Poh Boon Leong
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Patent number: 8742844Abstract: A power amplifier device includes an input terminal for a RF input signal. The power amplifier device includes an output terminal a RF output signal. The power amplifier device includes a first power amplifier connected to the input terminal, amplifies the RF input signal with a first gain, and outputs a first amplified signal. The power amplifier device includes a second power amplifier that amplifies a signal on the basis of the first amplified signal and outputs a second amplified signal with a second gain. The power amplifier device includes a low-pass filter or a band-pass filter that filters the second amplified signal. The power amplifier device includes an amplitude comparator to compare the first amplitude of the first comparison signal generated from the RF input signal with the second amplitude of the second comparison signal generated from the filtered signal and to output an amplitude comparison signal.Type: GrantFiled: September 5, 2012Date of Patent: June 3, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Shouhei Kousai
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Patent number: 8742842Abstract: A power amplifier architecture includes high and low power paths. The high power path may include a number of different amplifier structures. The low power path includes a switching element configured to short a signal line to ground or provide an open between the signal line and ground. The low power path and an output of the high power path are summed at a summing junction. Circuitry, responsive to one or more control signals, is configured in a high power mode to turn on amplifier(s) in the amplifier structure, route an input signal through a driver amplifier to the high power path and place the switching element in one of the open/closed positions; the circuitry is configured in a low power mode to turn off the amplifier(s), route the input signal through a driver amplifier to the low power path and place the switching element in the other position.Type: GrantFiled: August 21, 2012Date of Patent: June 3, 2014Assignee: Nokia Siemens Networks OyInventors: Kodanda R Engala, Darrell Barabash
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Patent number: 8736379Abstract: A power circuit includes a RF transistor and an input match network coupled to an input to the RF transistor and to an input to the power circuit. The input match network includes a resistor, an inductor and a capacitor that are coupled together in series between the input to the RF transistor and a ground. The values of the resistor and the inductor are selected to match an input impedance of the RF transistor to a source impedance at the input to the power circuit over at least a portion of a high frequency range, wherein the value of the capacitor has a substantially negligible contribution to the match at the high frequency range. The value of the capacitor is selected so that the series combination of the resistor, the inductor and the capacitor substantially reduce the magnitude of the impedance presented to the input of the RF transistor in a low frequency range relative to the source impedance at the input to the power circuit.Type: GrantFiled: February 8, 2013Date of Patent: May 27, 2014Assignee: Infineon Technologies AGInventors: Richard Wilson, Saurabh Goel
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Patent number: 8736383Abstract: A power amplifier circuit uses an output transistor and a cascode transistor. First and second drive circuits apply gate control signals to the two transistors, which rise and fall in synchronism, and this is such that the voltage drop across the cascode transistor is reduced (compared to a constant gate voltage being applied to the output transistor).Type: GrantFiled: January 16, 2013Date of Patent: May 27, 2014Assignee: NXP, B.V.Inventors: Mustafa Acar, Mark Pieter van der Heijden
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Patent number: 8736365Abstract: A system including a power amplifier and a pre-distortion module coupled to the power amplifier. The pre-distortion module includes one or more smaller versions of the power amplifier to generate a pre-distortion signal that compensates for any memory-effect or inertia present in the power amplifier with application on frequency hopping and larger (up to 1 octave) instantaneous bandwidth communication systems.Type: GrantFiled: October 31, 2011Date of Patent: May 27, 2014Assignee: Empower RF Systems, Inc.Inventors: Paulo Correa, Andre A. Castro
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Patent number: 8736378Abstract: An output matching network comprising a plurality of impedance matching circuits. The inputs of each of the plurality of impedance matching circuits are connected to a first input of the output matching network. The outputs of each of the plurality of impedance matching circuits are connected to a plurality of first outputs of the output matching network. One of the plurality of impedance matching circuits is active at a given time. The active impedance matching circuit of the plurality of impedance matching circuits exhibits a first input impendence at a first frequency band. Each inactive impedance matching circuit of the plurality of impedance matching circuits exhibits a second input impedance at the first frequency band. The second input impendence is at least 10 times greater than the first input impendence.Type: GrantFiled: November 30, 2012Date of Patent: May 27, 2014Assignee: Anadigics, Inc.Inventor: Gary Hau
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Patent number: 8736381Abstract: The invention concerns a detection device including a photodiode (Ph) designed to capture a luminous signal to transform it into a current (Iph) and including first and second terminals, a transimpedance amplifier circuit connected between the first terminal and the second terminal of the photodiode (Ph) and designed to amplify the current (Iph) coming from the photodiode (Ph). The transimpedance amplifier circuit includes a plurality of operational amplifiers (AOP1, AOP2, AOP3) connected in parallel and a gain resistor (Rgain) common to all the connected amplifiers.Type: GrantFiled: October 12, 2012Date of Patent: May 27, 2014Assignee: Schneider Electric Industries SASInventors: Laurent Chiesi, Hynek Raisigel
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Patent number: 8729961Abstract: A voltage output device capable of preventing an increase in circuit scale includes an offset compensation function and is suitably applicable to a drive circuit for display devices. The voltage output device includes an operational amplifier having an inverting input terminal and a non-inverting input terminal. Resistance values of a load resistor on the inverting input side and a load resistor on the non-inverting input side are maintained when the output voltage of the amplifier has changed while sequentially varying either one or both of the resistance values of the load resistor on the inverting input side and the load resistor on the non-inverting input side in a state that the inverting input terminal and the non-inverting input terminal are connected. The voltage output device is configured to output the output voltage of the amplifier with the inverting input terminal not connected to the non-inverting input terminal.Type: GrantFiled: January 30, 2013Date of Patent: May 20, 2014Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Hiroyoshi Ichikura
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Patent number: 8717097Abstract: An amplifier with improved noise reduction is disclosed. In one implementation, an amplifier is provided that includes a main output stage configured to output an amplified signal at a main output terminal, a secondary output stage configured to output a copy of the amplified signal at a secondary output terminal, and a signal coupler configured to provide a variable resistance coupling between the secondary output terminal and the main output terminal to reduce noise at the main output terminal.Type: GrantFiled: September 16, 2011Date of Patent: May 6, 2014Assignee: QUALCOMM IncorporatedInventor: Vijayakumar Dhanasekaran