Abstract: A surveillance camera system includes a power sourcing equipment corresponding to a midspan having one or more of integrated input/output (I/O) and audio port functionality, the power sourcing equipment including processing circuitry, one or more data ports, one or more of an I/O port and an audio port, and a Power over Ethernet (PoE) port. Additionally, the surveillance camera system includes a camera connected to the power sourcing equipment by the PoE port, and a computer connected to the power sourcing equipment by one of the data ports, wherein the computer is configured to receive data from and transmit data to the camera via the power sourcing equipment.

Abstract: An electronic device controls so as to perform display on a display that is visible through the proximity portion; regardless of whether proximity to the proximity portion is detected or not, place the electronic device in a predetermined state to reduce power consumption of the electronic device in response to elapse of a first period without an operation on the operation member; and in a case where proximity to the proximity portion is not detected, place the electronic device in the predetermined state to reduce power consumption of the electronic device in response to elapse of a second period without an operation on the operation member and without proximity to the proximity portion. The second period is shorter than the first period.

Abstract: Techniques for network-management-card-assisted shutdown of hyperconverged infrastructure (HCI) are disclosed. A network management card (NMC) includes: a network interface communicatively coupled with an HCI environment; one or more processors; and one or more non-transitory computer-readable media storing instructions. The instructions, when executed by the one or more processors, cause the one or more processors to perform operations including: receiving, from the HCI environment via the network interface, a selection of a set of shutdown instructions from multiple sets of shutdown instructions supported by the NMC, the multiple sets of shutdown instructions being configured to support shutdown processes for at least two different HCI platforms; detecting that the HCI environment is performing a shutdown; and finalizing the shutdown at least by executing the set of shutdown instructions.

Abstract: A storage controller communicates with an external device including a submission queue and a completion queue. An operation method of the storage controller includes receiving a notification associated with a command from the external device, based on a first clock, fetching the command from the submission queue, based on a second clock, performing an operation corresponding to the fetched command, based on a third clock, writing completion information to the completion queue, based on a fourth clock, and transmitting an interrupt signal to the external device, based on a fifth clock. Each of the first clock to the fifth clock is selectively activated depending on each operation phase.

Abstract: A clock comparator sign control is used in a compare operation. A clock comparator sign control that determines whether unsigned arithmetic or signed arithmetic is to be used in a comparing operation is obtained. The clock comparator sign control is then used in a comparison of a value of a clock comparator and at least a portion of a value of a time-of-day clock to determine whether a selected action is to be recognized.

Abstract: A system includes one or more data processors and a non-transitory computer-readable storage medium containing instructions which, when executed on the one or more data processors, cause the one or more data processors to perform operations. The operations include receiving a modified basic input-output system (BIOS) setting using an application programming interface (API). The modified BIOS setting includes an attribute describing at least one extensible firmware interface (EFI) variable. The operations further include storing the modified BIOS setting in a future setting data structure in a baseboard management controller (BMC). The operations further include providing a current setting data structure stored in the BMC. The operations further include replacing at least a portion of the current setting data structure with the modified BIOS setting to provide a modified current setting data structure. The modified current setting data structure is then applied to the system.

Abstract: A storage device is disclosed. The storage device may include a first storage. The first storage may include a primary firmware slot to store a first firmware, a secondary firmware slot to store a second firmware, a primary file system slot to store an existing file system, and a secondary file system slot. The storage device may include a processor configured to execute the first firmware or the second firmware. The storage device may include a second storage for user data, the second storage configured to use the existing file system. The second firmware may include a tag indicating that the second firmware is subject to bootup activation.

Abstract: In one embodiment, a method includes identifying at a first powered device in communication with power sourcing equipment, a second powered device in communication with the first powered device, wherein the first powered device is receiving high voltage pulse power from the power sourcing equipment, notifying the power sourcing equipment of the second powered device at the first powered device, and performing a low voltage power initialization at the first powered device with the second powered device before passing the high voltage pulse power to the second powered device.

Abstract: A booting method is provided, applied to a computer system. The computer system includes a transmission interface, a power key, and a trigger element. The transmission interface includes a transmission specification and is electrically connected to a graphics card, and the power key is used for driving the computer system to perform a booting procedure. The booting method includes: detecting, in the booting procedure, whether the trigger element is triggered or not; and lowering the transmission specification and restarting the computer system when the trigger element is triggered. A computer system adopting the booting method is further provided.

Abstract: In a computing device it may be determined whether to power down a subsystem based on how long the subsystem has been idle and based on one or more measurements of subsystem current consumption, subsystem bandwidth usage, and subsystem efficiency. An idle power-down count value may be determined based on the measurements, using predetermined relations among subsystem current consumption, subsystem bandwidth usage, and subsystem efficiency. The subsystem may be powered down based on a determination of whether the subsystem has been idle for an interval not less than the idle power-down count value.

Abstract: An information handling system downloads device drivers for recovery operation of the information handling system, and subsequently obtains first configuration information associated with each of the device drivers. The system performs an inventory of devices associated with the information handling system that includes obtaining second configuration information associated with each of the devices in the inventory, and compares the first configuration information and the second configuration information. If the particular device driver is missing, then the system downloads the particular device driver prior to boot to a service operating system.

Abstract: A computer device, a setting method for a memory module, and a mainboard are provided. The computer device includes a memory module, a processor, and the mainboard. A basic input output system (BIOS) of the mainboard stores an extreme memory profile (XMP). When the processor performs the BIOS so that the computer device displays a user interface (UI), the BIOS displays an overclocking option corresponding to the XMP in a selection list of the UI. When the BIOS receives a selection request corresponding to the overclocking option of the selection list, the BIOS reads multiple memory setting parameters corresponding to the XMP, and configures the memory module according to the memory setting parameters.

Abstract: Disclosed are a method of underlying drive forwarding and a multi-core system implemented based on a UEFI, which can increase a running speed of the multi-core system implemented based on a UEFI. The underlying drive forwarding method is configured for underlying drive forwarding of a multi-core system. The multi-core system is implemented based on a UEFI and includes an application processor and a bootstrap processor. The bootstrap processor is provided with an execution interface configured to call underlying hardware. The application processor is configured with an instruction interface corresponding to the execution interface.

Abstract: In described examples, an integrated circuit (IC) includes a first temperature sensor, a processor, a second temperature sensor, and a reset module. The first sensor senses a first body temperature of the IC. The processor asserts a thermal shutdown signal if the first body temperature exceeds a first threshold. In response to the thermal shutdown signal, the second sensor asserts a reset request signal and senses a second body temperature of the IC. If the second body temperature is less than a second threshold, the second sensor asserts a reset end signal. The reset module outputs a system reset signal to the first sensor and the processor if the reset request signal is asserted, and outputs a system recovery signal if the reset end signal is asserted. The first sensor and the processor deactivate if the system reset signal is asserted, and activate if the system recovery signal is asserted.

Abstract: In one embodiment, a processor includes at least one core to execute instructions, one or more thermal sensors associated with the at least one core, and a power controller coupled to the at least one core. The power controller has a control logic to receive temperature information regarding the processor and dynamically determine a maximum allowable average power limit based at least in part on the temperature information. The control logic may further maintain a static maximum base operating frequency of the processor regardless of a value of the temperature information. Other embodiments are described and claimed.

Abstract: An Information Handling System (IHS) includes multiple hardware devices, and a baseboard Management Controller (BMC) in communication with the plurality of hardware devices. The BMC includes executable instructions for beginning execution of a first BMC firmware stack, and during execution of the first BMC firmware stack, halt execution of the first BMC firmware stack, and begin execution of a second BMC firmware stack. At least a portion of the executable instructions used to generate the first BMC firmware stack are different than the executable instructions used to generate the second BMC firmware stack.

Abstract: Technology described herein is generally directed towards an efficient process to selectively boot (e.g., initialize, re-boot, re-initialize and/or the like) one or more nodes of a server node system based on contextual information that can be automatically acquired. In an embodiment, a system can comprise a processor, and a memory that stores executable instructions that, when executed by the processor, can facilitate performance of operations. The operations can comprise monitoring operational activity of a node of a software-defined object storage system. The operations can comprise, in response to occurrence of a negative activity event determined based on a result of the monitoring, determining whether a node reboot of the node is to be implemented. The operations can comprise, based on the operational activity analyzed, setting a reboot flag indicating that the node reboot is to comprise a reboot of less than all components of the node.

Abstract: An asynchronous temperature control integrated device includes a graphics card body including a graphics processor and a power supply circuit, at least one external fan connection port, a first heat dissipation device, at least one first temperature sensor, a second heat dissipation device, a plurality of second temperature sensors, a plurality of light emission elements, and a control device including an externality control member, a high-power drive module, and a scenario database. Thus, two groups of heat dissipation device and temperature sensor are provided to respectively detect the temperatures of two major heat sources on the graphics card body, and the heat dissipation performances of the two heat dissipation devices are individually controllable to make timely and efficient operations of the heat dissipation devices, and also to collaboratively drive an external fan to thereby enhance overall airflow, reduce system internal temperature, and achieve bettered conditions of temperature control.

Abstract: An apparatus to shorten the time taken for executing a booting process includes, in one embodiment, a connection processing unit that establishes communication with and acquires information from a plurality of devices that are communicably coupled externally to an information processing device, the information relating to the plurality of devices regardless of whether a booting process is executed. The apparatus also includes a communication control unit that executes communication with each of the plurality of devices during the booting process, and a first processing unit that one of enables or disables communication between the communication control unit and a selected one of the plurality of devices in response to the acquired information related to the selected one of the plurality of devices. A method and a computer program product also perform functions of the apparatus.

Abstract: An information processing apparatus includes: at least one device; a first processor configured to control the at least one device; a second processor configured to verify validity of a program to be executed by the first processor, and to allow the first processor to execute the program when the program is determined to be valid; and a control circuit configured to control supply of power to the at least one device. The second processor starts the verification of the program in response to the information processing apparatus being powered on. The first processor starts the execution of the program at least based on a first control signal indicating that the program is determined to be valid. The control circuit starts the supply of the power to the at least one device before the determination that the program is valid.