Abstract: There is provided an apparatus comprising a requirement determination unit to determine an energy requirement for a system component. A status determination unit determines status information relating to a plurality of heterogeneous energy stores and actuating system control unit controls an activity of the system component in dependence on the status information relating to the plurality of heterogeneous energy stores and the energy requirement.

Abstract: Systems and methods disclosed herein allow efficient reallocation of PoE when a PSU for a PSE fails. A PSE initially receives power from at least two PSUs and provides PoE to at least two PDs. When power from one of the PSUs becomes unavailable, the PSE refrains from providing PoE to a first PD, but continues providing PoE to a second PD. The PSE sends a communication to the second PD requesting that the second PD allow the PSE to allocate less power to the second. If the second PD confirms that allocating less power to the second PD is acceptable, the PSE reduces the amount of power allocated to the second PD and allocates at least some of the power saved by the reduction to the first PD.

Abstract: Approaches in accordance with various embodiments can be used to provide bootstrap data for a computing device, such as a system on chip (SoC). In particular, various embodiments can use one or more shift registers to receive bits of a sequence of bootstrap data in parallel. Individual bits of this bootstrap data sequence can then be provided to the SoC, from the shift register(s), serially and using a single input. Such an approach prevents the need for multiple bootstrap pins on the SoC, as well as the need to multiplex those pins for use with other external devices.

Abstract: A method of operating a memory controller is disclosed. The method includes transmitting data signals to a memory device over each one of at least two parallel data links. A timing signal is sent to the memory device on a first dedicated link. The timing signal has a fixed phase relationship with the data signals. A data strobe signal is driven to the memory device on a second dedicated link. Phase information is received from the memory device. The phase information being generated internal to the memory device and based on a comparison between the timing signal and a version of the data strobe signal internally distributed within the memory device. A phase of the data strobe signal is adjusted relative to the timing signal based on the received phase information.

Abstract: The present invention describes a method of accelerating execution of one or more application tasks in a computing device using machine learning (ML) based model. According to one embodiment, a neural accelerating engine present in the computing device receives a ML input task for execution on the computing device from a user. The neural accelerating engine further retrieves a trained ML model and a corresponding optimal configuration file based on the received ML input task. Also, the current performance status of the computing device for executing the ML input task is obtained. Then, the neural accelerating engine dynamically schedules and dispatches parts of the ML input task to one or more processing units in the computing device for execution based on the retrieved optimal configuration file and the obtained current performance status of the computing device.

Abstract: Systems, apparatuses, and methods related to thermal leveling are described. Thermal leveling can be performed on a host computing system as opposed to on a memory system. Thermal leveling can include operations performed by a host to control temperature characteristics and/or power consumption of a memory system. For instance, a host computing system can control temperature characteristics of multiple memory devices that are deployed in a memory system. In an example, a set of processing resources (e.g., a thermal leveling component) can be provided on a host. The set of processing resources can receive information corresponding to thermal characteristics of a memory device coupled to the host and control a thermal setting for the memory device based on the received thermal characteristics.

Abstract: An IHS (Information Handling System) may transition to a low-power state when the IHS is not in use. Upon detecting a wake event, such as a button being pressed, the IHS exits the low-powers state and resumes a full-power operating state. When a wake event is inadvertently triggered, the IHS may reverted to full-power operations without the user's knowledge. In order to detect false wake events, embodiments determine contextual information about the current status of the IHS, such as power status, operational status and user status, at the time of the wake event detection. If a valid wake event is detected, the operating system is notified of the wake event. If the wake event is determined to be inadvertent based on the context of the IHS, such as the IHS being in transport and/or the user not being present in proximity to the IHS, the wake event may be disregarded.

Abstract: The systems and methods manage thermal states of a device through user configuration of a client application on the device. The systems and methods set thermal thresholds associated with the device. The systems and methods infer the thermal thresholds from information gathered by a client application running on the device. The systems and methods implement a stored policy associated with a violation of one of the thermal thresholds by one of the monitored thermal states.

Abstract: A master-slave interchangeable power supply device, a power supply method, a host with the master-slave interchangeable power supply device, and a computer-readable storage medium for use in execution of the power supply method are provided. Upon receipt of a start command, a power control module and a power supply unit of the power supply device operate in a master mode and a slave mode respectively, and then the power supply device provides a working power to a master device to effect related configuration of the power supply device, so as to allow the power control module to switch to the slave mode and allow the working power to be provided to the master device. Therefore, given compliance with a specification of a communication bus, the power control module and the power supply unit, which function as peripheral devices, can perform a communicative function.

Abstract: Various techniques are provided to implement fast boot for programmable logic devices (PLDs). In one example, a method includes performing a read operation on a non-volatile memory to obtain a first value. The method further includes comparing the value to a predetermined value to obtain a comparison result. The method further includes determining whether a boot image stored on the non-volatile memory is to be read based at least on the first comparison result. The method further includes performing, based on the determining, a read operation on the boot image to obtain data associated with booting of a device. The method further includes booting the device based at least on the data. Related systems and devices are provided.

Abstract: An embedded multiprocessor system is provided that includes a multiprocessor system on a chip (SOC), a memory coupled to the multiprocessor SOC, the memory storing application software partitioned into an initial boot stage and at least one additional boot stage, and a secondary boot loader configured to boot load the initial boot stage on at least one processor of the multiprocessor SOC, wherein the initial boot stage begins executing and flow of data from the initial boot stage to the at least one additional boot stage is disabled, wherein the application software is configured to boot load a second boot stage of the at least one additional boot stage on at least one other processor of the multiprocessor SOC and to enable flow of data between the initial boot stage and the second boot stage.

Abstract: An information processing device includes an acquirer that acquires first date and time information including information relating to a date and time at which a battery detachably installed in a moving body capable of moving by use of electric power is used and second date and time information including position information of a user's portable terminal and information relating to a date and time at which the position information is acquired; and an integrator that generates position history information of the battery on the basis of the first date and time information and the second date and time information acquired by the acquirer.

Abstract: A method for configuring and deploying execution environments for software applications includes receiving a bootstrap execution environment from a data store, the bootstrap execution environment including a software application, the software application including a manifest of dependencies. The method includes executing the bootstrap execution environment and determining whether an enhanced execution environment is available from the data store. When the enhanced execution environment is available from the data store, the method includes receiving the enhanced execution environment from the data store and enhancing the bootstrap execution environment based on the received enhanced execution environment. When the enhanced execution environment is not available from the data, the method includes enhancing the bootstrap execution environment based on the manifest of dependencies to create the enhanced execution environment and storing the enhanced execution environment in the data store.

Abstract: A circuit for modifying a clock signal, the circuit comprising: a delay unit configured to receive the clock signal and delay the clock signal so as to output a plurality of delayed versions of the clock signal, each delayed version being delayed by a different amount of delay to the other delayed versions; a delay estimator configured to determine an amount of delay for modifying the clock signal; and a multiplexer configured to: receive each of the delayed versions of the clock signal; select a delayed version of the clock signal in dependence on the determined amount of delay; and output the selected version of the clock signal.

Abstract: A network switch can be configured using a boot loader after a reset of a controller within the network switch. The boot loader configures switching logic within the network switch prior to an operating system becoming operational. By allowing the boot loader to configure the switching logic, the network switch can become operational as fast as possible.

Abstract: The present disclosure relates to systems, methods, and computer readable media for enabling server devices to utilize a higher percentage of power resources while maintaining sufficient availability of power resources of a datacenter or other collection of server devices. For example, systems disclosed herein determine and implement power shaving actions based on virtual machine metadata and in accordance with a power shaving policy to facilitate a significantly higher utilization of power resources on a datacenter during normal operation as well as within periods of limited power capacity on various server devices. Systems described herein provide more efficient utilization of power resources while maintaining service availability guarantees for a variety of virtual machines hosted by servers of the datacenter.

Abstract: An electronic device for controlling switching timing is described. The electronic device includes load voltage measuring circuitry configured to measure a load voltage to produce a load voltage measurement. The electronic device also includes a processor coupled to the load voltage measuring circuitry. The processor is configured to determine whether a load voltage spike is indicated by the load voltage measurement. The processor is configured to control switching timing based on whether a load voltage spike is indicated.

Abstract: Embodiments of the present invention relate to a method and a device for providing a clock signal to an application, comprising (a) determining a time difference between a clock device and the clock signal; if the time difference is above a predetermined threshold x, (b) calibrating a first time unit and, during calibrating the first time unit, (c) using a second time unit for providing the clock signal to the application.

Abstract: The components of a firmware that are to be executed are identified, such as firmware device drivers and SMI interrupt handlers. Performance data is also obtained for the components. An inventory identifying the components and the performance data are provided to a BMC. The BMC provides the inventory and the performance data to a remote management client through an out-of-band (“OOB”) network connection. The BMC might also receive a blacklist instruction from the management client. The blacklist instruction provides an indication to the BMC that one or more of the components of the firmware are not to be executed by the computing system. The BMC provides the blacklist instruction to the firmware. The firmware adds the component, or components, identified in the blacklist instruction to a blacklist. The next time the computing system is booted, the firmware will not execute the components identified in the blacklist.

Abstract: A data processing apparatus includes a plurality of power domains controlled by respective power control signals PCS. Power control circuitry includes mapping circuitry which maps a plurality of power status signals PSS indicative of the power status of respective power domains, and received from those power domains, to form the power control signals which are then supplied power domains. The mapping circuitry may be controlled by mapping parameters stored within a memory mapped array. The mapping parameters may specify that a given power control signal is either sensitive or insensitive to the power status of a particular other power domain within the data processing apparatus-2. The mapping parameters may be fixed or software programmable.