Abstract: Provided is device linked context identification and notification. Context data of a user profile of a user is retrieved from an external storage. The context data is analyzed to place user activities of the user and surrounding activities around the user in activity categories and to assign tags for the user activities and the surrounding activities. In response to receiving a notification that shutdown of a first device being used by the user is about to occur, current context data and historical context data are compared to determine whether the current context data for the user is one of typical and unusual and to predict a future action of the user. A device shutdown notice is sent to a second device with the current context data, the determination of whether the current context data for the user is one of typical and unusual, and the prediction of the future action.

Abstract: Described is a process measurement device having an interface for connecting a plug-in memory, in which a processing measurement device includes a memory operating device that can switch the process measurement device into a memory access mode when the memory is connected to the process measurement device. Also described is a power supply that ensures that the energy demand required for read access or write access to the process measurement device is automatically covered after the connection of the memory by increasing the amount of electrical energy that is freely available in the process measurement device. Undesired undersupply of the process measurement device can thereby be effectively avoided.

Abstract: Systems and methods for managing power and data usage in a mobile electronic communications device entail detecting a sleep state of a user of the device, and entering an idle mode when the sleep state of the user is deep sleep, wherein the idle mode restricts device CPU and network activities to exclude user-centric operations. When the sleep state of the user changes from the deep sleep state, the device exits the idle mode and enters an operative state to execute any pending user-centric operations.

Abstract: Techniques for managing energy use of a computing deployment are provided. In one embodiment, a computer system can establish a performance model for one or more components of the computing deployment, where the performance model models a relationship between one or more tunable parameters of the one or more components and an end-to-end performance metric, and where the end-to-end performance metric reflects user-observable performance of a service provided by the computing deployment. The computer system can further execute an algorithm to determine values for the one or more tunable parameters that minimize power consumption of the one or more components, where the algorithm guarantees that the determined values will not cause the end-to-end performance metric, as calculated by the performance model, to cross a predefined threshold. The computer system can then enforce the determined values by applying changes to the one or more components.

Abstract: In certain aspects, a tag memory comprises a plurality of non-configurable tag columns configured to be powered on during a normal operation; and a plurality of configurable tag columns, wherein a first portion of the plurality of configurable tag columns is configured to be powered off during the normal operation and a second portion of the plurality of configurable tag columns is configured to be powered on during the normal operation.

Abstract: The present disclosure generally relates to power management for an external storage device. The external storage device includes a power allocation unit coupled to an array of memory devices. A single bridge is present to provide a connection to a host device. The memory devices have operational power states that utilize a first amount of power and non-operational power states that utilize a second amount of power that is less than the first amount of power. The power allocation unit changes the power state of the individual memory devices between operational and non-operational based upon need, but also ensures that the external storage device does not exceed the total power allocation. Thus, the power allocation unit may change a power state of one memory device from operational to non-operational in order to change the power state of another memory device from non-operational to operational.

Abstract: Systems and methods are disclosed for data storage performance scaling based on external energy. In certain embodiments, a system may comprise a data storage device having an interface to communicate with an external device, a nonvolatile memory, and a circuit. The circuit may be configured to receive an indication via the interface of power resources available to the data storage device from the external device in case of a power loss event, adjust a performance metric of the data storage device to apply when accessing the nonvolatile memory during normal power availability based on the indication, and perform operations during normal power availability based on the performance metric.

Abstract: A data storage device may consist of a non-volatile memory having rewritable in-place memory cells each with a read-write asymmetry. The non-volatile memory can store boot data that is subsequently loaded by a selection module of the data storage device. The selection module may bypass a memory buffer of the data storage device to load the boot data.

Abstract: The systems and methods manage thermal states of a device through user configuration of a client application on the device. The systems and methods set thermal thresholds associated with the device. The systems and methods infer the thermal thresholds from information gathered by a client application running on the device. The systems and methods implement a stored policy associated with a violation of one of the thermal thresholds by one of the monitored thermal states.

Abstract: Presented herein are methodologies for securing BIOS/bootloader function including booting a computer system from a BIOS image stored in a first boot flash device, detecting an indication of a pending BIOS upgrade, in response to detecting the indication of a pending BIOS upgrade, accessing an upgraded BIOS image stored on a second boot flash device, validating a version of the upgraded BIOS image, authenticating the upgraded BIOS image using a signature stored in a first region of the second boot flash device, when the version of the upgraded BIOS image is validated, and the upgraded BIOS image is authenticated, writing the signature to a second region of the second boot flash device that is different from the first region, locking the second region of the second boot flash device, and rebooting the computer system from the second boot flash device.

Abstract: An apparatus calculates, based on attribute information of a new job and jobs that have been executed, a first similarity level of the attribute information between the new job and the jobs by using a calculation expression, identifies a job whose attribute information is most similar to that of the new job as a first candidate job, and estimates power consumption to be consumed by the new job at power consumption of the first candidate job. The apparatus calculates, for at least one of the jobs, a second similarity level of power consumption between the at least one of the jobs and the new job, identifies a job whose power consumption is most similar to that of the new job as a second candidate job, and adjusts the calculation expression to increase the first similarity level to be calculated between the new job and the second candidate job.

Abstract: A system on chip (SOC) is provided. The system on chip includes a non-volatile memory, an exception detector, and a processor. The non-volatile memory stores a first bootset in a first region, the first bootset including a booting operation bootloader for a first booting operation and stores a second bootset in a second region that is different from the first region. The exception detector is activated after execution of an initialization bootloader, detects an exception occurrence in the system on chip, and generates a reset signal in response to the exception occurrence that is detected. The processor performs a second booting operation by using the second bootset in response to the reset signal received from the exception detector during the first booting operation performed by using the first bootset.

Abstract: A boot secure device that performs a secure booting operation of a semiconductor system includes an external memory interface that provides an interface with an external memory, a first internal memory that stores a boot image stored in the external memory, a second internal memory that stores a hash of a first public key, a secure accelerator that verifies the boot image using the hash of the first public key, and a secure boot sequencer that includes a plurality of states and a plurality of operation and that controls the external memory interface, the first internal memory, the second internal memory, and the secure accelerator using at least one of the plurality of operations when a state transition occurs between two of the plurality of states.

Abstract: Voltage regulators generate voltage rails that power a central processing unit (CPU). The CPU communicates power management instructions to a power supply controller that drives the voltage regulators. The power supply controller sets a voltage level of a voltage rail generated by a voltage regulator in accordance with a power management instruction received from the CPU. The power supply controller enables the voltage regulator to operate in discontinuous conduction mode (DCM) independent of power state commands from the CPU.

Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may execute a first information handling system (IHS) initialization executable of a first IHS initialization executable/operating system (OS) executable pair; execute a second OS executable of a second IHS initialization executable/OS executable pair via an OS context; determine, by the second OS executable, that at least one application has been installed on the IHS in addition to multiple applications that have already been installed on the IHS; determine, by the second OS executable, information associated with the at least one application and at least one of system information, power configuration information, status configuration information, and hardware information; and provide first information that recommends how to configure power utilization of the IHS and second information that recommends how not to configure power utilization of the IHS based at least on the determined information.

Abstract: A power module for a computer system includes an internal source of stored energy and a group of interface ports, including a management port and non-management ports. The management port provides a control interface to control the power module. The non-management ports each lack the control interface of the management port, and each provide a signal indicating that the power module has a sufficient amount of the stored energy to power a defined operation by external devices coupled to and drawing power from said non-management ports. The management port will typically provide a similar signal to the coupled management device. The signal may be implemented as a high or low voltage level on a serial interface cable pin.

Abstract: A receiver includes a first receiving circuit that receives a first data including a first symbol transmitted using three signals over a first data lane, the first data lane including three signal lines respectively corresponding to the three signals. The first receiving circuit includes a delay adjustment circuit configured to adjust a delay amount of at least one of the three signals.

Abstract: Reducing power consumption of an electrical device is provided. The electrical device includes a first and a second module. The first and second modules include a first and a second memory, and a first and second system on chip (SoC) respectively. The first and second SoCs include a first and a second micro-processor respectively. A PCI-e bus connects the modules. The second module enters a sleep mode state that includes a first and a second sleep mode. The second module transitions between the first and second sleep modes while in the sleep mode state. The second SoC reduces a power state of the second module during the first sleep mode, and powers off the second SoC during the second sleep mode.

Abstract: A memory is configured to store statistics indicative of historical vehicle use patterns. A processor is programmed to identify a next reboot time and top locations at which reboot is allowed according to the statistics, and upon transition to a keyoff state, reboot a vehicle controller responsive to confirmation that a current time has reached at least the next reboot time and that the vehicle is located at one of the top locations.

Abstract: The present invention provides methods and apparatuses for computer system security. According to certain aspects, embodiments of the invention comprise a portable storage device that, when attached, “unlocks” a computer system, such as a desktop, laptop, tablet computer running a conventional operating system such as Windows, thereby creating added security. More particularly, embodiments of the invention use a standard USB memory stick as an “ignition key” to unlock and operate a PC, tablet or other computer system. The ignition key can be required to boot the computer, utilize peripheral devices, ports, network connections, a keyboard and/or a mouse of the computer system, and limit access to certain parts of computer. According to further aspects, in these and other embodiments, the invention is implemented using a modified BIOS that prevents a computer from fully booting into an operational state until verifying the presence of, and information stored on the “ignition key” connected to the computer.