Abstract: Apparatus and methods may provide for subscribing a thread to a resource monitor through a machine specific register and subscribing the thread to a class of service through the machine specific register. The resource monitor or the class of service for the thread may be changed without interrupting the thread. The power allocated to the processor core may be changed based on the selected class of service for the thread.

Abstract: Systems and methods may provide for identifying runtime information associated with an active workload of a platform, and making an active idle state determination for the platform based on at least in part the runtime information. In addition, a low power state of a shared resource on the platform may be controlled concurrently with an execution of the active workload based on at least in part the active idle state determination.

Abstract: A control system for controlling an operating voltage of an electronic device is presented. The electronic device includes a timing event detector responsive to timing events, such as errors, related to operation of the electronic device. The control system includes a controller for decreasing the operating voltage when the rate of timing events is below a target level and for increasing the operating voltage when the rate of timing events exceeds the target level to search for a threshold voltage that is the smallest operating voltage at which the rate of timing events is substantially at the target level. The control system further includes a controllable clock signal generator for producing a clock signal for operating the electronic device so that the clock frequency is according to an increasing function of the operating voltage. Thus, it is possible to find a voltage-frequency operating point where the energy consumption is minimized.

Abstract: A method of reducing power consumption of a server cluster of host systems with virtual machines executing on the host systems is provided. The method includes recommending host system power-on when there is a host system whose utilization is above a target utilization, and recommending host system power-off when there is a host system whose utilization is below the target utilization. Recommending host system power-on includes calculating impact of powering on a standby host system with respect to reducing the number of highly-utilized host systems in the server cluster. Recommending host system power-off includes calculating impact of powering off a host system with respect to decreasing the number of less-utilized host systems in the server cluster.

Abstract: A control device includes a control unit that controls power supply from a power supply device and a power storage device to an information processing device, and a detection unit that detects power consumption of the information processing device. The control unit controls a value representing the characteristics of an amount of power supplied from the power supply device not to exceed a preset power supply device upper limit value, and sets a new power supply device upper limit value based on the power consumption detected by the detection unit.

Abstract: A method and a device are provided for waking up a MCU. The method includes: determining whether a second MCU is in a deep sleep state, when a first MCU triggers a communication event of transmitting data to the second MCU; and when the second MCU is in the deep sleep state, sending an interrupt wakeup signal to the second MCU via a wakeup pin connected between the first MCU and the second MCU, so as to wake up the second MCU.

Abstract: An apparatus and a method for controlling power consumption associated with a computing device having first and second processors configured to perform different types of operations includes providing a user interface that allows, during normal operation of the computing device, at least one of: (i) a user selection of desired performance levels of the first and second processors relative to one another, such that higher desired performance levels of one processor correspond to lower desired performance levels of the other processor, and (ii) a user selection of a desired performance level of the first processor and a user selection of a desired performance level of the second processor, the two user selections being made independently of one another. The apparatus and method control, during normal operation of the computing device, performance levels of the processors in response to the one or more user selections of the desired performance levels.

Abstract: A system-on-chip includes a processing core and a memory controller connected between the core and an external memory. A clock divider receives an internal clock signal and outputs a divided clock signal. The memory controller uses the divided clock signal to establish an interface communication frequency with the memory. A boot control logic circuit, connected to the clock divider, compares a check data pattern to a predefined data pattern read from the memory by the memory controller at the interface frequency. When the predefined and check data patterns do not match, the boot control logic circuit instructs the clock divider to adjust the divided clock signal to change the interface frequency, after which the predefined data pattern reading and comparison are repeated, and when the predefined and check data patterns match, the memory controller reads a boot program, executed by the core, from the memory at the interface frequency.

Abstract: A memory system includes a memory device, to which a first power is supplied, and in which data is stored; a controller, to which s second power is supplied, and which is configured to control the memory device; an interface, to which a third power is supplied, and which is configured to transmit a command and data between the controller and the memory device; and a Low Dropout (LDO) Regulator configured to convert the first power into the third power and supply the third power to the interface.

Abstract: Controlling power consumption of a voltage regulator in a computer system that includes computer memory and the voltage regulator is configured to provide regulated source voltage to the computer memory includes: receiving, by a voltage regulator controller, memory margin statistics of the computer memory, the memory margin statistics including data describing operational tolerance of the computer memory to source voltage signal variations; and adjusting, by the voltage regulator controller, one or more operating characteristics of the voltage regulator in dependence upon the memory margin statistics.

Abstract: A method of configuring a data network with a controller, the data network including a plurality of hosts each associated with at least one of a plurality of switches, the method including receiving a request to boot an operating system image on one of the plurality of hosts, the operating system image having network connectivity requirements. Further, the method includes selecting a host out of the plurality of hosts on which to boot the operating system image. The method also includes booting the operating system image on the host, and configuring a switch out of the plurality of switches associated with the host based upon the network connectively requirements of the operating system image. Additionally, the method includes configuring networking attributes of a network interface in the host based upon the network connectivity requirements of the operating system image.