Patents Examined by Peter DungBa Vo
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Patent number: 11872735Abstract: In a first step, a circuit sheet is set such that a first region of a second main surface of the circuit sheet is in contact with a plateau portion of a first mold and a second region is not in contact with the first mold. In the first step, a first fixed portion of the circuit sheet is arranged on a first portion of the first mold, and a second fixed portion is arranged on a second portion of the first mold. The first portion is a portion that is higher than the plateau portion and runs along at least one of a first protruding portion and a second protruding portion provided along the plateau portion. The second portion is a portion where the first protruding portion or the second protruding portion is not provided along the plateau portion.Type: GrantFiled: August 26, 2021Date of Patent: January 16, 2024Assignee: NISSHA CO., LTD.Inventors: Seiichi Yamazaki, Toshihiro Higashikawa, Hitoshi Hirai, Koji Asai, Yuki Matsumoto
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Patent number: 11877413Abstract: A printed circuit board assembly (PCBA) controls an electrically initiated device (EID) in an electric field. The PCBA includes a conductive layer, a dielectric layer, and a trans-conductive layer (TCL). The conductive layer of the PCBA designated protected areas. An electrical current with a predetermined current density is impressed in the conductive layer when the PCBA is in the electric field. The TCL is a nickel-metal composite metamaterial positioned between the conductive and dielectric layers and configured to change in shape or thickness in the electric field such that the impressed current is steered away from the conductive layer and into the dielectric layer to prevent premature activation of the EID. A system includes an outer housing, power supply, an EID such as a sonobuoy or medical device, and the PCBA, all of which are encapsulated in the housing. A method is also disclosed for manufacturing the PCBA.Type: GrantFiled: September 15, 2022Date of Patent: January 16, 2024Assignee: Sparton DeLeon Springs, LLCInventors: Lendon L. Bendix, Derek Turner
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Patent number: 11877404Abstract: Systems, methods, and devices related to catalyzed metal foils are disclosed. Contemplated metal foils have a bottom surface, preferably roughened to Ra of at least 0.1 ?m, bearing a catalyst material. The metal foils are etchable, typically of aluminum or derivative thereof, and is less than 500 ?m thick. Methods and systems for forming circuits from catalyzed metal foils are also disclosed. The catalyst material bearing surface of the metal foil is applied to a substrate and laminated, in some embodiments with a thermoset resin or thermoplastic resin therebetween or an organic material first coating the catalytic material. The metal foil is removed to expose the catalyst material, and a conductor is plated to the catalyst material.Type: GrantFiled: March 22, 2021Date of Patent: January 16, 2024Assignee: Averatek CorporationInventor: Shinichi Iketani
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Patent number: 11870410Abstract: A packaging method and a packaging structure of a film bulk acoustic resonator are provided. The packaging method includes: providing a resonant cavity main structure including a first substrate and a film bulk acoustic resonant structure having a first cavity formed therebetween; forming a resonator cover by providing a second substrate and forming an elastic bonding material layer containing a second cavity; bonding the resonant cavity main structure and the resonator cover together through the elastic bonding material layer and removing elasticity of the elastic bonding material layer, where the second cavity is at least partially aligned with the first cavity; forming a through-hole penetrating through the resonator cover and exposing a corresponding electrical connection part of the film bulk acoustic resonant structure; and forming a conductive interconnection layer on a sidewall of the through-hole and on a portion of a surface of the resonator cover.Type: GrantFiled: March 10, 2021Date of Patent: January 9, 2024Assignee: NINGBO SEMICONDUCTOR INTERNATIONAL CORPORATIONInventors: Hailong Luo, Wei Li, Fei Qi
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Patent number: 11862919Abstract: A system for separating terminals (e.g., electrical terminals) from a terminal strip includes a shear tool movably mounted to a frame for selectively shearing the terminal from the terminal strip. A primary shear depressor is provided for driving the shear tool from an initial position to an intermediate position during which the terminal is sheared from the terminal strip. A secondary shear depressor is movably mounted to the primary shear depressor for driving the shear tool from the intermediate position after the terminal has been sheared from the terminal strip, to a final position.Type: GrantFiled: January 19, 2022Date of Patent: January 2, 2024Inventor: David Alan College
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Patent number: 11864464Abstract: A method for polarizing a piezoelectric film is described. In this method, a piezoelectric film is formed by using an injection deposition method. The piezoelectric film is flat adhered to a surface of a conductive substrate. A polarization process is performed on the piezoelectric film while the piezoelectric film is flat adhered to the surface of the conductive substrate by generating static electricity on the adhesion surface of the piezoelectric film, and generating the static electricity on the adhesion surface of the piezoelectric film comprises using a pressurized gas to blow the adhesion surface, and the adhesion surface of the piezoelectric film is adhered to the even surface of the conductive substrate by an electrostatic adsorption method.Type: GrantFiled: February 1, 2021Date of Patent: January 2, 2024Assignee: CREATING NANO TECHNOLOGIES, INC.Inventors: Ji-Yung Lee, Andrew Ronaldi Tandio, Bo-Fan Tsai
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Patent number: 11850416Abstract: Various methods of manufacture can produce three-dimensional, high density, high-electrode probe arrays that can advantageously be used in neural-based applications. In one example, deep reactive ion etched (DRIE) ultra-high aspect ratio holes are etched in silicon and refilled with multiple films to a high density array of individual probes, each probe having individual recording and/or stimulation sites or tips. Using a DRIE lag effect technique can help control tip sharpness and electrode length, allowing for narrow, long, and dense needles to be formed side-by-side in a single array. In some examples, multimodal probe arrays are manufactured, with some probes having a recording/stimulating site, other probes having a waveguide, and yet other probes having a microfluidic channel.Type: GrantFiled: June 21, 2019Date of Patent: December 26, 2023Assignee: The Regents of the University of MichiganInventors: Khalil Najafi, Seyed Amin Sandoughsaz Zardini, Daniel Egert
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Patent number: 11854748Abstract: A thin film high polymer laminated capacitor includes: a laminated chip including dielectric layers, and internal electrode layers including first metal layers including a first metal vapor-deposited on the dielectric layers, and second metal layers including a second metal vapor-deposited on the first metal layers. The dielectric layers and the internal electrode layers being laminated and bonded alternately, and external electrodes formed on one end and the other end of the laminated chip. The laminated chip having a first region having the first metal layers formed on the dielectric layers, which are laminated alternately, and edge regions having the second metal layers formed on layers connected to the one end and layers connected to the other end in the first metal layers, which are laminated alternately, the first region having a capacitor function region, and the edge region having a heavy edge.Type: GrantFiled: November 26, 2021Date of Patent: December 26, 2023Assignee: RUBYCON CORPORATIONInventors: Tomonao Kako, Chiharu Ito
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Patent number: 11849542Abstract: A mounting head is configured to be detachably attached to a mounting device main body. This mounting head includes a storage section having multiple storage areas, and a storage control section configured to acquire multiple operation data relating to an operation of the mounting head individually at different timings and store the multiple operation data individually in the multiple storage areas in such a state that the mounting head is attached to the mounting device main body.Type: GrantFiled: January 18, 2019Date of Patent: December 19, 2023Assignee: FUJI CORPORATIONInventors: Hidetoshi Ito, Jun Iisaka, Mitsuhiro Hashimoto, Kazuma Hattori
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Patent number: 11849642Abstract: A piezoelectric artificial artery can be 3D printed to provide the real-time precise sensing of blood pressure and vessel motion patterns enabling early detection of partial occlusions. An electric-field assisted 3D printing method allows for rapid printing and simultaneously poled complex ferroelectric structures with high fidelity and good piezoelectric performance. The print material consists of ferroelectric potassium sodium niobate (KNN) particles embedded within a ferroelectric polyvinylidene fluoride (PVDF) polymer matrix.Type: GrantFiled: April 17, 2020Date of Patent: December 19, 2023Assignee: Wisconsin Alumni Research FoundationInventors: Xudong Wang, Jun Li
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Patent number: 11848659Abstract: A manufacturing method of a mounting structure, the method including: a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a step of preparing a sheet having thermosetting property; a disposing step of disposing the sheet on the mounting member so as to face the second circuit members; and a sealing step of pressing the sheet against the first circuit member and heating the sheet, to seal the second circuit members and to cure the sheet, wherein the second circuit members include a reference member, and a first adjacent member and a second adjacent member each adjacent to the reference member, a separation distance D1 between the reference member and the first adjacent member is different from a separation distance D2 between the reference member and the second adjacent member, at least one of the plurality of the second circuit members is a hollow member to be provided with a space from the first circuit member, aType: GrantFiled: September 28, 2018Date of Patent: December 19, 2023Assignee: NAGASE CHEMTEX CORPORATIONInventors: Takayuki Hashimoto, Takuya Ishibashi, Hiroyuki Okada, Kazuki Nishimura
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Patent number: 11848590Abstract: Electric coils and a method of insulating electric coils comprises copper wire with insulation, turn tape (e.g., B stage), film tape, and armor tape. In a preferred embodiment, the tape is hot-pressed after application of the B stage turn tape and again just prior to the application of the armor tape.Type: GrantFiled: January 15, 2021Date of Patent: December 19, 2023Assignee: Kencoil, Inc.Inventor: Eran Rosenszweig
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Patent number: 11848660Abstract: A surface acoustic wave (SAW) device including a substrate is provided. Multiple surface acoustic wave elements are disposed on the substrate. A conductive surrounding structure includes: a wall part, disposed on the substrate and surrounding the surface acoustic wave elements; and a lateral layer part, disposed on the wall part. The lateral layer part has an opening above the surface acoustic wave elements. A cap layer covers the lateral layer part and closes the opening.Type: GrantFiled: December 29, 2020Date of Patent: December 19, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chen-Hsiao Wang, Kai-Kuang Ho
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Patent number: 11846882Abstract: Disclosed is a method for manufacturing a high-density neural probe including needles having various forms. The method, in which only a photolithography process and an etching process are used, simplifies a manufacturing process of the neural probe, minimizes changes in the characteristics of the neural probe depending on process equipment or conditions, and may thus ensure a high yield, thereby being advantageous in terms of commercialization. In addition, various forms of needles may be manufactured depending on the shape of patterns included in a mask, the height of the needles may be controlled by adjusting the size of the patterns and the gap between the patterns, and thereby, a neural probe having a plurality of needles having different heights may be manufactured.Type: GrantFiled: July 8, 2020Date of Patent: December 19, 2023Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Maesoon Im, Byung Chul Lee, Young Jun Yoon, Jin Soo Park, Seung Min Kwak
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Patent number: 11839397Abstract: The present disclosure relates to a method of making an ultrasonic surgical handpiece assembly comprising a surgical handpiece for use with an irrigation sleeve and ultrasonic tip. The surgical handpiece may comprise a piezoelectric transducer disposed within a housing and configured to manipulate the ultrasonic tip. One or more lumens and/or a flex circuit including an antenna may be disposed within the surgical handpiece housing. The lumen(s) may be configured to provide irrigation and/or aspiration to the irrigation sleeve and/or ultrasonic tip. The irrigation sleeve may comprise a second antenna configured to communicate with the ultrasonic handpiece antenna. The irrigation sleeve may further comprise and an alignment and/or coupling feature configured to removably secure the irrigation sleeve to the housing and orient the second antenna relative to the ultrasonic handpiece antenna. The irrigation sleeve may further comprise a lumen for supplying irrigation and/or aspiration to the ultrasonic tip.Type: GrantFiled: May 7, 2020Date of Patent: December 12, 2023Inventor: Colin Drewek
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Patent number: 11837691Abstract: A battery manufacturing method includes forming a unit cell having a positive electrode that is obtained by a positive electrode active material layer containing an electrolytic solution being disposed on a positive electrode current collector, a negative electrode that is obtained by a negative electrode active material layer containing an electrolytic solution being disposed on a negative electrode current collector, and a separator interposed between the positive electrode and the negative electrode. The battery manufacturing method further includes applying pressure to one unit cell or with two or more stacked unit cells from the stacking direction, and charging the one unit cell or the two or more stacked unit cells after applying of the pressure. The method is performed such that the positive electrode and the negative electrode are formed without an application film being subjected to a drying process performed through heating.Type: GrantFiled: March 20, 2019Date of Patent: December 5, 2023Assignee: Nissan Motor Co., Ltd.Inventors: Tomohiro Kaburagi, Kazuyuki Yoda, Eiji Minegishi, Noboru Yamauchi, Yusuke Emori, Hideki Ishitani, Masanori Shimada
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Patent number: 11838001Abstract: A bulk acoustic wave resonator and a method of manufacturing the same are provided. The bulk acoustic wave resonator includes: a first carrier substrate; a barrier layer on a main surface of the first carrier substrate and configured to prevent an undesired conductive channel from being generated due to charge accumulation on the main surface; a buffer layer on a side of the barrier layer away from the first carrier substrate; a piezoelectric layer on a side of the buffer layer away from the barrier layer; a first electrode and a second electrode on opposite sides of the piezoelectric layer; a first passivation layer and a second passivation layer, respectively covering sidewalls of the first electrode and the second electrode; a dielectric layer between the first passivation layer and the buffer layer, wherein a first cavity is provided between the first passivation layer and the dielectric layer.Type: GrantFiled: December 2, 2022Date of Patent: December 5, 2023Assignee: Shenzhen Newsonic Technologies Co., Ltd.Inventor: Guojun Weng
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Patent number: 11839160Abstract: The present disclosure provides a flexible integrated array sensor and manufacturing methods thereof. The array sensor includes a silicon wafer, a readout circuit layer, a sensing array layer, and a polymer substrate layer disposed on the silicon wafer. The manufacturing method includes: preparing a silicon wafer; fabricating a plurality of function arrays, each including m*n function units, on a surface of the silicon wafer; etching one or more deep grooves on the surface of the silicon wafer between the arrays; fabricating a thinning support; and thinning a bottom surface of the silicon wafer to a target thickness so that the arrays are separated from each other. The etching depth for etching the one or more deep grooves is equal to or greater than the thickness of the silicon wafer after thinning.Type: GrantFiled: December 4, 2020Date of Patent: December 5, 2023Assignee: United Microelectronics Center Co., LtdInventors: Miao Wang, Weimong Tsang, Wenlong Jiao, Haopeng Wang, Ruifeng Yang
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Patent number: 11832521Abstract: A method of forming a piezoelectric thin film can include depositing a material on a first surface of a Si substrate to provide a stress neutral template layer. A piezoelectric thin film including a Group III element and nitrogen can be sputtered onto the stress neutral template layer and a second surface of the Si substrate that is opposite the first surface can be processed to remove that Si substrate and the stress neutral template layer to provide a remaining portion of the piezoelectric thin film. A piezoelectric resonator can be formed on the remaining portion of the piezoelectric thin film.Type: GrantFiled: April 17, 2020Date of Patent: November 28, 2023Assignee: Akoustis, Inc.Inventors: Craig Moe, Jeffrey M. Leathersich
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Patent number: 11825595Abstract: The disclosure provides a circuit board assembly, which includes a core layer, an electronic component, a first shielding ring wall, a second shielding ring wall, a first circuit layer, a second circuit layer, a first insulating layer and a plurality of shielding columns. The core layer has an accommodating space, in which the accommodating space has an inner sidewall. The electronic component is disposed in the accommodating space. The first shielding ring wall is disposed in the accommodating space and covers the inner sidewall, in which the first shielding ring wall surrounds the electronic component and is not in contact with the electronic component. The second shielding ring wall is disposed in the core layer and surrounds the first shielding ring wall. The core layer is disposed between the first circuit layer and the second circuit layer. The shielding columns are disposed in the first insulating layer.Type: GrantFiled: December 30, 2021Date of Patent: November 21, 2023Assignees: HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO., LTD., GARUDA TECHNOLOGY CO., LTD.Inventors: Mao-Feng Hsu, Zhi-Hong Yang