Patents Examined by Ratisha Mehta
  • Patent number: 11476392
    Abstract: A display device includes a substrate, a first electrode disposed on the substrate, a second electrode disposed on the substrate and spaced apart from the first electrode, a plurality of first protruding electrodes disposed on the first electrode, a plurality of second protruding electrodes disposed on the second electrode, and a plurality of light emitting elements electrically connected to the plurality of first protruding electrodes and the plurality of second protruding electrodes.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: October 18, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chongsup Chang, Youngdae Kim, Hyunae Kim, Euikang Heo
  • Patent number: 11476390
    Abstract: A III-V light emitting device with pixels (mesa regions) specifically designed to enable lower cost through layer vias is disclosed for reduced cost of manufacture of the device. Reduction of cost of manufacture is achieved by having non-uniform width trench regions formed during pixel etch for the multi-pixel array part of the device. Through-layer vias are specifically formed in the wider part of the trench regions using cheaper lithography toolset enabled by the larger via critical dimension achievable in the wider part of the trench regions (as compared to narrow part of the trench regions). Larger via critical dimension enables improved electrical (and consequently optical) performance of the device due to better overlay control as well as lower via resistance.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: October 18, 2022
    Assignee: Ostendo Technologies, Inc.
    Inventors: Hussein S. El-Ghoroury, Qian Fan, Kameshwar Yadavalli
  • Patent number: 11476234
    Abstract: A manufacturing method of chip package structure includes following steps. A carrier is provided. A first patterned circuit layer and a first dielectric layer covering the first patterned circuit layer have been formed on the carrier. A flat structure layer is formed on the first dielectric layer. A second dielectric layer is formed on the first dielectric layer and covers the flat structure layer and a portion of the first dielectric layer. A second patterned circuit layer is formed on the second dielectric layer. The second patterned circuit layer includes a plurality of pads. An orthographic projection of the flat structure layer on the carrier overlaps orthographic projections of the pads on the carrier. A plurality of chips are disposed on the pads. A molding compound is formed to cover the second dielectric layer and encapsulate the chips and the pads.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: October 18, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Pu-Ju Lin, Chi-Hai Kuo, Kai-Ming Yang, Cheng-Ta Ko
  • Patent number: 11450794
    Abstract: A carrier and a component are disclosed. In an embodiment a component includes a semiconductor chip including a substrate and a semiconductor body arranged thereon and a metallic carrier having a coefficient of thermal expansion which is at least 1.5 times greater than a coefficient of thermal expansion of the substrate or of the semiconductor chip, wherein the semiconductor chip is attached to a mounting surface of the metallic carrier by a connection layer such that the connection layer is located between the semiconductor chip and a buffer layer and adjoins a rear side of the semiconductor chip, wherein the buffer layer has a yield stress which is at least 10 MPa and at most 300 MPa, and wherein the substrate of the semiconductor chip and the metallic carrier of the component have a higher yield stress than the buffer layer.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: September 20, 2022
    Assignee: OSRAM OLED GMBH
    Inventors: Paola Altieri-Weimar, Ingo Neudecker, Michael Zitzlsperger, Stefan Groetsch, Holger Klassen
  • Patent number: 11444064
    Abstract: A method of forming a mesh plate and a display device containing the mesh plate are provided. The mesh plate includes a plurality of first portions extend in a horizontal direction and parallel to each other and a plurality of second portions extend in a vertical direction and parallel to each other. Material of each of the first portions and the second portions is independently selected from one of magnet and magnetically conductive material. The positions of the first portions and the second portions is adjusted to cross each other and thus form a plurality of open areas according to preset positions for the open areas.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: September 13, 2022
    Assignee: Wuhan China Star Optoelectronies Technology Co., Ltd.
    Inventor: Guiyang Zhang
  • Patent number: 11444121
    Abstract: Devices and methods of their fabrication for pixels or displays are disclosed. Pixels and displays having redundant subpixels are described. Subpixels are initially isolated by an unprogrammed antifuse. A subpixel is connected to the display by programming the antifuse, electrically connecting it to the pixel or display. Defective subpixels can be determined by photoluminescent testing or electroluminescent testing, or both. A redundant subpixel can replace a defective subpixel before pixel or display fabrication is complete.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: September 13, 2022
    Assignee: Black Peak LLC
    Inventor: Scott Brad Herner
  • Patent number: 11437541
    Abstract: A method of manufacturing a micro light emitting diode (LED) display and a transfer apparatus are provided. The method of manufacturing a micro LED display includes: identifying a repairing micro LED, from among a plurality of second micro LEDs, on a second substrate based on a first position of a defective micro LED, from among a plurality of first micro LEDs, on a first substrate; removing the defective micro LED from the first substrate; matching the first position on the first substrate from which the defective micro LED has been removed to a second position of the repairing micro LED on the second substrate; and transferring the repairing micro LED from the second position on the second substrate to the first position on the first substrate from which the defective micro LED has been removed, by using a laser transfer method.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: September 6, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sangmoo Park, Doyoung Kwag, Byungchul Kim, Minsub Oh
  • Patent number: 11437557
    Abstract: An optoelectronic semiconductor device and a method for forming an optoelectronic semiconductor device are disclosed. In an embodiment a device includes a carrier having a main plane of extension, at least one semiconductor chip arranged on the carrier, a frame arranged on the carrier and surrounding the semiconductor chip in lateral directions which are parallel to the main plane of extension of the carrier and a conversion layer covering the at least one semiconductor chip and the frame, wherein the at least one semiconductor chip extends further in a vertical direction than the frame, wherein the semiconductor chip is configured to emit electromagnetic radiation, and wherein the frame and the semiconductor chip are spaced from each other in the lateral directions by a gap.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: September 6, 2022
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Asliza Alias, Lay Sin Khoo
  • Patent number: 11437554
    Abstract: A light emitting module includes a first terminal part, a first light emitting device including a first electrode, a second light emitting device including a second electrode, a first conductive thin film including a first thin film region and a second thin film region, and a first conductive layer electrically connected to the first thin film region. The first thin film region electrically connects the first terminal part and the first electrode, and has a first current path length. The second thin film region electrically connects the first terminal part and the second electrode, and has a second current path length shorter than the first current path length. At least a portion of the first conductive layer overlaps with the first thin film region in a first direction that is perpendicular to a plane in which the first thin film region extends.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: September 6, 2022
    Assignee: NICHIA CORPORATION
    Inventors: Koji Taguchi, Masaaki Katsumata
  • Patent number: 11437322
    Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: September 6, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hao-Chih Hsieh, Tun-Ching Pi, Sung-Hung Chiang, Yu-Chang Chen
  • Patent number: 11426818
    Abstract: A technique to additively print onto a dissimilar material, especially ceramics and glasses (e.g., semiconductors, graphite, diamond, other metals) is disclosed herein. The technique enables manufacture of heat removal devices and other deposited structures, especially on heat sensitive substrates. It also enables novel composites through additive manufacturing. The process enables rapid bonding, orders-of-magnitude faster than conventional techniques.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: August 30, 2022
    Assignee: The Research Foundation for The State University
    Inventors: Scott N. Schiffres, Arad Azizi
  • Patent number: 11430933
    Abstract: A lighting device and a method of manufacturing a lighting device are described. A lighting device includes a heat sink providing a first mounting area for at least one LED element, a second mounting area for at least one electrical connection assembly, and a cavity adjacent the first mounting area. An inner part is arranged at least partially inside the cavity and includes at least a first and a second connection terminal and at least one electrical connection path. The first and the second connection terminal are provided on a surface of the inner part. The first connection terminal is arranged between the first mounting area and the second connection terminal. The second connection terminal is arranged between the second mounting area and the first connection terminal. The electrical connection path is provided at least partially inside the inner part connecting the first and second electrical terminal.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: August 30, 2022
    Assignee: Lumileds LLC
    Inventors: Harry Gijsbers, Georg Henninger
  • Patent number: 11424227
    Abstract: The present invention provides a display panel, a display module, and a display device. The display panel includes a substrate and micro-LEDs. The display module achieves an extremely-narrow-bezel design by attaching a support plate to one side of a flexible drive circuit board of the display panel, bending a bending region, and attaching a bonding region to another side of the support plate. Multiple display modules are arranged in a accommodating chamber defined by a back plate of the display device and are fixed and joined to each other. Accordingly, a narrow-gap joining technology for micro-LED is realized, thus solving a problem that the micro-LED is too small in size, and realizing large-sized micro-LED displays.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: August 23, 2022
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Minggang Liu, Yong Fan
  • Patent number: 11411044
    Abstract: A display device comprises a first electrode, a second electrode disposed to be spaced apart from the first electrode and face the first electrode, a first insulating layer disposed to cover the first electrode and the second electrode, a second insulating layer disposed on at least a part of the first insulating layer and exposing at a part of a region where the first electrode and the second electrode overlaps the first insulating layer and at least one light emitting element on the exposed first insulating layer between the first electrode and the second electrode, wherein the second insulating layer includes at least one opening exposing the first insulating layer and disposed to be spaced apart from each other on a region where the first electrode and the second electrode face each other, and a bridge portion between the openings, and the light emitting element is disposed on the opening.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: August 9, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun Min Cho, Dae Hyun Kim, Jin Oh Kwag, Dong Hyun Kim, Keun Kyu Song, Hyun Deok Im, Sung Chan Jo
  • Patent number: 11411045
    Abstract: A light emitting device including a light emitting layer that is provided between a first face and a second face, a first electrode that is provided on the first face and is electrically coupled to the light emitting layer, a second electrode that is provided on the second face and is electrically coupled to the light emitting layer, and a non-selected electrode that is provided on the first face and is in a state not electrically coupled to a potential supply source.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: August 9, 2022
    Assignee: SONY CORPORATION
    Inventors: Yusuke Kataoka, Tatsuo Ohashi, Goshi Biwa, Akira Ohmae
  • Patent number: 11404601
    Abstract: LED donor substrates and conductive architectures for on-wafer testing are described. In an embodiment, an array of LEDs is supported by an array of electrically conductive stabilization posts. The electrically conductive stabilization posts can be coupled with a test pad for on-wafer testing prior to transferring the LEDs to a receiving substrate.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: August 2, 2022
    Assignee: Apple Inc.
    Inventors: Ranjith Samuel E. John, Adam C. Abrahamsen, Clayton K. Chan, Madhan M. Raj, Michael Y. Chan, Nazneen N. Jeewakhan, Yu S. Yang
  • Patent number: 11393963
    Abstract: An N electrode and a P electrode formed on the same surface are respectively bonded to a cathode electrode and an anode electrode of a drive circuit board through a connection step performed once. An LED unit includes a first wiring (21) that is disposed inside a groove formed in a nitride semiconductor (13) to penetrate between an N-type layer (10) and a P-type layer (12) and is electrically connected to the N-type layer (10), and a second wiring that includes a P electrode (30) connected to the P-type layer (12) and an N electrode (31) connected to the first wiring (21), in which the N electrode (31) and the P electrode (30) are formed on the same surface.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: July 19, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Katsuji Iguchi, Masumi Maegawa
  • Patent number: 11393799
    Abstract: A device for collecting and transferring light emitting elements of microscale size includes a non-magnetic plate, a plurality of magnetic probes, and a magnetic plate. The non-magnetic plate defines through holes. Each of the probes is fixed in one through holes. The magnetic plate is on a surface of the non-magnetic plate and closes one opening of each of the through holes. The magnetic plate generates a magnetic field, so that each of the probes magnetically attracts one light emitting element. A method for making the transfer device and a method for transferring light emitting elements using the transfer device are also disclosed.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: July 19, 2022
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Po-Liang Chen, Yung-Fu Lin, Jung-Hua Lee, Huihsien Tien
  • Patent number: 11380816
    Abstract: Embodiments relate to mass-transfer methods useful for fabricating products containing Light Emitting Diode (LED) structures. LED arrays are transferred from a source substrate to a target substrate by an in-process functional test Known-Good Die (KGD) driven mass-transfer of a plurality of LED devices in a high-speed flexible manner. Certain preferred embodiments using beam-addressed release (BAR) mass-transfer approaches are able to utilize a Known Good Die (KGD) data file of the source substrate in a manner that avoids additional steps, rework and yield losses.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: July 5, 2022
    Assignee: Apple Inc.
    Inventor: Francois J. Henley
  • Patent number: 11374007
    Abstract: A memory array comprises vertically-alternating tiers of insulative material and memory cells. The memory cells individually comprise a transistor and a capacitor. One of (a) a channel region of the transistor, or (b) a pair of electrodes of the capacitor, is directly above the other of (a) and (b). Additional embodiments and aspects are disclosed.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: June 28, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Sanh D. Tang, Martin C. Roberts