Abstract: A method for fabricating a semiconductor device includes forming an upper structure in which a bottom electrode, a dielectric layer, a top electrode and a plasma protection layer are sequentially stacked on a lower structure, exposing the upper structure to a plasma treatment, and exposing the plasma-treated upper structure and the lower structure to a hydrogen passivation process.

Abstract: A display device can include a plurality of semiconductor light emitting diodes; first and second wiring electrodes respectively extending from the plurality of semiconductor light emitting diodes to supply an electrical signal to the plurality of semiconductor light emitting diodes; a plurality of pair electrodes disposed on a substrate and having a first electrode and a second electrode that generate an electric field when a current is supplied thereto; a dielectric layer disposed to cover the plurality of pair electrodes; and a covalent bond layer disposed between the dielectric layer and the plurality of semiconductor light emitting diodes, and forming a covalent bond with the dielectric layer and each of the plurality of semiconductor light emitting diodes, wherein the first wiring electrode and the second wiring electrode are located at opposite sides of the plurality of pair electrodes based on the plurality of semiconductor light emitting diodes.

Abstract: A nitride semiconductor light emitting element includes a multi-quantum well layer including AlGaN, and including a plurality of well layers and producing light by combining carriers and emitting deep ultraviolet light with a central wavelength of 250 nm to 350 nm, a metal electrode part including Al that is located above the multi-quantum well layer and reflects a first light that is a part of the light produced by the multi-quantum well layer and travels upward, a multi-stacked semiconductor layer that is located between the multi-quantum well layer and the metal electrode part, includes a plurality of p-type semiconductor layers including p-type AlGaN, and is configured in such a manner that the first light travels out and back therewithin via reflection at the metal electrode part until meeting a second light that is a part of the light produced by the multi-quantum well layer and travels downward, and an ITO contact electrode part provided between the metal electrode part and the multi-quantum well layer

Abstract: A white LED including red phosphor, at least one blue LED chip and at least one green LED chip, wherein a red light, a blue light and a green light are mixed simultaneously to produce a white light. The red phosphor comprises a first red phosphor and a second red phosphor. The first red phosphor is made from a substance having structure formula M2AX6:Mn4+, wherein the element M is selected from Li, Na, K, Rb or Cs, the element A is selected from Ti, Si, Ge or Zr, and the element X is selected from F, Cl or Br; the ratio of the second red phosphor to the red phosphor ranges from 0.01% to 15%. Further provided is a backlight module. The adjustably colored points of a device comprising M2AX6:Mn4+ are achieved by adding a second red phosphor to the red phosphor comprising M2AX6:Mn4+.

Abstract: Disclosed herein are techniques for managing the thermal resistance and the planarity of a display package. According to certain embodiments, a device includes a display package having a molding compound; a plurality of light emitting diode (LED) dies arranged on a top surface of the display package, wherein each LED die of the plurality of LED dies includes a plurality of LEDs; a backplane die embedded within the molding compound of the display package, wherein the backplane die is electrically coupled to each LED die of the plurality of LED dies; and at least one spacer structure embedded within the molding compound of the display package. The backplane die and the at least one spacer structure together provide mechanical support and planar alignment for the plurality of LED dies arranged on the top surface of the display package. The at least one spacer structure has a first thermal conductivity, and the molding compound has a second thermal conductivity lower than the first thermal conductivity.

Abstract: A semiconductor device includes a substrate including a first region and a second region that are arranged in a first direction that is parallel to an upper surface of the substrate; a separation layer provided on the first region of the substrate; a high electron mobility transistor (HEMT) device overlapping the separation layer in a second direction that is perpendicular to the upper surface of the substrate; a light-emitting device provided on the second region of the substrate; and a first insulating pattern covering a side surface of the HEMT device, wherein the first insulating pattern overlaps the separation layer in the second direction.

Abstract: A semiconductor fabrication apparatus includes a source chamber being operable to generate charged particles; and a processing chamber integrated with the source chamber and configured to receive the charged particles from the source chamber. The processing chamber includes a wafer stage being operable to secure and move a wafer, and a laser-charged particles interaction module that further includes a laser source to generate a first laser beam; a beam splitter configured to split the first laser beam into a second laser beam and a third laser beam; and a mirror configured to reflect the third laser beam such that the third laser beam is redirected to intersect with the second laser beam to form a laser interference pattern at a path of the charged particles, and wherein the laser interference pattern modulates the charged particles by in a micron-zone mode for processing the wafer using the modulated charged particles.

Abstract: Disclosed herein are techniques for forming a thin-film circuit layer on an array of light-emitting diodes (LEDs). LEDs in the array of LEDs can be singulated by various processes, such as etching and ion implantation. Singulating LEDs can be performed before or after forming the thin-film circuit layer on the array of LEDs. The array of LEDs can be bonded to a transparent or non-transparent substrate.

Abstract: The present disclosure provides a detection device for Micro-LED and a method manufacturing thereof, and a detection apparatus for Micro-LED, and the detection device for Micro-LED comprises: a substrate, and a first via and a second via penetrating through the substrate; the substrate comprises a first surface and a second surface which are opposite to each other; the first via and the second via are respectively arranged corresponding to a first pole and a second pole of a Micro-LED to be detected, and the detection device for Micro-LED further comprises: a first detection component and a second detection component on the first surface of the substrate.

Abstract: An integrated circuit device includes: a lower memory stack including a plurality of lower word lines located on a substrate, an upper memory stack located on the lower memory stack and including a plurality of upper word lines, at least one first lower interconnection layer extending in a horizontal direction at a first vertical level between the lower memory stack and the upper memory stack, and configured to be electrically connected to at least one lower word line selected from the plurality of lower word lines, a separate insulating film covering at least one first lower interconnection layer, and at least one first upper interconnection layer extending in the horizontal direction at a second vertical level higher than the upper memory stack, and configured to be electrically connected to at least one upper word line selected from the upper word lines.

Abstract: Some embodiments relate to an image sensor pixel comprising a transfer gate formed on a first surface of a semiconductor substrate, a floating diffusion formed in the first surface of the semiconductor substrate, and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially beneath the transfer gate. The transfer gate is spaced away from the floating diffusion such that an intervening semiconductor region provides a potential barrier to charge flow from beneath the transfer gate to the floating diffusion. The transfer gate is operable to control a vertical pump gate to selectively transfer charge from the charge accumulation/storage region to the floating diffusion by pumping charge from the buried charge accumulation/storage region underlying the transfer gate, over the potential barrier, and out to the floating diffusion, such that full charge transfer can be achieved without overlapping the edge of the transfer gate with the floating diffusion.

Abstract: A surface mounted Light Emitting Diode (LED) device includes a printed circuit board (PCB), at least one color LED chip mounted on the PCB, and a driving chip. The driving chip is mounted on the PCB and electrically connected to the at least one color LED chip to drive the at least one color LED chip. The driving chip has a signal input port and a signal output port. The signal input port is electrically connected to a signal input conductive pad, and the signal output port is electrically connected to a signal output conductive pad. The surface mounted LED device further includes a gap located between the signal input conductive pad and the signal output conductive pad for creating a space for a cutting apparatus to sever any conductive line through the gap, and making a manufacturing procedure of the surface mounted LED device easier.

Abstract: A substrate is provided with a patterned layer over a stack of one or more processing layers. The processing layers include at least one patterned layer and one etch target layer. CD trimming between the CD of the patterned layer and the CD of the etch target layer may be achieved after the pattern is transferred to the etch target layer. After the etch target layer is patterned, a plasma free gas phase etch process may be used to trim the CD of the etch target layer to finely tune the CD. In an alternate embodiment, plasma etch trim processes may be used in combination with the gas phase etch process. In such an embodiment, partial CD trimming may be achieved via the plasma etching of the various process layers and then additional CD trimming may be achieved by subjecting the etch target layer to the plasma free gas phase etch after the desired pattern has been formed in the etch target layer.

Abstract: An optoelectronic component may include four semiconductor chips arranged on a substrate. A first semiconductor chip may be configured to emit electromagnetic radiation with a dominant wavelength ranging from about 610 to about 650 nm during operation. A second semiconductor chip may be configured to emit electromagnetic radiation with a dominant wavelength ranging from about 450 to about 475 nm during operation. A third semiconductor chip may be configured to emit electromagnetic radiation with color space coordinates of 0.3231±0.005 and 0.5408±0.005 in the CIE color space during operation. A fourth semiconductor chip may emit electromagnetic radiation having color space coordinates of 0.5638±0.005 and 0.4113±0.005 in the CIE color space during operation. The third and fourth semiconductor chips may have a conversion layer configured to convert a wavelength of the electromagnetic radiation emitted by the active region.

Abstract: A light source device includes: a driving circuit; a blue light emitting element made of a group III nitride semiconductor which has a light outgoing surface on a side opposite to a side with the driving circuit, is arranged on the driving circuit, and is electrically connected to the driving circuit; and a color conversion layer which is in contact with the light outgoing surface and converts a wavelength of light emitted from the light outgoing surface. The light outgoing surface is made of a group III nitride semiconductor.

Abstract: A component may include a semiconductor chip, a buffer layer, a connecting layer, and a metal carrier. The semiconductor chip may include a substrate and a semiconductor body arranged thereon. The metal carrier may have a thermal expansion coefficient at least 1.5 times as great as a thermal expansion coefficient of the substrate or of the semiconductor chip. The chip may be fastened on the metal carrier by the connecting layer, and the buffer layer may have a yield stress ranging from 10 MPa. The buffer layer may have a thickness ranging from 2 um to 10 um and adjoin the chip. The substrate and the metal carrier may have a higher yield strength than the buffer layer.

Abstract: A method for manufacturing a laminate including a support and a substrate having a back surface to be processed and a non-processed surface, the support and the non-processed surface being bonded via a temporary adhesive material. The method includes the steps: (a) laminating the temporary adhesive material on either or both of the support and the non-processed surface of the substrate; (b) preheating the support and the substrate before the bonding is started; and (c) bonding the support and the substrate via the temporary adhesive material. In the step (b), the substrate is heated to a temperature of 50° C. or more and 250° C. or less, while the support is heated to a temperature of 50° C. or more and 250° C. or less but different from that of the substrate. In the step (c), the bonding is started with the temperatures of the support and the substrate after the preheating being different.

Abstract: A display device includes a substrate defining a concave portion recessed from a top surface of the substrate, a lower conductive layer in the concave portion, an upper conductive layer connected to the lower conductive layer, an insulating layer between the lower conductive layer and the upper conductive layer and in which a contact hole is defined, the upper conductive layer connected to the lower conductive layer at the contact hole, a thin-film transistor including a semiconductor layer and a gate electrode on the semiconductor layer, and a display element connected to the thin-film transistor.

Abstract: The present disclosure provides a driving backplane, a method for manufacturing the same, and a display device. The driving backplane includes: a substrate; and a bonding layer located on a side of the substrate and configured to bond with a plurality of Micro LEDs arranged in an array, wherein the bonding layer comprises a bonding metal layer and a conductive protection layer that are stacked sequentially along a direction away from the substrate, an orthographic projection of the conductive protection layer on the substrate substantially coinciding with an orthographic projection of the bonding metal layer on the substrate.

Abstract: An object of the present invention is to suppress the occurrence of a short circuit in a light-emitting device. A light-emitting device 1 includes a conductive member 11, a holding member 20 holding the conductive member 11, at least a part of the conductive member 11 being inserted in the holding member 20, a light-emitting element 30 connected to the conductive member 11, and a cover member 40 covering the holding member 20. The conductive member 11 has exposed portions 16 exposed to the outside from the holding member 20. The cover member 40 covers all the exposed portions 16 and has a lens portion 41 disposed at a position facing the light-emitting element 30.