Patents Examined by Raymond N Phan
  • Patent number: 10439830
    Abstract: A bus arrangement includes: a coordinator; a first subscriber; a second subscriber; and a bus. The bus includes: a first signal line coupling the first subscriber and the coordinator; a second signal line connecting the second subscriber to the first subscriber; and at least one bus line connecting the coordinator to the first subscriber and the second subscriber. The coordinator is configured to send a message via the at least one bus line to the second subscriber with a command to activate the first subscriber via the second signal line. The first subscriber includes a first current sensor and the second subscriber includes a switchable current source. The second signal line couples the first current sensor with the switchable current source.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: October 8, 2019
    Assignee: EATON INTELLIGENT POWER LIMITED
    Inventors: Matthias Hansing, Franz Heller
  • Patent number: 10437316
    Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: October 8, 2019
    Assignee: ADVANCED PROCESSOR ARCHITECTURES, LLC
    Inventors: Louis Edmund Chall, John Bradley Serson, Philip Arnold Roberts, Cecil Eugene Hutchins
  • Patent number: 10430203
    Abstract: Disclosed are techniques regarding aspects of implementing client configurable logic within a computer system. The computer system can be a cloud infrastructure. The techniques can include providing an identifier in response to configuring client configurable logic within the computer system.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: October 1, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Robert Michael Johnson, Islam Mohamed Hatem Abdulfattah Mohamed Atta, Asif Khan, Nafea Bshara, Anthony Nicholas Liguori
  • Patent number: 10430118
    Abstract: A virtualized peripheral driver and filter are installed at a kernel level of an Operating System (OS) on a host device. A new peripheral driver is installed on the host device and added to the peripheral device stack within the OS. Events generated from the user level of the OS are pushed through the stack for processing by a newly attached peripheral of the host device using the new peripheral driver. Events produced from the kernel for the peripheral are trapped by the filter when passing up through the stack to the user level of the OS and provided to the virtualized peripheral driver. The virtualized peripheral driver repackages, translates, and formats the events produced from the kernel as OS events expected by the OS for processing and the repacked, translated, and formatted events are processed by the OS.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: October 1, 2019
    Assignee: NCR Corporation
    Inventors: Nicholas Caine, Andrew J. Wurfel
  • Patent number: 10423553
    Abstract: A system-on-chip (SoC) may include a master, a slave, and an asynchronous interface having a first first-in first-out (FIFO) memory connected to the master and the slave. A write operation of the FIFO memory is controlled based upon a comparison of a write pointer and an expected write pointer of the FIFO memory, and a read operation of the FIFO memory is controlled based upon a comparison of a read pointer and an expected read pointer of the FIFO.
    Type: Grant
    Filed: June 3, 2018
    Date of Patent: September 24, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Jin Kim, Nak-Hee Seong, Hee-Seong Lee
  • Patent number: 10423563
    Abstract: Embodiments for a memory access broker system with application-controlled early write acknowledgment support. A memory access broker may be selectively enabled to facilitate early write acknowledgement (EWACK) operations and notification of failed EWACK write requests to one or more issuing applications such that the failed EWACK write requests are logged by the memory access broker for inspection by the one or more issuing applications.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: September 24, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Konstantinos Katrinis, Andrea Reale, Dimitrios Syrivelis
  • Patent number: 10417148
    Abstract: A bus traffic control apparatus includes a sizing block, a traffic request controller and a bus master engine. The sizing block is configured to determine a data transmitting size of a bus master based on bus traffic information. The traffic request controller is configured to control transmission of data from the bus master based on the data, a destination of the data, the data transmitting size. The bus master engine is configured to transmit the data to the destination in the data transmitting size based on the data, the destination of the data, the data transmitting size and a request received from the traffic request controller.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: September 17, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Chul Song, Yong Kim, Seong-Wook Cho
  • Patent number: 10409752
    Abstract: A bidirectional signal conditioning chip for a USB Type-C cable and a USB Type-C cable are provided. The chip includes a memory, a processor and a transfer driver. The transfer driver is configured to regenerate and transmit a high speed signal; the memory is configured to store a program code; the processor is configured to call the program code, and perform the following operations when the program code is executed: determining a data transmission direction and a type supported by transmitted data of the USB Type-C cable; configuring on-off states of buffers in the transfer driver based on the data transmission direction and the supported type, so that a data output direction of the transfer driver is consistent with the data transmission direction.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: September 10, 2019
    Assignee: LONTIUM SEMICONDUCTOR CORPORATION
    Inventors: Cheng Tao, Yu Chen, Xi Xu, Xin Zhu
  • Patent number: 10402353
    Abstract: An embodiment system includes a first processor configured to process a suite of instructions and a second processor configured to process a subset of the suite of instructions. The system further includes a power management circuit configured to select the first processor or the second processor as a selected processor, the power management circuit being further configured to activate the selected processor or place the selected processor on standby. The system also includes a first peripheral device configured to generate a first interrupt signal, a switch configured to direct the first interrupt signal to the selected processor, and a first memory configured to store a first interrupt routine associated with the first interrupt signal, the selected processor being configured to execute the first interrupt routine in response to the first interrupt signal.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: September 3, 2019
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Dragos Davidescu, Sandrine Lendre, Olivier Ferrand
  • Patent number: 10402348
    Abstract: A method includes receiving feedback information indicative of an overload condition from an arbiter. The method further includes deprioritizing a routing bus based on the received feedback information and selecting a routing bus to use to send a transaction across a system-on-chip (SOC).
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: September 3, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: James Philip Aldis, Philippe Yvan Mestrallet
  • Patent number: 10387361
    Abstract: Systems, methods, circuits, devices and computer-readable mediums for configuring serial devices are disclosed. In some implementations, a device comprises: an input for receiving first and second requests from a serial bus; a decoder coupled to the input and configured to determine if either of the first and second requests is a configuration mode request; a controller coupled to the decoder and configured to: in response to a determination that the first request is a configuration mode request, program a configuration block with configuration data obtained from the serial bus and alter a device behavior according to the configuration data; and in response to a determination that the second request is not a configuration mode request, perform one or more actions on the device according to the second request.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: August 20, 2019
    Assignee: Atmel Corporation
    Inventors: Daniel Harfert, Richard V. De Caro
  • Patent number: 10372374
    Abstract: Systems and methods for providing input/output (I/O) determinism. An I/O instruction and at least one service level indicator are received, wherein the at least one service level indicator includes a required time for executing the I/O instruction. It is determined whether the I/O instruction can be executed on the storage within the required time. When it is not determined that the I/O instruction can be executed on the storage within the required time, a notification is sent.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: August 6, 2019
    Assignee: Excelero Storage Ltd.
    Inventors: Yaniv Romem, Omri Mann, Ofer Oshri
  • Patent number: 10366018
    Abstract: In a control apparatus which uses a CPU which does not have hardware for memory protection, a function is realized to detect unauthorized writing from a non-safety-related unit program in units of bits, for a safety-related unit data area of a RAM, a safety-related unit register area of an external integrated circuit, and a built-in peripheral I/O register of the CPU. A memory access monitoring unit requests an interrupt process upon detection of a write access of the safety-related unit program permitted to access a safety-related unit region. The interrupt process realizes a function to detect write access from a non-safety-related unit program area by using a program counter of a write access origin retracted to a stack area to judge whether the write access origin is a safety-related unit program or the non-safety-related unit program area, and judge, in units of bits, whether or not there is a change to a safety-related unit region.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: July 30, 2019
    Assignee: OKUMA CORPORATION
    Inventor: Yoshimasa Egi
  • Patent number: 10360127
    Abstract: Techniques for identifying I/O workload patterns may include monitoring key performance indicators (KPIs) for a monitoring period; and at the end of the monitoring period, performing processing including: determining whether there have been a specified number of occurrences of a predefined event with respect to a data portion of the application, wherein the predefined event is a violation of an application KPI for the application and also a violation of at least one of a plurality of data storage KPIs for the data portion of the application; and responsive to determining that there have been the specified number of the occurrences of the predefined event with respect to the first data portion of the application, recording a pattern of I/O workload for the data portion in accordance with the occurrences of the predefined event. Hints, such as affecting data movement and/or compression, may be generated based on detected patterns.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: July 23, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Paul McSweeney, Andrea Graham, Ciara Stacke
  • Patent number: 10360170
    Abstract: The present invention provides an apparatus for expanding a serial communication port. The apparatus includes a first serial port, a second serial port and a processing and control module. The first serial port is used to transmit a first signal, and the second serial port is used to transmit a second signal. The processing and control module is coupled between the first serial port and the second serial port. The processing and control module includes a first serial bus host controller, a second serial bus host controller, a data forwarding unit and an expansion unit. The apparatus is connected between an electronic device and multiple peripheral devices, so that via the expansion unit, each peripheral device generates its own communication port on the electronic device.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: July 23, 2019
    Assignee: ATEN International Co., Ltd.
    Inventors: Kuo-Feng Kao, Li-Jen Chang, Hsiang-Jui Yu
  • Patent number: 10353815
    Abstract: The disclosed technology is generally directed to data security. In one example of the technology, data is stored in a memory. The memory includes a plurality of memory banks including a first memory bank and a second memory bank. At least a portion of the data is interleaved amongst at least two of the plurality of memory banks. Access is caused to be prevented to at least one of the plurality of memory banks while a debug mode or recovery mode is occurring. Also, access is caused to be prevented to the at least one of the plurality of memory banks starting with initial boot until a verification by a security complex is successful. The verification by the security complex includes the security complex verifying a signature.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: July 16, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: George Thomas Letey, Douglas L. Stiles, Edmund B. Nightingale
  • Patent number: 10353743
    Abstract: Ensuring the fair utilization of system resources using workload based, time-independent scheduling, including: receiving an I/O request associated with an entity; determining whether an amount of system resources required to service the I/O request is greater than an amount of available system resources in a storage system; responsive to determining that the amount of system resources required to service the I/O request is greater than the amount of available system resources in the storage system: queueing the I/O request in an entity-specific queue for the entity; detecting that additional system resources in the storage system have become available; and responsive to detecting that additional system resources in the storage system have become available, issuing an I/O request from an entity-specific queue for an entity that has a highest priority among entities with non-empty entity-specific queues.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: July 16, 2019
    Assignee: Pure Storage, Inc.
    Inventors: Yuval Frandzel, Kiron Vijayasankar
  • Patent number: 10346335
    Abstract: An external M.2 solid-state drive dock with local and network interfaces is disclosed. The dock includes an enclosure with apertures through which M.2 solid-state drives can be received. A circuit board is mounted within the enclosure that includes M.2 socket connectors for receiving the M.2 solid-state drives. The circuit board also includes a storage controller coupled to the M.2. socket connectors. A local interface controller is coupled to the storage controller for providing a local interface, such as a USB-C interface, to the M.2 solid-state drives to host computers. A network controller is also coupled to the storage controller for providing network interfaces, such as wired and/or wireless network interfaces, for accessing the M.2. solid-state drives. The storage controller can receive storage requests from the local interface controller and the network interface controller and provide the storage requests to the M.2 solid-state drives.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: July 9, 2019
    Assignee: American Megatrends, Inc.
    Inventor: Hoang Ngoc Minh Vu
  • Patent number: 10324878
    Abstract: In one or more embodiments, one or more systems, methods, and/or processes may detect commencement signals from respective backplanes. For each backplane of the backplanes, the one or more systems, methods, and/or processes may further configure a multiplexer to select a coupling associated with the backplane; may further provide, via a serial interface and the multiplexer, first information to the backplane; may further receive, via the serial interface, second information from the backplane; may further store the second information from the backplane; may further provide at least a portion of the second information to at least one of information handling system firmware, an operating system, and a boot management controller; and may further boot the operating system with the at least the portion of the second information associated with at least one of the backplanes.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: June 18, 2019
    Assignee: Dell Products L.P.
    Inventors: Timothy M. Lambert, Jeffrey Leighton Kennedy
  • Patent number: 10318012
    Abstract: A keyboard arrangement and a method for a digital apparatus, wherein the keyboard arrangement comprising keyboard means for receiving user input data, processing data and for interfacing the digital apparatus, mechanical means for attaching to several types of digital apparatus, protection means for covering and safeguarding the digital apparatus, wherein the said keyboard means utilizing a NFC protocol for setting up a connection with the digital apparatus, for harvesting power from the digital apparatus and for transmitting data to the digital apparatus in response to user-actuation, and said keyboard means receiving a request message powering and turning on the keyboard means, thereafter the keyboard means determining if at least one engage key being pressed at user input means, then the keyboard means receiving data from user input means and processing and transmitting said data to the digital apparatus.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: June 11, 2019
    Assignee: ONE2TOUCH AS
    Inventors: Kyrre Tangen, Nils Bjoerdal, Victor Rosenvinge