Patents Examined by Ryan Dare
  • Patent number: 11775449
    Abstract: Devices and techniques for efficient obfuscated logical-to-physical mapping are described herein. For example, activity corresponding to obfuscated regions of an L2P map for a memory device can be tracked. A record of discontinuity between the obfuscated regions and L2P mappings resulting from the activity can be updated. The obfuscated regions can be ordered based on a level of discontinuity from the record of discontinuity. When an idle period is identified, an obfuscated region from the obfuscated regions is selected and refreshed based on the ordering.
    Type: Grant
    Filed: January 16, 2023
    Date of Patent: October 3, 2023
    Inventors: Nadav Grosz, Jonathan Scott Parry
  • Patent number: 11755255
    Abstract: A memory device includes a plurality of memories, a plurality of access units, and a controller configured to control data from an access unit according to an operation cycle of another access unit whose form factor is different from that of the access unit. A resistor can be shared by the plurality of memories for impedance matching, which can shorten calibration time.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: September 12, 2023
    Assignee: SK hynix Inc.
    Inventors: Won Ha Choi, Oung Sic Cho, Jong Hoon Oh
  • Patent number: 11748264
    Abstract: Obtaining an approximate unique count for a column from a table from a database includes, generating, for a value from an unevaluated row, a hash value in a defined range of hash values, determining a cardinality of leading zeros in the hash value, identifying a bucket with respect to the hash value from a plurality of buckets corresponding to the defined range of hash values, wherein the buckets from the plurality of buckets correspond with respective non-overlapping portions of the defined range of hash values, such that the hash value is in the portion of the defined range of hash values corresponding to the bucket, and appending to an unsorted sparse representation a bucket identifier for the bucket and the cardinality of the leading zeros, and, in response to a determination that unevaluated rows are unavailable in the table, determining the approximate unique count using the unsorted sparse representation.
    Type: Grant
    Filed: October 10, 2022
    Date of Patent: September 5, 2023
    Assignee: ThoughtSpot, Inc.
    Inventors: Ashok Anand, Bhanu Prakash, Tushar Marda
  • Patent number: 11748255
    Abstract: A method for searching for free blocks in bitmap data. For searching for free blocks in the bitmap data, distribution information of free blocks can be directly obtained by performing array value solving operation, with the value of the integer data obtained by dividing the bitmap data into blocks being used as an index, on a template array. Also provided are an apparatus for searching for free blocks in the bitmap data, a device, and a readable storage medium.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: September 5, 2023
    Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventor: Yanhong Li
  • Patent number: 11720484
    Abstract: A method, computer program product, and computer system for identifying, by a computing device, content in a first bucket in a first cache. It may be determined that a first portion of the content in the first bucket is a duplicate, wherein a second portion of the content in the first bucket may be unique. The first portion of the content in the first bucket may be deduplicated from the first cache. The second portion of the content may be stored in a second bucket in a second cache.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: August 8, 2023
    Assignee: EMC IP Holding Company, LLC
    Inventors: Bar Harel, Maor Rahamim, Uri Shabi
  • Patent number: 11720502
    Abstract: Methods, systems, and devices for codeword rotation for zone grouping of media codewords are described. A value of a first pointer may be configured to correspond to a first memory address within a region of memory and a value of a second pointer may be configured to correspond to a second memory address within the region of memory. The method may include monitoring access commands for performing access operations within the region of memory, where the plurality of access command may be associated with requested addresses within the region of memory. The method may include updating the value of the second pointer bases on a quantity of the commands that are monitored satisfying a threshold and executing the plurality of commands on locations within the region of memory. The locations may be based on the requested address, the value of the first pointer, and the value of the second pointer.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: August 8, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Joseph Thomas Pawlowski
  • Patent number: 11693568
    Abstract: A method for managing overprovisioning in a solid state storage drive (SSD) array comprising (i) receiving usage data from each of a plurality of SSDs, (ii) determining a predicted service life value for each of the plurality of SSDs based on at least the usage data, (iii) comparing each of the predicted service life values with a predetermined service life value for each respective SSD, (iv) remapping at least one namespace in at least one of the plurality of SSDs among the plurality of SSDs, or reducing an available logical storage capacity for at least one of the plurality of SSDs. Here the remapping or reducing is based on a result of the comparing that the predicted service life value for the at least one of the plurality of SSDs is not greater than the predetermined service life value for that SSD.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: July 4, 2023
    Assignee: Kioxia Corporation
    Inventor: Joel H. Dedrick
  • Patent number: 11693771
    Abstract: A storage device having enhanced operating efficiency includes a memory device with a plurality of memory blocks and a memory controller that performs an operation of de-randomizing data stored in different memory blocks using an identical random seed. The memory controller includes a random table that has a first address group including physical page addresses of a first memory block and a second address group including physical page addresses of a second memory block. The random table also has a random seed group that includes random seeds corresponding to the first address group and the second address group.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: July 4, 2023
    Assignee: SK hynix Inc.
    Inventor: Seung Gu Ji
  • Patent number: 11675694
    Abstract: Embodiments of the invention utilize an improved LSM-tree-based key-value approach to strike the optimal balance between the costs of updates and lookups and storage space. The improved approach involves use of a new merge policy that removes merge operations from all but the largest levels of LSM-tree. In addition, the improved approach may include an improved LSM-tree that allows separate control over the frequency of merge operations for the largest level and for all other levels. By adjusting various parameters, such as the storage capacity of the largest level, the storage capacity of the other smaller levels, and/or the size ratio between adjacent levels in the improved LSM-tree, the improved LSM-tree-based key-value approach may maximize throughput for a particular workload.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: June 13, 2023
    Assignee: President and Fellows of Harvard College
    Inventors: Stratos Idreos, Niv Dayan
  • Patent number: 11663142
    Abstract: Methods, systems, and devices for codeword rotation for zone grouping of media codewords are described. A value of a first pointer may be configured to correspond to a first memory address within a region of memory and a value of a second pointer may be configured to correspond to a second memory address within the region of memory. The method may include monitoring access commands for performing access operations within the region of memory, where the plurality of access command may be associated with requested addresses within the region of memory. The method may include updating the value of the second pointer bases on a quantity of the commands that are monitored satisfying a threshold and executing the plurality of commands on locations within the region of memory. The locations may be based on the requested address, the value of the first pointer, and the value of the second pointer.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: May 30, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Joseph Thomas Pawlowski
  • Patent number: 11656899
    Abstract: Implementations of the disclosure provide a processing device comprising an address translation circuit to intercept a work request from an I/O device. The work request comprises a first ASID to map to a work queue. A second ASID of a host is allocated for the first ASID based on the work queue. The second ASID is allocated to at least one of: an ASID register for a dedicated work queue (DWQ) or an ASID translation table for a shared work queue (SWQ). Responsive to receiving a work submission from the SVM client to the I/O device, the first ASID of the application container is translated to the second ASID of the host machine for submission to the I/O device using at least one of: the ASID register for the DWQ or the ASID translation table for the SWQ based on the work queue associated with the I/O device.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: May 23, 2023
    Assignee: Intel Corporation
    Inventors: Sanjay Kumar, Rajesh M. Sankaran, Gilbert Neiger, Philip R. Lantz, Jason W. Brandt, Vedvyas Shanbhogue, Utkarsh Y. Kakaiya, Kun Tian
  • Patent number: 11656995
    Abstract: A method comprising receiving a memory access request comprising an address of data to be accessed and determining an access granularity of the data to be accessed based on the address of the data to be accessed. The method further includes, in response to determining that the data to be accessed has a first access granularity, generating first cache line metadata associated with the first access granularity and in response to determining that the data to be accessed has a second access granularity, generating second cache line metadata associated with the second access granularity. The method further includes storing the first cache line metadata and the second cache line metadata in a single cache memory component.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 23, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Dhawal Bavishi, Robert M. Walker
  • Patent number: 11650885
    Abstract: Systems and methods for providing and/or facilitating live browsing of granular mail or mailbox data, such as data stored within Exchange mailboxes, are described. For example, the systems and methods may provide mechanisms for browsing and/or restoring granular data (e.g., email data) from an Exchange database backup copy (or other secondary copy), without having to restore the entire database from the backup copy.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: May 16, 2023
    Assignee: Commvault Systems, Inc.
    Inventors: Yan Liu, Jun H. Ahn, Manas Bhikchand Mutha, Priya Sundaresan
  • Patent number: 11640248
    Abstract: A computing device including a processing module configured to receive a read request for a read threshold number of encoded data slices of the set of encoded data slices, determine whether a read threshold number of encoded data slices of the set of encoded data slices is available in a set of storage units associated with a first storage site and when a read threshold number of encoded data slices of the set of encoded data slices is not available in the set of storage units associated with a first storage site, transmit a read request for a read threshold number of encoded data slices to the set of storage units associated with a second storage site.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: May 2, 2023
    Assignee: Pure Storage, Inc.
    Inventors: Greg R. Dhuse, Jason K. Resch, Ethan S. Wozniak
  • Patent number: 11636030
    Abstract: A data storage device includes a memory device including multiple memory blocks corresponding to multiple sub-regions and a memory controller. The memory controller updates content of a read count table in response to a read command with a transfer length greater than 1 for designating more than one logical address to be read. The read count table includes multiple fields recording a read count associated with one sub-region and content of the read count table is updated by increasing the read count(s) associated with the sub-region(s) that logical addresses designated in the read command belong to. The memory controller selects at least one sub-region according to the content of the read count table and performs a data rearrangement procedure to move data of the logical addresses belonging to the selected at least one sub-region to a first memory space of the memory device having continuous physical addresses.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: April 25, 2023
    Assignee: Silicon Motion, Inc.
    Inventor: Yu-Ta Chen
  • Patent number: 11625167
    Abstract: An embodiment of a semiconductor apparatus may include technology to determine if a threshold is met based on runtime memory usage, and enable foreground memory deduplication if the threshold is determined to be met. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: April 11, 2023
    Assignee: Intel Corporation
    Inventors: Dujian Wu, Yuping Yang, Donggui Yin
  • Patent number: 11625329
    Abstract: A method is used in host-based caching. A host receives a request for data, and identifies a host in a plurality of hosts that owns the data.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: April 11, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Anton Kucherov, David Meiri
  • Patent number: 11614873
    Abstract: This document describes techniques for storing virtual disk payload data. In an exemplary configuration, each virtual disk extent can be associated with state information that indicates whether the virtual disk extent is described by a virtual disk file. Under certain conditions the space used to describe a virtual disk extent can be reclaimed and state information can be used to determine how read and/or write operations directed to the virtual disk extent are handled. In addition to the foregoing, other techniques are described in the claims, figures, and detailed description of this document.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: March 28, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: John A. Starks, Dustin L. Green, Todd William Harris, Mathew John, Senthil Rajaram, Karan Mehra, Neal R. Christiansen, Chung Lang Dai
  • Patent number: 11609826
    Abstract: Systems and methods for performing backup operations and other secondary copy operations for mail servers, such as Exchange servers, are described. In some cases, the systems and methods perform multi-streaming backup and other copy operations using a single mailbox agent, which launches backup streams via a coordinator that determines when to launch streams, at what mailboxes (or folders) to launch the streams, and so on. The coordinator communicates with controllers at different machines (e.g., servers) to be backed up, and may assign streams, mailboxes, and so on, to the different controllers, which perform the backup operations for their assigned mailboxes and/or clients.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: March 21, 2023
    Assignee: Commvault Systems, Inc.
    Inventors: Christopher A. Alonzo, Jun H. Ahn, Manas Bhikchand Mutha, Vipul Pawale
  • Patent number: 11609844
    Abstract: A memory system includes a first memory that is nonvolatile, a second memory that is volatile, and a memory controller. The memory controller is configured to store first information in the second memory. The first information includes management information. The memory controller is further configured to compress the first information. The compressed first information is second information. The memory controller is configured to store the second information in the first memory.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: March 21, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Keiri Nakanishi, Konosuke Watanabe, Kohei Oikawa, Daisuke Iwai