Patents Examined by Sam Rizk
  • Memory repair categorization tracking
    Patent number: 9305664
    Abstract: An integrated circuit includes a set of non-volatile bits that may be programmed during multiprobe testing of the integrated circuit (IC). A defective portion of the IC is identified by testing the IC during multiprobe testing prior to packaging the IC. The IC is scrapped if the defective portion of IC does not meet repair criteria. A defect category is selected that is indicative of the defective portion, wherein the defect category is selected from a set of defect categories. The defective portion is replaced with a standby repair portion by modifying circuitry on the IC. The selected defect category is recorded in a plurality of non-volatile bits on the IC. The non-volatile bits may be read after extended testing or after end-user deployment in order to track failure rate of repaired ICs based on the defect category.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: April 5, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Beena Pious, Stanton Petree Ashburn, Abha Singh Kasper
  • Detection and restoration of erroneous data
    Patent number: 9298540
    Abstract: Embodiments of the present invention provide systems, methods, and computer storage media for detecting and restoring erroneous data. In cases that a data entry within a data matrix is determined to be erroneous, the data entry can be restored using a replacement value calculated in accordance with other data from the data matrix. In particular, the number of dimensions used to calculate the replacement value can be reduced from the complete set of dimensions to avoid unnecessary noise data that may impact corrected data values.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: March 29, 2016
    Assignee: ADOBE SYSTEMS INCORPORATED
    Inventor: Kourosh Modarresi
  • Single event upset protection circuit and method
    Patent number: 9292378
    Abstract: An SEU protection circuit comprises first and second storage means for receiving primary and redundant versions, respectively, of an n-bit wide data value that is to be corrected in case of an SEU occurrence; the correction circuit requires that the data value be a 1-hot encoded value. A parity engine performs a parity operation on the n bits of the primary data value. A multiplexer receives the primary and redundant data values and the parity engine output at respective inputs, and is arranged to pass the primary data value to an output when the parity engine output indicates ‘odd’ parity, and to pass the redundant data value to the output when the parity engine output indicates ‘even’ parity. The primary and redundant data values are suitably state variables, and the parity engine is preferably an n-bit wide XOR or XNOR gate.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: March 22, 2016
    Assignee: TELEDYNE SCIENTIFIC & IMAGING, LLC
    Inventors: John Wallner, Michael Gorder
  • Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems
    Patent number: 9294131
    Abstract: Modulation and coding schemes are provided for improved performance of wireless communications systems to support services and applications for terminals with operational requirements at relatively low ES/N0 ratios. The provided modulation and coding schemes will support current and future communications services and applications for terminals with operational requirements at relatively low ES/N0 ratios, and will provide modulation and coding schemes that offer finer granularity within an intermediate operational range of ES/N0 ratios. The new modulation and coding schemes provide new BCH codes, and low density parity check (LDPC) codes.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: March 22, 2016
    Assignee: Hughes Network Systems, LLC
    Inventors: Mustafa Eroz, Lin-Nan Lee
  • Managing chip testing data
    Patent number: 9285423
    Abstract: A system and method of a test structure for testing a chip is disclosed. The system may include a scan channel comprising a plurality of scannable latches. The scan channel may be configured to scan input data to apply to logic circuits on a chip and further configured to receive outputs from logic circuits on the chip. The system may further include, a storage configured to store unmodified a selected bit of the scan channel during a scan out of the scan channel.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: March 15, 2016
    Assignee: International Business Machines Corporation
    Inventors: Steven M. Douskey, Ryan A. Fitch, William V. Huott, Mary P. Kusko
  • Encoding apparatus and encoding method in data communication system
    Patent number: 9288011
    Abstract: An encoding method and apparatus in a data communication system are provided. The method includes inputting a source block including a plurality of source payloads, converting the source block to an information block including a plurality of information payloads according to an Information Block Generation (IBG) mode selected from a plurality of IBG modes, transmitting a delivery block generated by adding a parity block generated by encoding the information block according to a selected encoding scheme to the source block to a receiver, and transmitting information indicating the selected IBG mode to the receiver.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: March 15, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Hee Hwang, Kyung-Mo Park, Hyun-Koo Yang
  • Redundant encoding
    Patent number: 9280413
    Abstract: Error events are tracked. The error events are classified based on a number of errors included in each event. A desired level of error event to be able to be corrected in order to maintain an acceptable rate of uncorrected errors is determined. A redundancy level is selected so that new error events corresponding to the desired level of error event or a lower level of error event are corrected.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: March 8, 2016
    Assignee: Talkatone, LLC
    Inventor: Vadim Tsyganok
  • Communicating control information within a real-time stream
    Patent number: 9282133
    Abstract: Providing control information is disclosed. A real-time streaming communication channel is established with a communication party using a real-time streaming protocol. It is determined that control information is to be provided to the communication party. The control information is encapsulated using the real-time streaming protocol. The encapsulated control information is marked as including control information content. Streaming content is provided to the communication party via the real-time streaming communication channel using the real-time streaming protocol. The marked encapsulated control information is provided via the real-time streaming communication channel.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: March 8, 2016
    Assignee: Ooma, Inc.
    Inventors: Vadim Tsyganok, William M. Gillon, Hai Lei, Tobin E. Farrand, David A. Bryan
  • Memory systems and block copy methods thereof
    Patent number: 9280420
    Abstract: Methods of operating memory systems and nonvolatile memory devices include performing error checking and correction (ECC) operations on M pages of data read from a first “source” portion of M-bit nonvolatile memory cells within the nonvolatile memory device to thereby generate M pages of ECC-processed data, where M is a positive integer greater than two (2). A second “target” portion of M-bit nonvolatile memory cells within the nonvolatile memory device is then programmed with the M pages of ECC-processed data using an address-scrambled reprogramming technique, for example.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: March 8, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangyong Yoon, Kitae Park, Jinman Han
  • Error correction for powerline communication modem interface
    Patent number: 9280405
    Abstract: A powerline communication (PLC) power supply and modem interface can be implemented using a power supply processing unit coupled with a PLC modem unit. The power supply processing unit generates a composite PLC signal comprising a PLC signal and a DC power signal modulated with a zero cross signal (all determined from an AC powerline signal). High-powered components of the PLC modem unit can cause signal distortion in the zero cross signal component of the composite PLC signal making it difficult to extract zero cross information. An error correction unit can be implemented at the PLC modem unit to minimize the signal distortion and generate a zero cross signal with little or no error. The PLC modem unit also extracts the PLC signal and the DC power signal from the composite PLC signal, and processes the PLC signal using the zero cross information extracted from the corrected zero cross signal.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 8, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Gregory Allen Magin, Celestino Anastasio Corral
  • Methods of communicating data including shared ACK/NACK messages and related wireless terminals and network nodes
    Patent number: 9276707
    Abstract: A method of transmitting data from a wireless network node over a MIMO channel to a wireless terminal may include transmitting first and second transport data blocks to the wireless terminal over the MIMO channel. Responsive to receiving a NACK message from the wireless terminal corresponding to the first and second transport data blocks, the first and second transport data blocks may be retransmitted to the wireless terminal over the MIMO channel.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: March 1, 2016
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Sairamesh Nammi, Anders Jonsson, Fredrik Ovesjö, Namir Lidian
  • Decoding method, memory storage device and memory controlling circuit unit
    Patent number: 9268634
    Abstract: A decoding method, a memory storage device and a memory controlling circuit unit are provided. The method includes: reading memory cells according to a first reading voltage to obtain first verifying bits; executing a decoding procedure including a probability decoding algorithm according to the first verifying bits to obtain first decoded bits, and determining whether a decoding is successful by using the decoded bits; if the decoding is failed, reading the memory cells according to a second reading voltage to obtain second verifying bits, and executing the decoding procedure according to the second verifying bits to obtain second decoded bits. The second reading voltage is different from the first reading voltage, and the number of the second reading voltage is equal to the number of the first reading voltage. Accordingly, the ability for correcting errors is improved.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: February 23, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Wei Lin, Shao-Wei Yen, Yu-Hsiang Lin, Kuo-Hsin Lai, Kuo-Yi Cheng
  • Dual mapping between program states and data patterns
    Patent number: 9268629
    Abstract: The present disclosure includes methods and apparatuses for dual mapping between program states and data patterns. One apparatus includes a memory and a controller configured to control a dual mapping method comprising: performing a base conversion on a received data pattern and mapping a resulting base converted data pattern to one of a first number of program state combinations corresponding to a first group of memory cells; and determining a number of error data units corresponding to the base converted data pattern and mapping the number of error data units to one of a number of second program state combinations corresponding to a second group of memory cells. The number of error data units are mapped to the one of the second number of program state combinations corresponding to the second group of memory cells without being base converted.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: February 23, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Patrick R. Khayat, Sivagnanam Parthasarathy, Mustafa N. Kaynak
  • Memory controller, memory system, and memory write method
    Patent number: 9264070
    Abstract: A memory controller includes a memory interface that has multiple channels and carries out writing into a nonvolatile memory through each of the channels, a data buffer, an ECC (error correcting code) encoder for applying an error correction encoding processing on write data which are to be written into the nonvolatile memory to generate ECC data, a channel allocation part for allocating the channels to the write data and the ECC data based on a write data format of the nonvolatile memory, a write data reception processing part that stores the write data in the data buffer and outputs the write data to the ECC encoder, and a channel scheduler for transferring the write data stored in the data buffer and the ECC data to the channels of the memory interface as allocated by the channel allocation part.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: February 16, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuhiro Suzumura, Akira Yamaga
  • System and method for adjusting trip points within a storage device
    Patent number: 9263156
    Abstract: The embodiments described herein include a method and device for adjusting trip points within a storage device. The method includes: obtaining one or more configuration parameters; and based on the one or more configuration parameters, determining a trip voltage. The method also includes comparing the trip voltage with an input voltage. The method further includes triggering a power fail condition in accordance with a determination that the input voltage is less than the trip voltage.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: February 16, 2016
    Assignee: SANDISK ENTERPRISE IP LLC
    Inventors: Kenneth B. Delpapa, Gregg S. Lucas, Robert W. Ellis
  • Code generator and decoder for communications systems operating using hybrid codes to allow for multiple efficient uses of the communications systems
    Patent number: 9264069
    Abstract: A method of encoding data for transmissions from a source to a destination over a communications channel is provided. The method operates on an ordered set of source symbols and may generate zero or more redundant symbols from the source symbols, wherein data is encoded in a first step according to a simple FEC code and in a second step, data is encoded according to a second FEC code, more complex than the first FEC code. The first FEC code and/or the second FEC code might comprise coding known in the art. These steps result in two groups of encoded data in such a way that a low-complexity receiver may make use of one of the groups of encoded data while higher complexity receivers may make use of both groups of encoded data.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: February 16, 2016
    Assignee: Digital Fountain, Inc.
    Inventors: Mark Watson, Michael G. Luby
  • Memory devices facilitating differing depths of error detection and/or error correction coverage
    Patent number: 9262261
    Abstract: Memory devices facilitating differing depths of error detection and/or error correction coverage for differing portions of a memory array.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: February 16, 2016
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • DTV transmitting system and receiving system and method of processing broadcast signal
    Patent number: 9258581
    Abstract: A method is described for transmitting broadcast signals. First encoding of mobile data for a mobile service is performed. Second encoding of the first encoded mobile data is performed. The second encoded mobile data multiplexed with main data for a main service in a time domain is transmitted. The second encoded mobile data is allocated in a mobile unit and the main data is allocated in a main unit. The second encoded mobile data is transmitted with signaling information. The signaling information includes information to detect the mobile unit and a coding rate of the mobile data.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: February 9, 2016
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyoung Gon Lee, In Hwan Choi, Kook Yeon Kwak, Jong Moon Kim, Won Gyu Song, Byoung Gill Kim, Jin Woo Kim
  • Method and implementation for network coefficents selection
    Patent number: 9258084
    Abstract: A method and apparatus that improves the performance of TCP (and other protocols) in a data network by implementing segmenting the TCP path and implementing a proprietary protocol (DPR™) over the network. The DPR™ protocol provides a multiplexed tunnel for a multiplicity of TCP sessions from a client to a cloud proxy. DPR™ implements congestion management, flow control, reliability, and link monitoring. Other network protocols (such as UDP) are supported with a reliability protocol based upon network coding that improves the transmission reliability. A network and a method for transmitting processes in a network are disclosed, using deterministic coefficients for encoding packets based on network coding principles. Disclosed is a method and implementation for using deterministic coefficients for encoding packets based on network coding principles.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: February 9, 2016
    Assignee: Q FACTOR COMMUNICATIONS CORP.
    Inventors: Igor Zhovnirnovsky, Roy Subhash
  • Semiconductor memory device including non-volatile memory, cache memory, and computer system
    Patent number: 9250997
    Abstract: In one embodiment, the memory device includes a data storage region and an error correction (ECC) region. The data storage region configured to store a first number of data blocks. The ECC region is configured to store a second number of ECC blocks. Each of the second number of ECC blocks is configured to store ECC information. The second number of the ECC blocks is associated with the first number of data blocks, and the second number is less than the first number.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: February 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-gyeum Kim, Hyeok-man Kwon, Young-jun Kwon, Ki-young Choi, Jun-whan Ahn