Abstract: A package structure includes a circuit substrate, a light emitting diode array, a first encapsulant, and a sealant. The circuit substrate includes a top surface and a side surface of the circuit substrate. The light emitting diode array is disposed on the top surface of the circuit substrate. The first encapsulant is disposed above the circuit substrate. The first encapsulant includes a main portion and an extension portion, in which the main portion of the first encapsulant is disposed parallel to the top surface of the circuit substrate, and the extension portion of the first encapsulant extends to the side surface of the circuit substrate. The sealant is disposed below the extension portion of the first encapsulant, and the sealant contacts the first encapsulant and the circuit substrate. The first encapsulant and the sealant together form a coplanar surface.

Abstract: A reinforced thin-film device is disclosed. The reinforced thin-film device comprising: a substrate having a top surface for supporting an epilayer; a mask layer patterned with a plurality of nanosize cavities disposed on said substrate to form a needle pad; a thin-film of, relative to the substrate, lattice-mismatched semiconductor disposed on said mask layer, wherein said thin-film comprises a plurality of in parallel spaced semiconductor needles of said lattice-mismatched semiconductor embedded in said thin-film, wherein said plurality of semiconductor needles are vertically disposed in the axial direction towards said substrate in said plurality of nanosize cavities of said mask layer; a, relative to the substrate, lattice-mismatched semiconductor epilayer provided on said thin-film and supported thereby; and a FinFET transistor arranged on the lattice-mismatched semiconductor epilayer.

Abstract: A light device including a substrate, and first and second light emitters spaced apart from each other, and a power source to control the first light emitter and the second light emitter, in which the first and second light emitters include a light emitting region, a wavelength conversion layer disposed on the light emitting region, and a lateral reflection layer covering a region of a side of the light emitting region and the wavelength conversion layer, the first light emitter and the second light emitter are configured to output the same or different magnitudes of power by receiving the same or different magnitudes of current, the first and second light emitters are respectively configured to emit first light and second light, the first light emitter is electrically connected to the second light emitter through a common electrode.

Abstract: A method of forming a structure comprises forming a pattern of self-assembled nucleic acids over a material. The pattern of self-assembled nucleic acids is exposed to at least one repair enzyme to repair defects in the pattern. The repaired pattern of self-assembled nucleic acids is transferred to the material to form features therein. A method of decreasing defect density in self-assembled nucleic acids is also disclosed. Self-assembled nucleic acids exhibiting an initial defect density are formed over at least a portion of a material and the self-assembled nucleic acids are exposed to at least one repair enzyme to repair defects in the self-assembled nucleic acids. Additional methods are also disclosed.

Abstract: A foldable, flexible display apparatus includes a flexible display panel which displays an image and includes a display side on which the image is displayed and of which portions thereof face each other in a folded state of the flexible display apparatus; a cover window on the display side of the flexible display panel and including: a window film comprising a transparent plastic film having a modulus of elasticity of about 6.3 gigapascals or more; and a coating layer on the window film, and configured to be transparent and to protect the window film from physical damage thereto; and an adhesive layer between the window film and the display side of the flexible display panel, and configured to have elasticity and bond the window film and the flexible display panel to each other.

Abstract: A light emitting device for a display including a first LED sub-unit, a second LED sub-unit disposed on the first LED sub-unit, a third LED sub-unit disposed on the second LED sub-unit, electrode pads disposed below the first LED sub-unit, and a planarization layer disposed between the first and second LED sub-units and being light transmissive, in which the electrode pads include a common electrode pad electrically connected in common to the first, second, and third LED sub-units, first, second, and third electrode pads connected to the first, second, and third LED sub-units, respectively, the first, second, and third LED sub-units are independently drivable, light generated in the first LED sub-unit is configured to be emitted to the outside through the second and third LED sub-units, and light generated in the second LED sub-unit is configured to be emitted to the outside through the third LED sub-unit.

Abstract: The present invention discloses an integrated multiphase hydrogel, and a preparation method and application thereof in flexible and stretchable supercapacitors. The integrated multiphase hydrogel of the present invention is formed by implanting semigel electrode into semigel electrolyte by injection or printing, wherein the electrolyte hydrogel is prepared by polyvinyl alcohol, phytic acid and sulfuric acid. The electrode hydrogel is prepared from heteropoly acid, polyvinyl alcohol, phytic acid, ammonium persulfate and aniline by heating and then freeze thawing. The hydrogel of the present invention can be directly used as anode and cathode of stretchable electrode of flexible and stretchable supercapacitor without any post-processing. The electrolyte hydrogel can be used as both stretchable electrolyte and elastic substrate.

Abstract: A display apparatus includes connection lines connecting pixel circuits in the non-display area to display elements in a component area, a first organic insulating layer in the component area, and a second organic insulating layer on the first organic insulating layer, where the connection lines are disposed between the first organic insulating layer and the second organic insulating layer, where an upper surface of the first organic insulating layer includes a first lens structure, where the first lens structure includes a first curved portion disposed between two connection lines adjacent to each other, and an upper surface of the second organic insulating layer includes a second lens structure, where the second lens structure includes a second curved portion overlapping the first curved portion, and a refractive index of the second organic insulating layer is different from a refractive index of the first organic insulating layer.

Abstract: A stackable, embeddable capacitor has one or more first type vertical capacitor elements, each of which has a top cathode, a bottom anode, and a first orientation central capacitance region between the top cathode and the bottom anode. The capacitor also has one or more second type vertical capacitor elements, each of which has a bottom cathode, a top anode, and a second orientation central capacitance region between the bottom cathode and the top anode. The second type vertical capacitor elements are alternatingly stacked on the first type vertical capacitor elements.

Abstract: A capacitor and methods of processing an anode metal foil are presented. The capacitor includes a housing, one or more anodes disposed within the housing, one or more cathodes disposed within the housing, one or more separators disposed between an adjacent anode and cathode, and an electrolyte disposed around the one or more anodes, one or more cathodes, and one or more separators within the housing. The one or more anodes each include a metal foil that includes a first plurality of tunnels through a thickness of the metal foil in a first ordered arrangement having a first diameter, and a second plurality of tunnels through the thickness of the metal foil having a second ordered arrangement and a second diameter greater than the first diameter.

Abstract: A method includes receiving a structure having a dielectric layer over a conductive feature, wherein the conductive feature includes a second metal. The method further includes etching a hole through the dielectric layer and exposing the conductive feature and depositing a first metal into the hole and in direct contact with the dielectric layer and the conductive feature, wherein the first metal entirely fills the hole. The method further includes annealing the structure such that atoms of the second metal are diffused into grain boundaries of the first metal and into interfaces between the first metal and the dielectric layer. After the annealing, the method further includes performing a chemical mechanical planarization (CMP) process to remove at least a portion of the first metal.

Abstract: A negative-pressure packaging method for aluminum electrolytic capacitors including: penetratedly arranging a capacitor element in a seal; placing the capacitor element, the seal and a case at an inner chamber of an accommodating mechanism; sealing the accommodating mechanism; vacuumizing the accommodating mechanism to allow the inner chamber to be in a negative pressure state; subjecting the seal and the case to packaging, such that the seal is located at a first depth of the case; and subjecting the seal and the case to pressing, such that the seal is located at a second depth of the case, where the second depth is closer to a bottom of the case with respect to the first depth.

Abstract: The present disclosure describes a semiconductor structure with a metal ion capture layer and a method for forming the structure. The method includes forming a first fin structure and a second fin structure on a substrate and forming a first gate structure over the first fin structure and a second gate structure over the second fin structure, where the first gate structure adjoins the second gate structure. The method further includes forming a dielectric layer on the first and second gate structures, removing a portion of the dielectric layer above an adjoining portion of the first and second gate structures to form an opening, and forming a metal ion capture layer in the opening.

Abstract: An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.

Abstract: A method of manufacturing an electrolytic capacitor includes impregnating an electrolytic capacitor with a first electrolyte to form a first impregnated capacitor, aging the first impregnated capacitor using a first aging process to form a first aged capacitor, impregnating the first aged capacitor with a second electrolyte to form a second impregnated capacitor, the second electrolyte being different from the first electrolyte, aging the second impregnated capacitor using a final aging process to form a final aged capacitor, and impregnating the final aged capacitor with a third electrolyte.

Abstract: A semiconductor device can include first and second conductive layers that can be positioned over a substrate, and at least one dielectric layer between the first and second conductive layers. The at least one dielectric layer can be positioned over at least a portion of the second conductive layer, and the first conductive layer can be positioned over a portion of the least one dielectric layer. The semiconductor device can further include a third conductive layer that can be positioned over the substrate and can be conductively connected to the second conductive layer and the substrate. The third conductive layer includes a fusible link.

Abstract: A light-emitting element and a display device capable of improving the light emission property are provided. Each of a plurality of anode electrodes (11) is provided for a corresponding pixel. The pixel-isolating insulation film (12) has an opening (120) exposing corresponding one of the plurality of anode electrodes (11) to outside, and has an eave (123B) in the middle of a thickness direction of an inner wall of the opening (120). An organic layer (13) includes a CGL (132) cut by the eave (123B) of the pixel-isolating insulation film (12), and covers the opening (120). A cathode electrode (14) is disposed on a surface of the organic layer (13), the surface being a surface on the opposite side of the anode electrode (11).

Abstract: The present disclosure describes a semiconductor device with counter-doped nanostructures and a method for forming the semiconductor device. The method includes forming a fin structure on a substrate, the fin structure including one or more first-type nanostructures and one or more second-type nanostructures. The method further includes forming a polysilicon structure over the fin structure and forming a source/drain (S/D) region on a portion of the fin structure and adjacent the polysilicon structure, the S/D region including a first dopant. The method further includes doping the one or more second-type nanostructures with a second dopant via a space released by the polysilicon structure and the one or more first-type nanostructures, where the second dopant is opposite to the first dopant. The method further includes replacing portions of the one or more doped second-type nanostructures with additional second-type nanostructures.

Abstract: A semiconductor memory device and a method of manufacturing the semiconductor memory device are provided. The semiconductor memory device includes a gate stacked structure with a cell array region and a contact region with a stepped shape, and a roughness of a first sidewall of the cell array region is greater than that of a second sidewall of the contact region.

Abstract: The present disclosure relates to a silicon carbide semiconductor device, and includes a p-type second well region provided as an upper layer portion of a semiconductor layer; an n-type second impurity region provided as an upper layer portion of the second well region; a p-type second well contact region provided as an upper layer portion of the second well region; a field insulating film provided on the second well region; a second contact passed through the field insulating film electrically connected to a first main electrode; a boundary gate insulating film provided on a boundary between the element region and the non-element region; a boundary gate electrode provided on the boundary gate insulating film; and a second main electrode. The second well contact region extends from below the second contact toward the element region, and the second impurity region extends from below the second contact toward the non-element region.