Abstract: Provided is a light emitting semiconductor device comprising a flexible dielectric layer, a conductive layer on at least one side of the dielectric layer, at least one cavity or via in the dielectric substrate, and a light emitting semiconductor supported by the cavity or via. Also provided is a support article comprising a flexible dielectric layer, a conductive layer on at least one side and at least one cavity or via in the dielectric substrate. Further provided is a flexible light emitting semiconductor device system comprising the above-described light emitting semiconductor device attached to the above-described support article.

Abstract: A method for manufacturing a nitride-based semiconductor device includes: preparing a substrate; forming a buffer layer on the substrate, the buffer layer preventing dislocation with the substrate; forming a spacer on the buffer layer; forming a barrier layer on the spacer, the barrier layer forming a hetero-structure with the spacer; forming a protecting layer on the barrier layer; and forming an HfO2 layer the protecting layer through RF sputtering.

Abstract: Systems and methods for substrate wafer back side and edge cross section seals. In accordance with a first method embodiment, a silicon wafer of a first conductivity type is accessed. An epitaxial layer of the first conductivity type is grown on a front surface of the silicon wafer. The epitaxial layer is implanted to form a region of an opposite conductivity type. The growing and implanting are repeated to form a vertical column of the opposite conductivity type. The wafer may also be implanted to form a region of the opposite conductivity type vertically aligned with the vertical column.

Abstract: A semiconductor device includes a gate electrode, a top source region disposed next to the gate electrode, a drain region disposed below the bottom of the gate electrode, a oxide disposed on top of the source region and the gate electrode, and a doped polysilicon spacer disposed along a sidewall of the source region and a sidewall of the oxide. Methods for manufacturing such device are also disclosed. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a substrate structure, wherein the substrate structure includes a substrate and a fin-shaped barrier layer formed on a surface of the substrate; forming a quantum well (QW) material layer on a surface of the fin-shaped barrier layer; and forming a barrier material layer on the QW material layer.

Abstract: Provided are high electron mobility transistors (HEMTs), methods of manufacturing the HEMTs, and electronic devices including the HEMTs. An HEMT may include an impurity containing layer, a partial region of which is selectively activated. The activated region of the impurity containing layer may be used as a depletion forming element. Non-activated regions may be disposed at opposite side of the activated region in the impurity containing layer. A hydrogen content of the activated region may be lower than the hydrogen content of the non-activated region. In another example embodiment, an HEMT may include a depletion forming element that includes a plurality of regions, and properties (e.g., doping concentrations) of the plurality of regions may be changed in a horizontal direction.

Abstract: A magnetic storage element including a recording layer and a heat generator. The recording layer has a magnetization direction that is configured to change via spin injection so that information can be recorded. The heat generator is positioned to heat the recording layer. The recording layer comprises (i) cobalt and iron and (ii) a non-magnetic element or a non-magnetic element and an oxide.

Abstract: An improved semiconductor device results from the use of an amorphous silicon layer in a gate structure disposed between a dielectric layer and an upper conductive layer such as a control gate. Both a semiconductor device and method of manufacturing a semiconductor device using an amorphous silicon layer are provided.

Abstract: In one aspect, a method includes processing a metal substrate, performing a first etch on a first surface of the metal substrate to form, for an integrated circuit package, secondary leads and a curved component having two primary leads and performing a second etch, on a second surface of the substrate opposite the first surface, at locations on the secondary leads and locations on the curved component to provide a locking mechanism. Each primary lead located at a respective end of the curved component.

Abstract: A miniaturized transistor is provided with high yield. Further, a semiconductor device which has high on-state characteristics and which is capable of high-speed response and high-speed operation is provided. In the semiconductor device, an oxide semiconductor layer, a gate insulating layer, a gate electrode layer, an insulating layer, a conductive film, and an interlayer insulating layer are stacked in this order. A source electrode layer and a drain electrode layer are formed in a self-aligned manner by cutting the conductive film so that the conductive film over the gate electrode layer and the conductive layer is removed and the conductive film is divided. An electrode layer which is in contact with the oxide semiconductor layer and overlaps with a region in contact with the source electrode layer and the drain electrode layer is provided.

Abstract: Disclosed are a nano particle, a nano particle complex and a method of fabricating the nano particle. The nano particle includes a compound semiconductor having a first metal element and a second metal element. The property of the nano particle is readily controlled depending on the composition of the first and second metal elements.

Abstract: A highly reliable semiconductor device is provided. A semiconductor device is manufactured at a high yield, so that high productivity is achieved. In a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, an oxide semiconductor film containing indium, and an insulating layer provided on and in contact with the oxide semiconductor film so as to overlap with the gate electrode layer are stacked and a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the insulating layer, the chlorine concentration and the indium concentration on a surface of the insulating layer are lower than or equal to 1×1019/cm3 and lower than or equal to 2×1019/cm3, respectively.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of a first conductivity type, a first electrode, and a contact region. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The first electrode has a first and a second portion. The first portion is provided in a first direction and has a lower end being positioned below a lower end of the third semiconductor region. The second portion is in contact with the first portion and is provided on the third semiconductor region. The contact region is provided between the first portion and the second semiconductor region and is electrically connected to the first electrode and the second semiconductor region.

Abstract: An optical device includes a first region and an isolating layer which are each provided in a semiconductor substrate. The first region configures a photoelectric converter and includes at least an impurity of a first conductivity type. The isolating layer is configured to inhibit passage of electrons. The isolating layer includes a second region which is below the first region and which includes an impurity of a second conductivity type, a third region which surrounds the first region in plan-view thereof and which includes an impurity of the second conductivity type, and a fourth region which surrounds the second region in plan-view thereof and which is connected to the third region. The fourth region is greater in width than a connecting part of the third region which connects the third region to the fourth region.

Abstract: A lateral trench MOSFET comprises a dielectric isolation trench formed over a silicon-on-insulator substrate. The lateral trench MOSFET further comprises a first drift region formed between a drain/source region and an insulator, and a second drift region formed between the dielectric isolation trench and the insulator. The dielectric trench and the insulator help to fully deplete the drift regions. The depleted regions can improve the breakdown voltage as well as the on-resistance of the lateral trench MOSFET.

Abstract: An assembly (220) includes a MEMS die (222) and an integrated circuit (IC) die (224) attached to a substrate (226). The MEMS die (222) includes a MEMS device (237) formed on a substrate (242). A packaging process (264) entails forming the MEMS device (237) on the substrate (242) and removing a material portion of the substrate (237) surrounding the device (237) to form a cantilevered substrate platform (246) suspended above the substrate (226) at which the MEMS device (237) resides. The MEMS die (222) is electrically interconnected with the IC die (224). A plug element (314) can be positioned overlying the platform (246). Molding compound (32) is applied to encapsulate the die (222), the IC die (224), and substrate (226). Following encapsulation, the plug element (314) can be removed, and a cap (236) can be coupled to the substrate (242) overlying an active region (244) of the MEMS device (237).

Abstract: The present invention provides an LED light with electrostatic protection and a backlight module using the LED light. The LED light includes a carrying frame, a light-emitting die mounted in the carrying frame, and an encapsulation resin encapsulating the light-emitting die in the carrying frame. The carrying frame includes a frame body, first and second copper foils mounted in the frame body, and a first conductive metal plate mounted in the frame body. The first and second copper foils are respectively and electrically connected by two gold wires to the light-emitting die. The first conductive metal plate is arranged to space from the first or second copper foil, whereby an electrical capacitor is formed between the first or second copper foil and the first conductive metal plate. The present invention effectively prevents burnout of gold wires caused by static electricity.

Abstract: The present invention relates to yttrium aluminum garnet phosphor, a method of preparing the same and a light-emitting diode containing the same. The yttrium aluminum garnet phosphor of the present invention is represented by the following formula (I): (Y3-aMa)Al5-bSibO12??(I) wherein, 0.01?a?0.2, 0<b?1.2, and M is at least one selected from the group consisting of Ce, Dy, Gd, Eu, Tb, La, Pr, Nd, and Sm.

Abstract: A semiconductor device includes a substrate, a first barrier layer disposed on the substrate, a first dielectric layer disposed on the first barrier layer, and a second barrier layer disposed on the first barrier layer. The semiconductor device further includes a third barrier layer and a first metal gate each being disposed between a first portion of the second barrier layer and a second portion of the second barrier layer. The first metal gate is disposed between the third barrier layer and the substrate. The semiconductor device further includes a second dielectric layer. The third barrier layer is disposed between the first metal gate and the second dielectric layer. The semiconductor device further includes a second metal gate. The semiconductor device further includes a contact hole positioned between the first metal gate and the second metal gate.

Abstract: An organic light-emitting display device, having a first substrate, a second substrate facing the first substrate, a plurality of pixels disposed between the first and second substrates comprising a first electrode, a second electrode, and an organic light-emitting layer disposed between the first and second electrodes, for suppressing external light reflection and reducing pixel blurring by disposing a scattering structure in a direction a light is extracted at a distance equal to or below an adjacent pixel pitch.