Patents Examined by Shamim Ahmed
  • Patent number: 11004689
    Abstract: Exemplary methods for selectively removing silicon (e.g. polysilicon) from a patterned substrate may include flowing a fluorine-containing precursor into a substrate processing chamber to form plasma effluents. The plasma effluents may remove silicon (e.g. polysilicon, amorphous silicon or single crystal silicon) at significantly higher etch rates compared to exposed silicon oxide, silicon nitride or other dielectrics on the substrate. The methods rely on the temperature of the substrate in combination with some conductivity of the surface to catalyze the etch reaction rather than relying on a gas phase source of energy such as a plasma.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: May 11, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Zihui Li, Rui Cheng, Anchuan Wang, Nitin K. Ingle, Abhijit Basu Mallick
  • Patent number: 11004692
    Abstract: A method for shallow etching a substrate surface forms a shallow modified substrate layer overlying unmodified substrate using an accelerated neutral beam and etches the modified layer, stopping at the unmodified substrate beneath, producing controlled shallow etched substrate surfaces.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: May 11, 2021
    Assignee: Exogenesis Corporation
    Inventors: Sean R. Kirkpatrick, Richard C. Svrluga
  • Patent number: 11001733
    Abstract: Provided herein are compositions and methods for polishing surfaces comprising cobalt and optionally a low-K material, e.g., in semiconductor device fabrication. Embodiments include a slurry for chemical mechanical polishing a surface comprising cobalt and low-K materials, such as Black Diamond (BD) or SiN, comprising a complexor, an oxidizer, an abrasive, a Co corrosion inhibitor and an ILD suppressor.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: May 11, 2021
    Assignee: FUJIMI INCORPORATED
    Inventors: Hooi-Sung Kim, Charles Poutasse
  • Patent number: 11002899
    Abstract: A method for making a wire grid polarizer (WGP) can provide WGPs with high temperature resistance, robust wires, oxidation resistance, and corrosion protection. In one embodiment, the method can comprise: (a) providing an array of wires on a bottom protection layer; (b) applying a top protection layer on the wires, spanning channels between wires; then (c) applying an upper barrier-layer on the top protection layer and into the channels through permeable junctions in the top protection layer. In a variation of this embodiment, the method can further comprise applying a lower barrier-layer before applying the top protection layer. In another variation, the bottom protection layer and the top protection layer can include aluminum oxide. In another embodiment, the method can comprise applying on the WGP an amino phosphonate then a hydrophobic chemical.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: May 11, 2021
    Assignee: Moxtek, Inc.
    Inventors: R. Stewart Nielson, Matthew C. George, Shaun Ogden, Brian Bowers
  • Patent number: 11000879
    Abstract: Provided is a method and apparatus for treating a substrate with a liquid. The substrate treating method comprises a pre-treating step for supplying the treatment liquid containing hydrogen fluoride (HF) to the substrate and treating the substrate before the surface modification step and a surface modification step for supplying an alkene-based chemical onto a substrate to change the surface of the substrate to a hydrophobic state. As a result, the surface of the substrate is uniform, and generation of particles can be reduced when the substrate is removed.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: May 11, 2021
    Assignee: SEMES CO., LTD.
    Inventor: Byungsun Bang
  • Patent number: 10998189
    Abstract: A laser annealing process of a drive backplane includes: providing a mask, which has a light transmission area; and sequentially moving the mask to cover different areas of an amorphous silicon layer of the drive backplane, and annealing the amorphous silicon layer exposed in the light transmission area to form a poly-silicon pattern.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: May 4, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Feng Guan, Zhi Wang, Chen Xu
  • Patent number: 10998193
    Abstract: Integrated chips and methods of forming the same include forming a first set of sidewall spacers on a first mandrel at first vertical level. The first mandrel is etched away. A second set of sidewall spacers is formed on a second mandrel at a second vertical level. A portion of the second set of sidewall spacers vertically overlaps with a portion of the first set of sidewall spacers. The second mandrel is etched away. A first hardmask layer is etched, using the vertically overlapping first set of sidewall spacers and second set of sidewall spacers as a mask.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: May 4, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Mathew Philip, Somnath Ghosh, Daniel James Dechene, Robert Robison, Lawrence A. Clevenger
  • Patent number: 10994491
    Abstract: A three-dimensional lattice architecture with a thickness hierarchy includes a first surface and a second surface separated from each other with a distance therebetween defining a thickness of the three-dimensional lattice architecture; a plurality of angled struts extending along a plurality of directions between the first surface and the second surface; a plurality of nodes connecting the plurality of angled struts with one another forming a plurality of unit cells. At least a portion of the plurality of angled struts are internally terminated along the thickness direction of the lattice structure and providing a plurality of internal degrees of freedom towards the first or second surface of the lattice architecture.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: May 4, 2021
    Assignee: HRL Laboratories, LLC
    Inventors: Jacob M. Hundley, Tobias A. Schaedler, Sophia S. Yang, Alan J. Jacobsen
  • Patent number: 10988632
    Abstract: A coating composition comprising a polyester blend comprising a first polyester material having a Tg of from 55 to 105° C., the first polyester material being present in the polyester blend in an amount of 60 to 90 wt % (based on solids); a second polyester material having a Tg of from ?10 to 25° C., the second polyester material being present in the polyester blend in an amount of 10 to 40 wt % (based on solids); and a crosslinking system comprising a) an amine crosslinking material; b) a phenolic crosslinking material; c) an isocyanate crosslinking material.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: April 27, 2021
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Katlyn M. Fix, Keri M. Veres
  • Patent number: 10987697
    Abstract: Multi-layer coatings comprising polymerization reaction products of 1,1-di-activated vinyl compounds are described. Also provided are processes for coating substrates with curable compositions comprising 1,1-di-activated vinyl compounds. Also provided are articles coated with this composition.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: April 27, 2021
    Assignee: PPG Industries Ohio, Inc.
    Inventors: Scott J. Moravek, Daniel Connor, Adam B. Powell, Kurt G. Olson, Shanti Swarup, Caroline S. Harris, Davina J. Schwartzmiller, Aditya Gottumukkala, John M. Furar, William E. Eibon, Allison G. Condie, Richard J. Sadvary, Scott W. Sisco, Shiryn Tyebjee
  • Patent number: 10981125
    Abstract: The invention relates to continuous methods for compounding and applying adhesives, characterized in that (i) a base component of the adhesive is mixed continuously with at least one aggregate so as to produce a compounded adhesive; and (ii) the adhesive compounded in this manner is applied to a substrate. The invention also relates to such methods where a device as described here is used to carry out the method.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: April 20, 2021
    Assignees: Henkel AG & Co. KGaA, Homag Holzbearbeitungssysteme GmbH
    Inventors: Knut Hoffmann, Juergen Lotz, Johannes Schmid
  • Patent number: 10982336
    Abstract: A method for etching a metal surface includes a step of contacting a metal surface with a protic compound for a first time period to produce a first modified surface. The first modified surface is contacted with a protic ligand-forming compound that reacts with the first modified surface to form a volatile metal-containing compound including a metal atom and the protic ligand-forming compound. The volatile metal-containing compound is removed from the vicinity of the metal surface.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: April 20, 2021
    Assignee: WAYNE STATE UNIVERSITY
    Inventor: Charles H. Winter
  • Patent number: 10975264
    Abstract: Provided herein is a pigmented aqueous basecoat material including a hydroxy-functional polyether-based reaction product that is prepared by a urethane group-forming reaction of: (a) at least one component including isocyanate groups that is prepared by the urethane group-forming reaction of at least one organic diisocyanate (a1) with at least one polyether (a2) of the general structural formula (I). R is a C3 to C6 alkylene radical, and n is selected accordingly such that a polyether (b) possesses a number-average molecular weight of 500 to 5000 g/mol, the components (a1) and (a2) being used in a molar ratio of 1.8/1.7 to 3.0/1.0, and the resulting component (a) having an isocyanate content of 0.5 to 10.0% with (b) at least one organic polyol.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: April 13, 2021
    Assignee: BASF Coatings GmbH
    Inventors: Bernhard Steinmetz, Peter Hoffmann, Hardy Reuter
  • Patent number: 10968523
    Abstract: A method to partially decrease a reflectivity of a region on a mirror platform includes isolating the region on a surface of the mirror platform and removing a first material from the surface of the mirror platform within the region. The reflectivity of the mirror platform is decreased within the region.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: April 6, 2021
    Assignee: ELECTRIC MIRROR, LLC
    Inventors: James V. Mischel, Jr., James V. Mischel, Sr.
  • Patent number: 10971363
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first layer over a substrate. The first layer has a trench. The method includes forming first spacers over inner walls of the trench. The method includes removing a portion of the first spacers. The method includes forming a filling layer into the trench to cover the first spacers. The filling layer and the first spacers together form a strip structure. The method includes removing the first layer. The method includes forming second spacers over two opposite first sidewalls of the strip structure.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: April 6, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Ming Lai, Shih-Ming Chang, Wei-Liang Lin, Chin-Yuan Tseng, Ru-Gun Liu
  • Patent number: 10971357
    Abstract: A method of modifying a layer in a semiconductor device is provided. The method includes depositing a low quality film on a semiconductor substrate, and exposing a surface of the low quality film to a first process gas comprising helium while the substrate is heated to a first temperature, and exposing a surface of the low quality film to a second process gas comprising oxygen gas while the substrate is heated to a second temperature that is different than the first temperature. The electrical properties of the film are improved by undergoing the aforementioned processes.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: April 6, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Wei Liu, Theresa Kramer Guarini, Linlin Wang, Malcolm Bevan, Johanes S. Swenberg, Vladimir Nagorny, Bernard L. Hwang, Kin Pong Lo, Lara Hawrylchak, Rene George
  • Patent number: 10971353
    Abstract: The present disclosure provides a method for dehydrating a semiconductor structure, including providing a semiconductive substrate, forming a trench on the semiconductive substrate, dispensing an agent in liquid form into the trench, solidifying the agent, and dehydrating a surface in the trench by transforming the agent from solid form to vapor form.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: April 6, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Chung-Chieh Lee
  • Patent number: 10964513
    Abstract: Provided is a plasma processing apparatus including a processing chamber which is disposed in a vacuum vessel and able to be decompressed, a sample stage on a top surface of which a wafer to be processed is mounted, an opening which is configured to supply a heat-transfer gas to a gap between the wafer and the top surface of the sample stage, a regulator which regulates a flow rate of the heat-transfer gas, and a controller which regulates an operation of the regulator based on a pressure of the gap detected using an amount of the heat-transfer gas leaking from the regulator to the processing chamber through the gap while the wafer is mounted on the sample stage and an amount of the heat-transfer gas supplied from the opening to the processing chamber while the wafer is not mounted on the sample stage.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: March 30, 2021
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Shintarou Nakatani, Tsunehiko Tsubone
  • Patent number: 10961400
    Abstract: The present invention provides the following method for forming a multilayer coating film. The method comprises forming an uncured coating film of a specific primer paint composition (A) on a substrate, forming a top coating film of a specific top paint composition (B) on the uncured coating film, and simultaneously drying the films. The primer paint composition (A) is a paint composition comprising an epoxy resin (a1), a rust preventive pigment (a2), a color pigment (a3), and an extender pigment (a4); and the top paint composition (B) is a paint composition comprising an acrylic resin (b1) and an active methylene blocked polyisocyanate compound (b2).
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: March 30, 2021
    Assignee: KANSAI PAINT CO., LTD.
    Inventors: Keitaro Yamamoto, Masahiro Tada, Hirohisa Tsuda, Hideaki Katsuta
  • Patent number: 10961487
    Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: March 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pinlei Edmund Chu, Chun-Wei Hsu, Ling-Fu Nieh, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin