Patents Examined by Shamim Ahmed
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Patent number: 11766744Abstract: Embodiments of the present application generally relate to methods for forming a plurality of gratings. The methods generally include depositing a material over one or more protected regions of a waveguide combiner disposed on a substrate, the material having a thickness inhibiting removal of a grating material disposed on the waveguide combiner when an ion beam is directed toward the substrate, and directing the ion beam toward the substrate. The methods disclosed herein allow for formation of a plurality of gratings in one or more unprotected regions, while no gratings are formed in the protected regions.Type: GrantFiled: February 11, 2022Date of Patent: September 26, 2023Assignee: Applied Materials, Inc.Inventors: Morgan Evans, Joseph C. Olson, Rutger Meyer Timmerman Thijssen
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Method for preparing sodium interface and method for preparing sodium-based optical structure device
Patent number: 11761093Abstract: The present invention discloses a method for preparing a sodium interface and a method for preparing a sodium-based optical structure device. This sodium interface is prepared in an inert gas atmosphere by the following steps: (1) melting solid sodium metal into liquid by heat, and stripping off solid oxides and impurities on the surface of the molten sodium metal to obtain pure liquid sodium with metallic luster; and (2) spin-coating a dielectric substrate with the liquid sodium to obtain the sodium interface tightly attached to the dielectric substrate. The prepared sodium interface can be used as a plasmon polariton material for use in plasmon polariton optical waveguides, nano-lasers and the like.Type: GrantFiled: January 3, 2020Date of Patent: September 19, 2023Assignee: NANJING UNIVERSITYInventors: Jia Zhu, Jianyu Yu, Yang Wang -
Patent number: 11764067Abstract: The present disclosure provides an etching solution, including an ionic strength enhancer having an ionic strength greater than 10?3 M in the etching solution, wherein the ionic strength enhancer includes Li+, Na+, K+, Mg2+, Ca2+, N(CH3)+, or N(C2H5)4+, a solvent, and an etchant.Type: GrantFiled: June 9, 2021Date of Patent: September 19, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventor: Chung-Chieh Lee
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Patent number: 11764068Abstract: In a method of manufacturing a semiconductor device, a trench pattern is formed in a first layer disposed over an underlying layer, and a first dimension of the trench pattern is reduced by first directional deposition. In the first directional deposition, a deposition rate on a first side wall of the trench pattern extending in a first axis is greater than a deposition rate on a second side wall of the trench pattern extending in a second axis crossing the first axis, the first axis and the second axis being horizontal and parallel to a surface of the underlying layer.Type: GrantFiled: May 23, 2022Date of Patent: September 19, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ru-Gun Liu, Chih-Ming Lai, Wei-Liang Lin, Yung-Sung Yen, Ken-Hsien Hsieh, Chin-Hsiang Lin
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Patent number: 11756785Abstract: Exemplary methods of semiconductor processing may include etching one or more features partially through a dielectric material to expose material from one or more layer pairs formed on a substrate. The methods may include halting the etching prior to penetrating fully through the dielectric material, and prior to exposing material from all layer pairs formed on the substrate. The methods may include forming a layer of carbon-containing material on the exposed material from each of the one or more layer pairs having exposed material. The methods may include etching the one or more features fully through the dielectric material to expose material for each remaining layer pair formed on the substrate.Type: GrantFiled: August 20, 2021Date of Patent: September 12, 2023Assignee: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Zeqing Shen, Susmit Singha Roy, Abhijit Basu Mallick
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Patent number: 11754919Abstract: The present disclosure generally relates to methods of forming optical devices comprising nanostructures disposed on transparent substrates. A first process of forming the nanostructures comprises depositing a first layer of a first material on a glass substrate, forming one or more trenches in the first layer, and depositing a second layer of a second material in the one or more holes to trenches a first alternating layer of alternating first portions of the first material and second portions of the second material. The first process is repeated one or more times to form additional alternating layers over the first alternating layer. Each first portion of each alternating layer is disposed in contact with and offset a distance from an adjacent first portion in adjacent alternating layers. A second process comprises removing either the first or the second portions from each alternating layer to form the plurality of nanostructures.Type: GrantFiled: November 23, 2021Date of Patent: September 12, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Yongan Xu, Jinxin Fu, Jhenghan Yang, Ludovic Godet
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Patent number: 11747686Abstract: A display device includes a substrate of a display panel, including: a display area and a non-display area, an upper surface and a lower surface each in the display area and the non-display area, and side surfaces connecting the upper and lower surfaces to each other; a signal line on the upper surface of the substrate; a circuit substrate on a side surface of the substrate; and a connection electrode on the upper surface of the substrate in the non-display area thereof, where the connection electrode electrically connects the signal line and the circuit substrate to each other. In the non-display area, the substrate further includes: a first etched portion recessed from the side surface at which the circuit substrate is disposed, and a second etched portion extending from the first etched portion toward the signal line, and the connection electrode is in the first and second etched portions.Type: GrantFiled: July 7, 2022Date of Patent: September 5, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Byoungdae Ye, Donghyeon Lee, Junwoo You
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Patent number: 11749539Abstract: Systems and methods for selectively etching features in an electronic substrate via a precision dispense apparatus and precision etchant dispense tool are disclosed. The method includes creating a toolpath instruction for etching at least one feature in the substrate, programming the precision dispense apparatus to execute the created toolpath instruction, and causing the precision dispense tool to deposit etchant material onto the surface of the substrate to etch the substrate surface to produce the at least one feature according to the created toolpath instruction. The capabilities of the systems and methods disclosed herein extend to 3D substrates and post-build processing, among others.Type: GrantFiled: August 26, 2020Date of Patent: September 5, 2023Assignee: Rockwell Collins, Inc.Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Kyle B. Snyder, Jenny Calubayan
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Patent number: 11746411Abstract: The present invention relates to a method for forming a thin film, and more particularly, to a method for forming a thin film comprising steps of: i) adsorbing a growth inhibitor for forming a thin film on a surface of a substrate, the growth inhibitor for forming a thin film being represented by Chemical Formula 1 below; and ii) adsorbing a Ti-based thin film precursor on a surface of a substrate on which the growth inhibitor is adsorbed. AnBmXo??[Chemical Formula 1] wherein A is carbon or silicon, B is hydrogen or a C1-C3 alkyl, X is a halogen, n is an integer of 1 to 15, o is an integer of 1 or more, and m is 0 to 2n+1. According to the present invention, it is possible to suppress side reactions to appropriately lower a thin film growth rate and remove process byproducts in the thin film, thereby preventing corrosion or deterioration and greatly improving step coverage and thickness uniformity of a thin film, even when the thin film is formed on a substrate having a complex structure.Type: GrantFiled: January 6, 2020Date of Patent: September 5, 2023Inventors: Changbong Yeon, Jaesun Jung, Hyeran Byun, Taeho Song, Sojung Kim, Seokjong Lee
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Patent number: 11746257Abstract: The present invention discloses a chemical mechanical polishing slurry, the chemical mechanical polishing slurry comprises silica abrasive particles, a corrosion inhibitor, a complexing agent, an oxidizer, and at least one kind of polyacrylic acid anionic surfactant. The polishing slurry of the present invention can decrease the removal rate of tantalum while increasing the removal rate of copper, and reduce copper dishing and dielectric erosion after polish.Type: GrantFiled: December 26, 2018Date of Patent: September 5, 2023Assignee: Anji Microelectronics (Shanghai) Co., Ltd.Inventors: Jian Ma, Jianfen Jing, Junya Yang, Kai Song, Xinyuan Cai, Guohao Wang, Ying Yao, Pengcheng Bian
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Patent number: 11746410Abstract: A combustion-supporting gas line, a flammable gas line, and an inert gas line are connected to a chamber performing a heat treatment on a semiconductor wafer. Nitrogen is sent from the inert gas line to the combustion-supporting gas line before supplying flammable gas into the chamber to replace gas in the combustion-supporting gas line with nitrogen. Nitrogen is sent from the inert gas line to the flammable gas line before supplying combustion-supporting gas into the chamber to replace gas in the flammable gas line with nitrogen. Common one inert gas line is provided in the combustion-supporting gas line and the flammable gas line, thus a space for arranging components relating to gas supply can be reduced.Type: GrantFiled: November 2, 2021Date of Patent: September 5, 2023Assignee: SCREEN Holdings Co., Ltd.Inventors: Yasuaki Kondo, Mao Omori
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Patent number: 11749531Abstract: A polishing method according to the present invention, includes polishing a polishing object containing a silicon material by using a polishing composition containing abrasive grains, a tri- or more polyvalent hydroxy compound and a dispersing medium and having pH of less than 6.0.Type: GrantFiled: September 6, 2018Date of Patent: September 5, 2023Assignee: FUJIMI INCORPORATEDInventors: Yoshihiro Izawa, Kenta Ide
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Patent number: 11749503Abstract: A method performed by a plasma processing apparatus including a first electrode and a second electrode is provided. The method includes applying a pulsed wave of first radio frequency (RF) power to the first electrode or the second electrode; and applying a pulsed wave of second RF power having a lower frequency than the first RF power, to the first electrode with a given phase difference relative to the pulsed wave of the first RF power. A first on-period of the second RF power and a second on-period of the second RF power are controlled such that the first on-period and the second on-period do not overlap with a period of time while the first RF power is turned on. Also, the first on-period is controlled such that the first on-period ends just before the first RF power is turned on.Type: GrantFiled: January 19, 2021Date of Patent: September 5, 2023Assignee: Tokyo Electron LimitedInventor: Takuto Yoshimura
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Patent number: 11742214Abstract: The present invention provides a plasma processing method for subjecting a sample on which a metal element-containing film is disposed to plasma etching in a processing chamber. The method comprises: subjecting an inside of the processing chamber to plasma cleaning using a boron element-containing gas; removing the boron element using plasma after the plasma cleaning; subjecting the inside of the processing chamber to plasma cleaning using a fluorine element-containing gas after removing the boron element; depositing a deposited film in the processing chamber by plasma using a silicon element-containing gas after the plasma cleaning using the fluorine element-containing gas; and subjecting the sample to plasma etching after depositing the deposited film.Type: GrantFiled: February 27, 2017Date of Patent: August 29, 2023Assignee: HITACHI HIGH-TECH CORPORATIONInventors: Junya Sasaki, Masahiro Sumiya
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Patent number: 11735432Abstract: A method for removing amorphous regions from a surface of a crystal substrate uses an accelerated neutral beam including reactive gas species for removing or reactively modifying material surfaces without sputtering. Accelerated neutral atom beam enabled surface reactions remove surface contaminants from substrate surfaces to create an interface region with exposed crystal lattice in preparation for next phase processing.Type: GrantFiled: April 8, 2021Date of Patent: August 22, 2023Assignee: EXOGENESIS CORPORATIONInventors: Sean R. Kirkpatrick, Kiet A. Chau, Thy Yam, Michael J. Walsh
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Patent number: 11733186Abstract: The present application relates to a scanning probe microscope comprising a probe arrangement for analyzing at least one defect of a photolithographic mask or of a wafer, wherein the scanning probe microscope comprises: (a) at least one first probe embodied to analyze the at least one defect; (b) means for producing at least one mark, by use of which the position of the at least one defect is indicated on the mask or on the wafer; and (c) wherein the mark is embodied in such a way that it may be detected by a scanning particle beam microscope.Type: GrantFiled: April 1, 2021Date of Patent: August 22, 2023Assignee: Carl Zeiss SMT GmbHInventors: Gabriel Baralia, Christof Baur, Klaus Edinger, Thorsten Hofmann, Michael Budach
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Patent number: 11735423Abstract: Based on the fact that a film thickness of a film formed in a film formation processing of repeatedly performing a first sequence varies according to a temperature of the surface on which the film is to be formed, the film formation processing is performed after the temperature of each region of the surface of the wafer is adjusted to reduce a deviation of a trench on the surface of the wafer, so that the film is very precisely formed on the inner surface of the trench while reducing the deviation of the trench on the surface of the wafer. When the trench width is narrower than a reference width, an etching processing of repeatedly performing a second sequence is performed in order to expand the trench width, so that the surface of the film provided in the inner surface of the trench is isotropically and uniformly etched.Type: GrantFiled: April 25, 2022Date of Patent: August 22, 2023Assignee: TOKYO ELECTRON LIMITEDInventor: Masahiro Tabata
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Patent number: 11735428Abstract: A substrate processing method includes forming a liquid film of an alkaline processing liquid on a substrate by supplying the alkaline processing liquid having a reduced oxygen concentration onto the substrate; and etching the substrate by rotating the substrate while supplying the alkaline processing liquid in a state that the liquid film having a given thickness is formed on the substrate.Type: GrantFiled: July 21, 2022Date of Patent: August 22, 2023Assignee: TOKYO ELECTRON LIMITEDInventor: Shoichiro Hidaka
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Patent number: 11724962Abstract: A method for etching a curved substrate is provided, including: forming a conductive thin film layer with an etched pattern on the curved substrate; supplying power to the conductive thin film layer such that the conductive thin film layer has an equal potential at each position of the conductive thin film layer; etching each position of the curved substrate to an etching depth corresponding to the potential at each position of the conductive thin film layer based on the etched pattern of the conductive thin film layer, so as to obtain the curved substrate having a consistent etching depth at each position of the curved substrate. With the etching method, it is possible to etch an arbitrary curved surface to obtain a microstructure with a uniform processing depth.Type: GrantFiled: April 28, 2021Date of Patent: August 15, 2023Assignee: The Institute of Optics and Electronics, The Chinese Academy of SciencesInventors: Xiangang Luo, Xiong Li, Mingbo Pu, Xiaoliang Ma, Kaipeng Liu, Zeyu Zhao
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Patent number: 11728073Abstract: A method for manufacturing an electronic component includes providing a substrate and a functional layer supported by the substrate; forming a structured protection layer on a side of the substrate to which the functional layer is attached, wherein the structured protection layer has a recess so that a portion of the functional layer is exposed; applying a dispersion comprising a solvent and electrically conductive components to the exposed portion of the functional layer so that the recess is at least partially filled with the dispersion; drying the dispersion in order to create an electrically conductive layer; and removing the structured protection layer.Type: GrantFiled: November 11, 2021Date of Patent: August 15, 2023Assignee: Infineon Technologies AGInventors: Markus Meyer, Jorge Eduardo Adatti Estevez, Alexandra Marina Roth