Patents Examined by Shawn X. Gu
  • Patent number: 10565064
    Abstract: One embodiment is related to a method for backing up virtual machines, comprising: determining whether virtual machines comprised in a backup policy group are to be backed up based on a present time and a backup schedule associated with the backup policy group; in response to a determination that the virtual machines comprised in the backup policy group are to be backed up, determining a data change ratio since a previous backup for each virtual machine comprised in the backup policy group; and backing up each virtual machine comprised in the backup policy group that has a data change ratio since the previous backup that meets a data change threshold associated with the backup policy group.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: February 18, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventor: Anupam Sharma
  • Patent number: 10564891
    Abstract: In one non-limiting embodiment, a method is disclosed for performing a storage device operation on a die is provide having steps of choosing a storage device operation to perform, estimating which die is related to the storage device operation chosen to be performed and performing the storage device operation at the die based on the estimating.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: February 18, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Amir Shaharabany, Hadas Oshinsky
  • Patent number: 10558386
    Abstract: An operation device according to an embodiment includes an operation instruction circuit, an operation circuit, a buffer and a storage area instruction circuit. The operation instruction circuit issues an operation instruction for an operation type of either one of a first operation and a second operation. The operation circuit performs an operation in accordance with the operation instruction, and outputs an intermediate operation result. The buffer stores the intermediate operation result. The storage area instruction circuit specifies an area within the buffer in Which the intermediate operation result is stored, according to the operation type.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: February 11, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hui Xu, Yasuki Tanabe, Toru Sano
  • Patent number: 10558374
    Abstract: A system according to certain aspects may include a secondary storage controller computer configured to: in response to a first instruction to obtain a first secondary copy of a first data set from a secondary storage device(s), the first instruction associated with a first restore operation: instantiate a first restore thread on a processor of the secondary storage controller computer; using the first restore thread, retrieve the first secondary copy from the secondary storage device(s); and forward the retrieved first secondary copy to a primary storage subsystem for storage; and in response to a second instruction to obtain a second secondary copy of a second data set from the secondary storage device(s), the second instruction associated with a second restore operation: using the first restore thread, retrieve the second secondary copy from the secondary storage device(s); and forward the retrieved second secondary copy to the primary storage subsystem for storage.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: February 11, 2020
    Assignee: Commvault Systems, Inc.
    Inventors: Manoj Kumar Vijayan, Saurabh Agrawal, Deepak Raghunath Attarde
  • Patent number: 10558563
    Abstract: According to one embodiment, a computing system transmits to a storage device a write request designating a first logical address for identifying first data to be written and a length of the first data. The computing system receives from the storage device the first logical address and a first physical address indicative of both of a first block selected from blocks except a defective block by the storage device, and a first physical storage location in the first block to which the first data is written. The computing system updates a first table which manages mapping between logical addresses and physical addresses of the storage device and maps the first physical address to the first logical address.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: February 11, 2020
    Assignee: Toshiba Memory Corporation
    Inventor: Shinichi Kanno
  • Patent number: 10552086
    Abstract: Apparatus and method for managing shared resources in a data storage device such as a solid-state drive (SSD). In some embodiments, a non-volatile memory (NVM) has a population of semiconductor memory dies which are divided into die sets for different users. Each die set includes user garbage collection units (GCUs) for storage of user data blocks by the associated user and overprovisioned global GCUs to store user data blocks from the users of the other die sets. When an imbalance condition exists such that the workload traffic level of a first die set exceeds a workload traffic level of a second die set, at least one host I/O command for the first die set is offloaded for servicing using a selected global GCU of the second die set. The offloaded data may be subsequently transferred to the first die set after the imbalance condition is resolved.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: February 4, 2020
    Assignee: Seagate Technology LLC
    Inventors: David W. Claude, Steven S. Williams, Stacey Secatch
  • Patent number: 10552039
    Abstract: A storage control apparatus including a memory and a processor coupled to the memory and the processor configured to execute a process, the process including storing, in the memory, management information including an operation history for a storage region of a storage device, specifying at certain timing, from the management information, a first operation that has been executed to set a configuration of the storage region to a configuration at the certain timing, determining a second operation from among operations, in the management information, that precede the execution of the first operation and that target the storage region, deleting the second operation from the management information, and transmitting the management information after the deletion to a management apparatus that manages a state of the storage region of the storage device.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: February 4, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Natsumi Nakata, Toshiharu Makida
  • Patent number: 10552077
    Abstract: Disclosed herein are techniques for managing partitions on a storage device. A method can include (1) identifying a storage capacity of the storage device, (2) generating a first data structure that defines a first partition on the storage device, where the first partition consumes a first amount of the storage capacity, and (3) generating a second data structure that defines a second partition on the storage device, where the second partition consumes at least a portion of a remaining amount of the storage capacity relative to the first amount. In response to receiving a shrink request directed to the first partition, the method can further include (4) identifying a first utilized area within the first partition that will no longer be utilized as a result of the shrink request, and (5) updating first information in the first data structure to indicate that the first utilized area is unutilized.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: February 4, 2020
    Assignee: Apple Inc.
    Inventor: Andrew W. Vogan
  • Patent number: 10545677
    Abstract: A traffic manager for a distributed data storage system includes an iterative spike identifier to identify N levels of traffic spikes in traffic data on an account basis in a distributed data storage system, where N is greater than zero. A traffic cycle identifier selectively identifies cyclic traffic spikes in at least one of the N levels of traffic spikes for each of a plurality of accounts using autocorrelation and peak detection. A partition manager communicates with the traffic cycle identifier and selectively partitions one of the plurality of accounts based on based on the autocorrelation and the peak detection.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: January 28, 2020
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Sumadhur Reddy Bolli, Liang Xie, Dengkui Xi, Arild Einar Skjolsvold, Xinhua Ji, Dengyao Mo, Marcus Kimball Swenson
  • Patent number: 10545700
    Abstract: A memory management method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The method includes: performing a data merge operation for at least one physical unit of the rewritable non-volatile memory module according to a write command from a host system; and adjusting times of performing the data merge operation according to a dispersion rate of a plurality of logical units corresponding to first data stored in at least one first-type physical unit of the rewritable non-volatile memory module.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: January 28, 2020
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Che-Yueh Kuo, Wen-Jin Li
  • Patent number: 10545690
    Abstract: Provided are a computer program product, system, and method for using a cascade flag to process a copy relationship having a backward cascade copy relationship. Each of a plurality of copy relationships indicates to copy source data to target data and has a cascade flag. The cascade flag for a forward copy relationship of the copy relationships is set to a first value in response to determining that the source data for the forward copy relationship comprises target data for a backward copy relationship and that a background copy operation specified to copy source data to target data of the backward copy relationship has not completed. The cascade flag for the forward copy relationship is set to a second value in response to determining that the backward copy relationship does not have an uncompleted background copy operation.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: January 28, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Theresa M. Brown, Nedlaya Y. Francisco, Suguang Li, Mark L. Lipets, Gregory E. McBride, Carol S. Mellgren, Raul E. Saba
  • Patent number: 10545867
    Abstract: A device, method, and a data storage medium, configured to enhance an item access bandwidth and atomic operation are provided. The device comprises: a comparison module, a cache, and a distribution module; wherein the comparison module is configured to receive a query request from a service side, determine whether an address pointed to by the query request and an item address stored in the cache are identical. If so, and a valid identifier vld is valid, the comparison module is configured to directly return the item data stored in the cache to the service side without initiating a request for looking up an off-chip memory, so as to reduce a frequency of accessing the off-chip memory. If not, the comparison module is configured to initiate a request for looking up the off-chip memory, so as to process, according to a first preconfigured rule, item data returned by the off-chip memory.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: January 28, 2020
    Assignee: SANECHIPS TECHNOLOGY CO., LTD.
    Inventors: Chuang Bao, Zhenlin Yan, Chunhui Zhang, Kang An
  • Patent number: 10545876
    Abstract: A control unit for a data storage system is shown, which provides at least two buffers for updating mapping information through a host memory buffer HMB. A first buffer is provided for dynamic management of a physical-to-logical mapping table F2H that records a mapping relationship which maps a physical address within a target block to a logical address of a sector of user data stored at the physical address. The control unit performs reverse conversion on the mapping relationship to get reversed mapping information for the logical address and, accordingly, selects a target logical-to-physical mapping sub-table. A second buffer is provided to buffer the target logical-to-physical mapping sub-table when the target logical-to-physical mapping sub-table is read from the host memory buffer HMB. The control unit updates the target logical-to-physical mapping sub-table on the second buffer based on the reversed mapping information about the logical address.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: January 28, 2020
    Assignee: SILICON MOTION, INC.
    Inventor: Che-Jen Su
  • Patent number: 10534551
    Abstract: Exemplary methods, apparatuses, and systems include a memory controller detecting that an asynchronous power loss event has occurred. Upon determining that a write operation is in progress to a first type of non-volatile memory element, the memory controller cancels the write operation and retrieves data associated with the write operation. The memory controller sends a request for a second physical address pointing to a second type of non-volatile memory element. Upon receiving a second physical address corresponding to a logical address, the memory controller stores the data at the second physical address.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: January 14, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Michael W. Sheperek, James P. Crowley
  • Patent number: 10534704
    Abstract: A controller includes a memory suitable for storing valid data of first data in a first data region and storing second data in a second data region, wherein the first data includes the valid data and dummy data; a translation unit suitable for performing a first translation operation of changing the first data to the valid data by eliminating the dummy data from the first data, performing a second translation operation of changing the valid data to the first data by adding the dummy data to the valid data, and exchanging the valid data with the memory; and a processor suitable for exchanging the first data with the translation unit, and exchanging the second data with the memory.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: January 14, 2020
    Assignee: SK hynix Inc.
    Inventors: Byeong-Gyu Park, Kyu-Min Lee
  • Patent number: 10528280
    Abstract: An implementation of the disclosure provides a system comprising a storage array comprising a plurality of data blocks and a storage controller coupled to the storage array. The storage controller comprising a processing device to identify a canonical instance of a data block in a vector associated with a deduplication map. The vector represents a plurality of updates to the deduplication map over a determined time period. A deduplication reference representing duplicate data of the data block in the storage array is select from the deduplication map. The deduplication reference is remapped in the deduplication map to point to the canonical instance. Based on the remapping, an entry in the deduplication map for the deduplication reference is updated with a record. Responsive to detecting that the entry is in a location associated with an original entry of the data block in the deduplication map, delete the entry with the record.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: January 7, 2020
    Assignee: Pure Storage, Inc.
    Inventors: Cary A. Sandvig, Constantine P. Sapuntzakis, Feng Wang
  • Patent number: 10528260
    Abstract: Opportunistic combining of data chunks is disclosed. Data chunks stored in storage devices of different zones of a zone storage system can be convolved to conserve memory. The zone storage system can be a geographically diverse storage system. A convolved chunk can be stored at a zone that does not contribute a local data chunk to the data represented in the convolved chunk. A zone storage component can be androgynous, rather than being explicitly configured to act as a front/back end storage device. This androgyny can enable the zone storage system to store a complete chunk at a zone based on real time use. In an aspect, an androgynous zone storage component can take on, or transition between, a de facto front-end storage device character or de facto back-end storage device character in response to deployment of the androgynous zone storage component in the storage system.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: January 7, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Mikhail Danilov, Konstantin Buinov
  • Patent number: 10515011
    Abstract: One embodiment of the present invention sets forth a technique for increasing available storage space within compressed blocks of memory attached to data processing chips, without requiring a proportional increase in on-chip compression status bits. A compression status bit cache provides on-chip availability of compression status bits used to determine how many bits are needed to access a potentially compressed block of memory. A backing store residing in a reserved region of attached memory provides storage for a complete set of compression status bits used to represent compression status of an arbitrarily large number of blocks residing in attached memory. Physical address remapping (“swizzling”) used to distribute memory access patterns over a plurality of physical memory devices is partially replicated by the compression status bit cache to efficiently integrate allocation and access of the backing store data with other user data.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: December 24, 2019
    Assignee: NVIDIA CORPORATION
    Inventors: David B. Glasco, Peter B. Holmqvist, George R. Lynch, Patrick R. Marchand, Karan Mehra, James Roberts
  • Patent number: 10509709
    Abstract: A method begins by a dispersed storage processing module obtaining data for storage. The method continues with the dispersed storage processing module encoding the data in accordance with an error coding dispersal storage function to produce a plurality of sets of encoded data slices. The method continues with the dispersed storage processing module determining a proxy unit. The method continues with the dispersed storage processing module transmitting the plurality of sets of encoded data slices to the proxy unit, wherein the proxy unit disperses the plurality of sets of encoded data slices to a plurality of dispersed storage units.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: December 17, 2019
    Assignee: PURE STORAGE, INC.
    Inventors: Gary W. Grube, Timothy W. Markison
  • Patent number: 10503620
    Abstract: In a parity-based redundancy scheme, a log is maintained that contains a record of storage writes and associated redundancy backups. A mapping of allocation information indicative of free and allocated portions of storage is stored. An indication is received of a change to the free and allocated portions of storage. An update to the mapping of allocation information is determined, and the update to the mapping of allocation information is stored. The stored update is accessed and the redundancy backup is synchronized with stored data in response to a power interruption.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: December 10, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Karan Mehra, Sachin Patel