Abstract: A determination can be made of a type of memory access workload for an application. A determination can be made whether the memory access workload for the application is associated with sequential read operations. The data associated with the application can be stored at one of a cache of a first type or another cache of a second type based on the determination of whether the memory workload for the application is associated with sequential read operations.

Abstract: Coordinated snapshots among storage systems implementing a promotion/demotion model, including monitoring a set of two or more target storage systems, wherein the two or more target storage systems are replication targets for respective portions of a source dataset; associating a first coordinated tracking dataset with two or more local tracking datasets maintained on the two or more target storage systems, wherein each local tracking dataset is a tracking copy for one portion of the source dataset; and advancing, in dependence upon a first coordinated target checkpoint, the first coordinated tracking dataset.

Abstract: A graphics processing unit (GPU) includes a table located in a memory of the GPU and a cache hierarchy. The table contains an address of inactive data in a cache hierarchy of the GPU in which the inactive data is associated with an intermediate render target. The cache hierarchy is responsive to an eviction event by discarding the inactive data from the cache hierarchy without performing a writeback to a system memory associated with the GPU based on the address of the inactive data being contained in the table. The cache hierarchy may obtain the address of the inactive data from the table, and the inactive data may be located in a last-level cache of the cache hierarchy. In one embodiment, the address of inactive data in a cache hierarchy of the GPU includes a range of addresses for the inactive data.

Abstract: Resources of an electronic device are partitioned into a plurality of resource portions to be utilized by a plurality of clients. Each resource portion is assigned to a respective client, has a respective partition identifier (ID), and corresponds to a plurality memory bandwidth usage states tracked for a plurality of memory blocks. For each resource portion, each of the memory bandwidth usage states is associated with a respective memory block and indicates at least how much of a memory access bandwidth assigned to the respective partition ID to access the respective memory block is used. A usage level is determined for each resource partition based on the memory bandwidth usage states, and applied to adjust a credit count. When the credit count is adjusted beyond a request issue threshold, a next data access request is issued from a memory access request queue for the respective partition ID.

Abstract: Devices and methods for backing up digital data on storage devices which are automatically selected on an individual basis for digital connection, data exchange and data storage on a scheduled basis and each kept digitally disconnected when not selected and connected for backup data transfer and storage. Devices and methods which backup data on one of a number of an offline storage devices by connecting a selected storage device, backup data onto an offline storage device and then disconnecting the offline storage device, in order to isolate the backed-up data and optionally allow a different storage device to be used for the next back up event.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller and the memory device communicate using a plurality of flash channels, where each channel is mapped to one or more dies of the memory device. Each of the one or more dies of the memory device are associated with one or more strobes of a strobe cycle of a respective flash channel, where a die is provided power during a respective strobe. The controller is configured to, using a time division peak power management (TD-PPM) operation, change an association of a strobe from a first channel to a strobe of a second channel, which may adjust an amount of power provided to each of the channels and improve performance and latency of the data storage device.

Abstract: Coordinated checkpoints among storage systems implementing checkpoint-based replication, including orchestrating one or more coordinated lightweight checkpoints for a source dataset stored across two or more source storage systems; and coordinating a replication of the one or more coordinated lightweight checkpoints from the two or more source storage systems to two or more target storage systems.

Abstract: A memory device includes a memory array configured with a plurality of memory planes, and control logic, operatively coupled with the memory array. The control logic receives, from a requestor, a plurality of cache read commands requesting first data from the memory array spread across the plurality of memory planes and receives, from the requestor, a cache read context switch command and a snap read command requesting second data from one of the plurality of memory planes of the memory array. Responsive to receiving the cache read context switch command, the control logic suspends processing of the plurality of cache read commands and processes the snap read command to read the second data from the memory array and return the second data to the requestor.

Abstract: The data duplication system comprises a first storage device having a first data protection area for storing backup images of multiple generations of a first volume for data read/write by an external device. The first data protection area is inaccessible to the external device. A second storage device coupled to the first storage device. The first storage device creates a second volume for storing a backup image of a particular generation of the plurality of generations of backup images stored in the first data protection area. The second storage device creates a third volume for storing the copy data, and a virtual volume that is mapped to the second volume of the first storage device. The second storage stores the backup data of a specific generation stored in the second volume in the third volume via the virtual volume by forming a pair that copies the data in the virtual volume and the third volume.

Abstract: The described embodiments set forth techniques for providing a backup progress estimate for a backup of a source file system volume (FSV). The techniques involve determining, for the source FSV, a backup size during performance of backup operations. The operations can include determining the backup size based on a number of files on the source FSV. Additionally, the operations can include copying files of the source FSV and/or propagating corresponding files of a destination FSV to a location of the backup of the source FSV on a destination storage device and updating one or more metrics using a number of files and/or a number of bytes copied and/or propagated to the backup. In this manner, a progress indication for the backup may be determined based on the one or more metrics responsive to files and/or directories of the source file system volume being stored on a destination storage device.

Abstract: Methods, systems, and devices for read operations for regions of a memory device are described. In some examples, a memory device may include a first cache for storing mappings between logical addresses and physical addresses of the memory device, and a second cache for storing indices associated with entries removed from the first cache. The memory device may include a controller configured to load mappings to the first cache upon receiving read commands. When the first cache is full, and when the memory device receives a read command, the controller may remove an entry from the first cache and may store an index associated with the removed entry to the second cache. The controller may then transmit a mapping associated with the index to a host device for use in a HPB operation.

Abstract: Methods, systems, and devices for illegal operation reaction are described. A memory device may receive one or more commands to perform one or more respective access operations on an array of memory cells. A first circuit of the memory device may determine that the one or more commands would violate one or more thresholds associated with operation of the memory device, such as a timing threshold. In some cases, the first circuit may compare the one or more commands to the one or more patterns of commands stored at the memory device. A second circuit of the memory device may erase one or more memory cells of the memory device based on determining that the one or more thresholds associated with operation of the memory device would be violated, based on comparing the set of commands to the one or more patterns, or a combination thereof.

Abstract: A configuration file having options for validating backups is received. A request is issued to a copy service to take a snapshot of a volume to be backed up. A determination is made from the configuration file that a backup of the volume is to be validated. A script including code for generating first checksums of data captured by the snapshot is invoked. A backup copy of the volume is created using the snapshot. The backup copy is mounted. The mounted backup copy is read and second checksums of data that has been backed up are generated. The script is allowed to compare the first and second checksums. If any of the first and second checksums do not match, the backup copy is failed.

Abstract: The present disclosure relates generally to computer systems and, more particularly, to a cache refresh system and related processes and methods of use. The method of refreshing data in cache memory includes: setting, by a computer system, a refresh indicator to “true”; refreshing data in the cache memory, by the computer system, upon a determination that the refresh indicator is set to “true”; and setting, by the computer system, the refresh indicator to “false” after the refreshing of the cache memory.

Abstract: Embodiments of the invention are directed to systems, methods and computer program products structured for dynamic management of stored cache data based on predictive usage information. The invention is structured for proactive alleviation of obsolete data, dynamic pre-population and fetching of cached data based on determining actions preceding initiation of activities. Specifically, the invention is configured to detect, via a proactive processor application, a first access event via a first network device associated with a first communication channel at a first time interval, such that the first access event is detected prior to initiation of a first technology activity event by the user. The invention is also structured to populate the first adapted hierarchical cache data object for use at a technology application associated with the first network device prior to the initiation of the first technology activity event by the user.

Abstract: Methods, systems, and devices for power control for boot-up of memory systems are described. A memory system may be configured to boot-up using two different power modes: a lower-power mode, and a higher-power mode. The memory system may perform a series of evaluations to determine whether the memory system is to switch to the lower-power mode during boot-up operations, or stay in the higher-power mode. For example, the memory system may check one or more of: a history of previous boot-up failures, a voltage of an associated power management integrated circuit, a history of asynchronous power loss at the device, a power-mode configuration of the host device, or a history of host-initiated power-down commands. In some examples, by switching to the lower-power mode, the memory system may avoid repeatedly failing multiple boot-up cycles and may instead successfully boot-up the memory system.

Abstract: Techniques for providing horizontally scaled caching of versioned data are provided. In some aspects, the techniques described herein relate to a method including initializing a first version cache (VC) object based on a version of data stored in a data storage device; replicating the first VC to generate a second VC; receiving a write operation at the first VC; generating a delta for the write operation, the delta representing a change in the version of data; writing the delta to a persistent replication log, the persistent replication log storing an ordered set of deltas including the delta; writing data in the write operation to the data storage device; and applying the ordered set of deltas at the second VC to update data stored by the second VC.

Abstract: A set of submission queues associated with a host system is identified. A first set of internal queues and a second set of internal queues is generated based on the set of submission queues. Responsive to fetching a first memory access command pending in a submission queue of the set of submission queues, a first internal queue of the first set of internal queues is populated. Responsive to processing the first memory access command from the first internal queue of the first set of internal queues, a second internal queue of the second set of internal queues is populated. Responsive to completion of the first memory access command from the second internal queue of the second set of internal queues, an indication of the completion of the first memory access command is returned to the host system.

Abstract: A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.

Abstract: A technique for operating a cache is disclosed. The technique includes recording access data for a first set of memory accesses of a first frame; identifying parameters for a second set of memory accesses of a second frame subsequent to the first frame, based on the access data; and applying the parameters to the second set of memory accesses.