Abstract: A method and apparatus for filtering phase noise or jitter from a reference signal that may be of any arbitrary rate. By using a synthesizer to convert a signal at the output of a low noise signal source to a signal with frequency similar to a high speed output rate with desired relationship to the reference signal, a limitation normally caused by the narrow tuning range of a VCXO (a typical low noise signal source) can be overcome. Conversely, the desired high speed output rate may be converted to one similar to the VCXO frequency.

Abstract: One aspect of the invention is directed to on-chip high-frequency, low-jitter clock circuits including long Josephson junction (LJJ) oscillators usable as clock sources. LJJ oscillators embodying the invention may be formed using either “linear” or “annular” long Josephson junctions. This invention enables the generation and distribution of a stable high-frequency on-chip single flux quantum (SFQ) clock. The on-chip clock circuit may include a clock selector circuit and a clock distribution scheme and may be integrated with RSFQ circuits and/or with a wideband analog-to-digital converter (ADC) comparator. The invention also includes a new fluxon “sender” circuit suitable for synchronizing the LJJ oscillator with another oscillator, either on-chip or external to the chip. The new sender circuit may also enable the realization of a novel phase-locked loop (PLL) circuit.

Abstract: A self-biased phase-locked loop circuit includes a phase detector, first and second charge pumps, first and second loop filters, and a voltage-controlled oscillator (VCO). The phase detector is configured to measure a phase offset between two input signals, and to generate pulses corresponding to the phase offset. The first and second charge pumps are configured to provide charge corresponding to the pulses. The first and second loop filters are coupled to outputs of the first and second charge pumps, respectively. The filters operate to provide a control signal responsive to the charge. The VCO is configured to adjust its output frequency in response to the control signal. The second loop filter capacitor considerably improves the output clock jitter.

Abstract: A transmission front-end processor modulates the amplitude of a carrier wave with baseband data, and sets the power of the resultant modulated wave at a required value while controlling power leakage to adjoining channel to thereby output transmission data. The processor includes a first filter connected to an input terminal to which the baseband data are applied, for removing frequency components which would otherwise cause the power of the baseband data to leak to adjoining channels. The carrier wave and the baseband data passed through the first filter are applied to a power modulator. The power modulator controls the amplitude of the carrier wave with the baseband data, sets the power of the result of the control at the required value, and then outputs the power. A second filter removes higher order components from the carrier wave included in the output of the power modulator to thereby output the transmission data.

Abstract: A high precision charge pump used in a phase-lock-loop incorporating a phase/frequency detector is designed and constructed to substantially eliminate the effects of DC offset and glitch errors on the charge pump output current. The high precision charge pump is constructed of parallel current paths each having a central node which is, in turn, connected to a feedback element. The feedback element defines a feedback current which is applied to the charge pump so as to maintain the two central nodes at an equi-potential level and to maintain the value of the pump-down current exactly equal to the value of the pump-up current output by the device.

Abstract: A voltage-to current (V-to-I) converter circuit for use in combination with a current-controlled oscillator (ICO) to form a voltage-controlled oscillator (VCO), wherein the V-to-I converter circuit provides a current to the ICO while this current ranges itself corresponding to the process, supply voltage, and temperature needs of the ICO, thus allowing a more stabilized ICO and VCO. In one embodiment, the V-to-I circuit allows for independent adjustability to compensate for each quantity of required process, supply voltage, and temperature. In another embodiment, the V-to-I circuit includes compensation circuitry for process and temperature only. There is no need for supply voltage compensation because the supply voltage for the V-to-I converter circuit is provided from a supply that has been linearly regulated and preferably built-in on the chip.

Abstract: A frequency synthesizer architecture naturally combines transmitter modulation capability with a wideband all-digital PLL modulation scheme to maximize a digitally-intensive implementation by operating in a synchronous phase-domain. Synchronous logic is provided across a digitally controlled VCO and is synchronous to the VCO output clock by implementing a timing adjustment in association with a reference calculation to allow a frequency control word to contain both channel information and transmit modulation information.

Abstract: An oscillator circuit includes a current generator which supplies current to input terminals of capacitors in a trimmable capacitor array. The input terminals of the capacitors are held at a relatively constant voltage, and thus all of the current from the current generator passes through the desired capacitors of the capacitor array, thus minimizing the effect of parasitic capacitance.

Abstract: A YIG oscillator including a magnetic structure; an oscillator circuit board attached to the magnetic structure and carrying a YIG resonator positioned in an air gap of the magnetic structure; an interface circuit board including terminals for external connections, the interface circuit board supporting the magnetic structure by means of a resilient component attached to the interface circuit board; and a flexible circuit connected at one end to the oscillator circuit board and connected at the other end to the interface circuit board.

Abstract: There is a manufacturing limit on how small ceramic coaxial resonators can be produced, which leads to a limit on the frequency of resonance for these resonators. One technique to double the effective frequency of a ceramic coaxial resonator is to couple each end of a resonator to a Colpitts oscillator, the oscillators being balanced and out-of-phase by 180°. During operation, the resonator is effectively divided in half with a virtual ground forming in the center. This allows a single resonator to operate as two resonators of half the original size. Hence, the oscillation frequency for each of these balanced oscillators is doubled when compared to the frequency of similar oscillators that have separate ceramic coaxial resonators of similar size.

Abstract: A method and apparatus for digitally controlling the capacitance of an integrated circuit device using MOS-FET devices. In accordance with one aspect of the present invention, a one-bit or “binary” varactor is presented wherein the gate-to-bulk capacitance of the MOS-FET device exhibits dependency to a D.C. voltage applied between its gate and well implant regions. The capacitance-voltage characteristic of the binary capacitor has three major regions: (1) a first relatively flat region having little or no voltage dependency and having a capacitance equal to a first low capacitance of C1; (2) a sloped region wherein a voltage dependency exists; and (3) a second relatively flat region where there is little or no voltage dependency and where the capacitance equals a second higher capacitance of C2. The capacitance of the binary capacitor can be changed from C1 to C2 simply by changing the polarity of the applied D.C. voltage from a positive to a negative value.

Abstract: A voltage-controlled oscillator comprises a level converting circuit, an amplitude controller, a voltage-controlled oscillation section having differential delay cells connected in a ring form, and an output level converting circuit. The level converting circuit has limiters which respectively limit a maximum value and a minimum value of a control current. Those limiters permit only a region where the voltage-controlled oscillation section properly performs its oscillating operation to be used.

Abstract: A symbol detector for frequency modulated (FM) symbols includes a section determiner, a direction of movement determiner and a data symbol determiner. The section determiner receives a sample of in-phase and quadrature signals associated with a baseband transmitted FM symbol and determines the section value of a unit circle in an in-phase—quadrature coordinate system in which the sample lies. The direction of movement determiner receives the section value of a current sample and the section value of a neighboring sample and generates a positive direction of movement value if the direction of movement along the unit circle from the neighboring sample to the current sample is counterclockwise, a negative direction of movement value if the direction of movement is clockwise and 0 otherwise. The data symbol determiner receives the direction of movement values and decodes the transmitted FM symbol by masking N direction of movement values.

Abstract: A method and apparatus for synthesizing high-frequency signals that overcomes integration problems while meeting demanding phase noise and other impurity requirements. In one embodiment, on-package oscillator circuit inductors are provided for band selection purposes, with no external package connection to connect off-package or external inductors to on-package inductance circuits. Multiple package electrical connection points may also be provided on-package to allow for selection of alternate oscillator inductance values during package assembly.

Abstract: A MOS-type capacitor includes a semiconductor substrate of a first conductive type serving as a first electrode, a conductor layer formed on the semiconductor substrate via a capacitive insulation film and serving as a second electrode, and an impurity region of a second conductive type formed in the vicinity of the surface of the semiconductor substrate at a location in proximity to a region facing the conductor layer. The MOS-type capacitor is used as a variable capacitor in a VCO (voltage-controlled oscillator) having a widened frequency range.

Abstract: An electrical circuit having an oscillator and additional structural elements that are connected to the oscillator. In an iterative method, upon variation of circuit parameters of the additional structural elements, the following steps are carried out for each instance of the circuit parameters: a stability analysis of the circuit is carried out for each respective instance, and if the circuit oscillates, a first value is assigned to the instance in a matrix in which all the instances being examined are stored. Otherwise, a second value is assigned to the instance in the matrix.

Abstract: The present invention relates to oscillator circuits for providing periodic signals. The oscillator circuit includes a crystal element having a high Q value and good stability. A high-gain amplifier is used with the crystal element to produce an oscillating signal. The oscillator is further configured to include an input protection circuit for reducing the effects of undesirably high input voltage levels, and a coupling capacitor to reduce leakage between the amplifier and the input protection circuit. A high output signal level is provided to a Schmidtt trigger amplifier through configuring the output to be taken from the input of the high-gain amplifier.

Abstract: The present invention teaches a system for selectably oscillating at a first or a second oscillating frequency. The system comprises an oscillator for providing an oscillating output. Moreover, the system comprises a switching device for selecting a first or a second impedance in response to a select signal having a voltage. Each of the first and second impedances are fixed independently of the select signal voltage such that the oscillating output oscillates at the first oscillating frequency when the first impedance is provided and oscillates at the second oscillating frequency when the second impedance is provided.

Abstract: A process of clock recovery during the sampling of computer-type signals, wherein the sampling clock is generated from a phase locked loop or PLL which multiplies a given frequency by an integer number, includes gauging the position of the edges of the computer-type signals with respect to the sampling clock with the aid of an analog ramp triggered by the rising edges of the said signals in such a way as to obtain a first position-dependent value, carrying out a sampling clock phase correction and then carrying out a sampling clock frequency correction by using a processor.

Abstract: The interaction structure with integral coupling and bunching section and method of use of the present invention produces backward wave oscillations in an RF structure which combines ballistic bunching and extended beam-wave interaction in a complex resonator assembly. The complex extended interaction structure includes a five-gap electromagnetically-coupled cavity structure with a coaxial section inserted between the first and second cavities. The first cavity serves as a buncher cavity while the four subsequent cavities serve as energy cavities. In the coaxial section, beam and wave propagate in separate channels. The field in the buncher cavity is coupled to the four subsequent energy extraction cavities through the wave channel between the inner and outer conductors of the coaxial section, while the electron beam drifts along a cylindrical channel cut through the inner conductor of the coaxial section.