Abstract: A single resistance permits a CMOS driver to have output devices that controllably transition "fast off-slow on" and which are not simultaneously on while the driver switches states. The driver's output and supply currents contain reduced harmonics. The resistance is coupled to the gates of the output stage PMOS-NMOS devices, and forms an RC circuit with the intrinsic capacitance at the gates, extending the turn-on transition of the gate drive voltages. Each output device then turns on relatively slowly, but turns off normally. The output current transition times are essentially determined by the resistance and intrinsic capacitances. The resistance is implemented using polysilicon or diffusion, and preferably has a magnitude ten times the on-channel resistance of the input PMOS and NMOS devices driving the output stage.

Abstract: A composite liquid crystal electroluminescent electro-optical display device utilizing single-cell construction. Backlighting is furnished by a low-intensity, low-power-consumption integrally formed electroluminescent light source cooperating with a liquid crystal element with commonly excited electrodes. The integral electro-luminescent light source replaces the requirement for a transflector. The invention offers substantially improved contrast while minimizing physical size, power dissipation and construction complexity.

Abstract: CMOS domino logic is normally used only in two phases: precharge and logic evaluation. The invention uses a third phase to store data, which allows domino logic gates to be cascaded and pipelined without intervening latches. The inputs to this system must have strictly monotonic transitions during the logic evaluation phase and the precharge signal must be active during only the precharge phase. Furthermore, the pipelined system can feed its output back to the input to form an iterative structure. Such a feedback pipeline is viewed as a "loop" or "ring" of logic which circulates data until the entire computation is complete.

Abstract: A time-to-digital converter for converting a time interval into a digital signal output includes an input section for receiving signals corresponding to the start and stop of the time interval and outputting first and second electrical pulses corresponding in time thereto, a time scaling circuit for receiving the two pulses and producing a voltage pulse whose width is a scaled version of the time interval, an output voltage generator for receiving the voltage pulse and producing a voltage signal corresponding in amplitude to the width of the pulse, a buffer and reset circuit for buffering the voltage signal outputted by the output voltage generator and for resetting the buffering means after the voltage signal is passed through, and an analog to digital converter for converting the voltage signal into a digital signal.

Abstract: In an active liquid crystal display element which operates in a normally white mode, there is formed a shorting metal layer which overlaps each pixel electrode and a source bus adjacent thereto. In those portions of the pixel electrode and the source bus overlapping the shorting metal layer there are formed weld metal layers. The pixel electrode of a defective pixel is connected to the corresponding source bus by welding the weld metal layers and the shorting metal layer through irradiation with laser beams to the above-mentioned overlapping portions. As a result of this, the defective pixel becomes a black defect when the liquid crystal display element operates.

Abstract: An output circuit is provided which contains voltage control circuitry (14) which drives the gates of the output transistors (18, 20) such that the change in current remains relatively constant. The desired voltage output of the voltage control circuitry (14) can be implemented for a CMOS device using N channel and P channel transistors having their gates connected to V.sub.cc and ground respectively. The amount of current control may be adjusted to compensate for environmental conditions such as temperature or voltage supply either dynamically or prior to use.

Abstract: The invention relates to the forming of a control pulse for the transmitter in a GSM radio telephone system. A cos.sup.2 pulse is formed by means of an analog circuit from a rectangular pulse which is first shaped into a triangular pulse which may be somewhat clipped at its peak. The triangular pulse is further shaped into a cos.sup.2 pulse. The circuit also includes the selection of the abruptness of the triangular pulse and, thereby, the abruptness of the cos.sup.2 pulse.

Abstract: A clock buffer circuit that generates a local clock signal in response to a system clock signal. The clock buffer circuit includes a buffer circuit for generating the local clock signal in response to an intermediate clock signal. A buffer control circuit generates the intermediate clock signal in response to the system clock signal and the local clock signal. The buffer control circuit provides a variable delay so that, with an additional delay provided by the buffer circuit, the local clock signal has a selected phase relationship in relation to the system clock signal.

Abstract: Positive temperature coefficient thermistors are mounted in heat transfer relationship to a support member of a material that is pervious to light. The thermistors are positioned on the support member to provide a large unobstructed area through which light may pass. The self-limiting nature of the thermistors eliminates the need for a separate temperature responsive heater control switch. The heater is useable for heating liquid crystal displays, and allows back lighting of such displays by a light source positioned on the opposite side of the heater from the display.

Abstract: A field effect type liquid crytal display device suitable for use in a high level multiplexing drive, has liquid crystal molecules twisted with an angle from 180.degree. to 350.degree. which are held between two polarizers. The liquid crystal display device generates an interference color due to a birefringent effect of liquid crystal. The occurrence the of this interference color can be prevented by laminating color compensation plates but if the thickness of the optical system increases, a deviation in a display position or a change in the contrast occurs dependent on the observing direction. A phase compensation for the color interference of the liquid crystal is achieved by setting the retardation of the liquid crystal cells having a large twist angle of the liquid crystal molecules and by laminating thin phase plates. Thus, the display quality is improved and the optical axis of an achromatic display can be easily adjusted.

Abstract: An adaptive arrangement for the identification of a periodic input signal (U.sub.S), for example, a signal supplied by magnetic field speed sensors. An evaluation circuit (11) is provided for digitizing the signal (U.sub.S) and for detecting the extreme values thereof, an interference-free output signal being present at the output of the evaluation circuit (11) in the event of small interferences which are less than a presettable minimum turn-over voltage (U.sub.M). In the event of larger interferences, subsequent means are provided for detecting the fundamental oscillation of the signal (U.sub.S). The subsequent means (12, 13) include a mean value producing circuit (12) and a comparator (13). The comparator compares the digitized signal (U.sub.SD) with a reference value signal (U.sub.V) which the mean value producing circuit (12) recursively forms from the extreme values of the signal (U.sub.S). The comparator produces an interference-free output signal (U.sub.

Abstract: A buffer circuit comprising a first power terminal, second power terminal, a complementary first FET pair arranged between the first and second power temrinals to receive an external signal, a complementary second FET pair which is arranged between the first and second power terminals and whose input terminal is connected to an output terminal of the first FET pair, and voltage drop means arranged between the first power terminal and the first FET pair.

Abstract: A drop-out detection circuit which supplies an output signal indicative of a drop-out within information reproduced from a storage medium, when a rectangular wave signal produced from a modulated signal carrying the reproduced information does not supply a trigger pulse within a prescribed pulse duration. The drop-out detection circuit comprises a first pulse generation part for supplying a first pulse signal having a low level for a prescribed pulse duration when the rectangular wave signal changes from a low level to a high level, a second pulse generation part for supplying a second pulse signal having a low level for the prescribed pulse duration when the rectangular wave signal changes from the high level to the low level, and a logic gate for outputting the output signal having a high-level pulse supplied only when the first pulse signal and the second pulse signal both having the high level is supplied for a time period exceeding the prescribed pulse duration.

Abstract: A diode is connected at a first electrode thereof to a source of input signal to be switched via a capacitor and is connected at a second electrode thereof via an output circuit to an output terminal. A bias control circuit, coupled to the diode, provides a first operating mode in which the diode is forward biased for coupling the input signal to the output terminal via the output circuit and provides a second operating mode in which the first electrode of the diode is DC isolated so that the diode rectifies the AC component of the input signal and in so doing generates a reverse bias for self-biasing the diode to a non-conductive condition.

Abstract: A full swing CMOS logic circuit provides fault tolerant, cold sparing of VLSI logic devices attached to a high speed bus. P-channel FET transistors are formed in an N-well which has a biasing transistor which effectively decouples the circuit when the circuit is not powered. The input/output interface of the cold spares have a high impedance and do not corrupt an interconnected electronic bus. The final drive transistors are reverse biased or clamped to zero to prevent any leakage paths.

Abstract: Disclosed herein is a liquid crystal display comprising liquid crystal material sandwiched between two substrates, a plurality of picture element electrodes disposed on at least one of the substrates, a lead electrode connected with the picture element electrodes by means of at least one conductor-insulator-conductor device, and a light-shielding layer disposed in a region other than the display region on at least one of the substrates, the insulator being a hard carbon film. The insulator may simultaneously serve as a light-shielding layer, wherein a hard carbon film having a thickness of 1100 to 8000 .ANG., a specific resistivity (.rho.) of 10.sup.6 to 10.sup.13 ohm cm, an optical band gap (Egopt) of 1.0 to 3.0 eV, a hydrogen amount in the film (C.sub.H) of 10 to 50 atom %, an SP.sup.3 /SP.sup.2 ratio of 2-4, a Vickers hardness of 2500 to 9500 kg.multidot.mm.sup.-2, a refractive index (n) of 1.9 to 2.4, a defect density of 10.sup.17 to 10.sup.19 cm.sup.

Abstract: An optical system having a projection lens for imaging a scattering type thermo optic cell on an image receiving surface, comprising optical source apparatus for generating an optical beam and an image created on the scattering type thermo optic cell having a minimum feature size, the optical beam propagating through the object on the scattering type thermo optic cell. Also provided is a condenser system which illuminates the scattering cell and underfills the aperture of the projection lens, thereby creating a partially coherent imaging system. As a result, a relatively higher contrast ratio for the minimum features of the image is obtained at the image receiving surface.

Abstract: A high-speed receiver/latch is implemented by incorporating a differential amplifier/comparator directly into the feedback loop of a latch function. Both transparent and edge-triggered variants are possible. The resulting circuit is capable of extremely high-speed operation by virtue of very small setup time and small propagation delay.

Abstract: A liquid crystal display device includes a base supporting a laminate which has an LC-layer (liquid crystal layer) formed of polymeric material holding micro-volumes of liquid crystal material, and a conductive layer on one surface of the LC-layer, the other surface of the LC-layer being substantially conductor-free, and apparatus for transitory application of DC electrical potential through the LC-layer to the conductive layer to produce an image. The invention provides improved image quality independent of application technique and without degradation of the laminate.

Abstract: A polygonal-line characteristic amplifier has a minimum-voltage dsicrimination circuit, a maximum-voltage discrimination circuit and a resistor dividing circuit. The minimum-voltage discrimination circuit detects and outputs a lower one of an input voltage and a predetermined reference voltage respectively applied to two non-inverting input terminals thereof. The maximum-voltage discrimination circuit detects and outputs a higher one of an output from the minimum-voltage discrimination circuit and a resistor divided voltage of the input voltage produced by the resistor dividing circuit respectively inputted to two non-inverting input terminals thereof. The maximum-voltage discrimination circuit outputs at its output terminal an output voltage having polygonal-line characteristics corresponding to the input signal applied to a signal input terminal.