Abstract: A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.

Abstract: Systems and methods for oscillating exposure of a semiconductor workpiece to multiple chemistries are disclosed. A method in accordance with one embodiment includes sequentially exposing a portion of a semiconductor workpiece surface to a first chemistry having a first chemical composition and a second chemistry having a second chemical composition different than the first. Prior to rinsing the portion of the workpiece surface, the portion is sequentially exposed to the first and second chemistries again. The first and second chemistries are removed from the portion, and, after sequentially exposing the portion to each of the first and second chemistries at least twice, and removing the first and second chemistries, the portion is rinsed and dried.

Abstract: Disclosed is a semiconductor device fabricating method. A substrate is provided thereon with: an inorganic insulating film; a first inorganic sacrifice film stacked on the inorganic insulating film and having components different from those of the inorganic insulating film; a second sacrifice film formed of an inorganic insulative film stacked on the first sacrifice film, wherein a pattern for forming grooves for wiring embedment is formed in the second sacrifice film; and an organic layer including a photoresist film, wherein a pattern for forming holes for wiring embedment is formed in the organic film. According to the present invention, the thickness of the organic layer is set to be greater than the sum of the thicknesses of etch target films, i.e., the insulating film, the first sacrifice film and the second sacrifice film; the etch target films are etched in a selectivity-less manner by using plasma generated from a mixed gas of CF4 gas and CHF3 gas.

Abstract: In a thermal head manufacturing method, at least one concave portion is formed on a surface of a first substrate, and a second substrate comprised of a first layer and a second layer that is denser and harder than the first layer is provided. The first and second substrates are bonded to one another so that the second layer of the second substrate covers the concave portion of the first substrate. The first layer of the second substrate is then etched until a surface of the second layer of the second substrate is exposed. At least one heating resistor is formed on the exposed surface of the second layer of the second substrate after the etching step so that the heating resistor is disposed over the concave portion of the first substrate.

Abstract: A method of removing recast from a substrate is disclosed. The method includes chemically removing the recast using an etchant, which provides a visual indication of the presence of the recast when the part has been removed from the etchant. One example chemical etchant is comprised of a sulfuric acid solution that includes sodium chloride, sodium fluoride and ammonium persulfate. After chemical removal of the recast from the substrate, the recast is physically removed from the substrate, for example, by media blasting. The chemical and physical recast removal process can be repeated as desired. To ensure that all the recast has been removed, the substrate is wiped, for example, using a cloth. If all the recast has been removed, the cloth will not change in appearance or color.

Abstract: A technique for increasing productivity by simplified steps in a manufacturing process of TFTs, electronic circuits using TFTs, and semiconductor devices formed of TFTs is provided. A method for manufacturing a semiconductor device includes forming a light absorbing layer, forming a light-transmitting layer on the light absorbing layer emitting a linear laser beam with a homogenized energy onto a mask and thereby splitting the linear laser beam into a plurality of laser beams and emitting the plurality of laser beams onto the light-transmitting layer on the light absorbing layer, and thereby forming a plurality of openings in the light-transmitting layer and the light absorbing layer.

Abstract: A method for etching a layer that is to be removed on a substrate, in which a Si1-xGex layer is the layer to be removed, this layer being removed, at least in areas, in gas phase etching with the aid of an etching gas, in particular ClF3. The etching behavior of the Si1-xGex layer can be controlled via the Ge portion in the Si1-xGex layer. The etching method is particularly well-suited for manufacturing self-supporting structures in a micromechanical sensor and for manufacturing such self-supporting structures in a closed hollow space, because the Si1-xGex layer, as a sacrificial layer or filling layer, is etched highly selectively relative to silicon.

Abstract: A method of forming isolation layers of a semiconductor memory device. In accordance with an embodiment of the invention, a semiconductor substrate in which trenches are formed is provided. A first dielectric layer is formed over the semiconductor substrate including the trenches. An opening width of the trench is widened by performing a first etch process to remove a part of the first dielectric layer, followed by an annealing process. Fluorine-containing impurities formed in the first dielectric layer as a result of the etching and annealing processes are removed by performing a second etch process. A second dielectric layer is formed over the semiconductor substrate including the first dielectric layer.

Abstract: An acidic etcher solution for etching a substrate's surface. The acidic etcher solution includes an acid and a pH indicator, the pH indicator having at least one color transition at a pH below 7. The acidic etcher solution having an initial color at an initial pH when applied to the surface to allow determination of the evenness of the coating and the etcher having a second color at a second pH higher than the first pH wherein visual inspection allows for a determination that the etcher is substantially finished reacting.

Abstract: A method is disclosed for etching an integrated circuit structure within a trench. A layer to be etched is applied over the structure and within the trench. A CF-based polymer is deposited over the layer to be etched followed by deposition of a capping layer of SiOCl-based polymer. The CF-based polymer reduces the width of the trench to such an extent that little or no SiOCl-based polymer is deposited at the bottom of the trench. An O2 plasma etch is performed to etch through the CF-based polymer at the bottom of the trench. The O2 plasma etch has little effect on the SiOCl-based polymer, the thus the upper surfaces of the structure remain covered with polymer. Thus, these upper surfaces remain fully protected during subsequent etching of the layer to be etched.

Abstract: It is an object of the present invention to provide a method of manufacturing a semiconductor device that reduces the deterioration in processed configuration and the pattern roughness of a film to be processed, and is close to the original design and applicable to a dual damascene step and the like. The manufacturing method comprises a processing mask layer forming step of forming a processing mask layer (a lower organic film and a middle layer) comprising at least one film, and hardening treatment for at least one film of the processing mask layer by applying a film and heat hardening treatment; a processing mask layer etching step of applying a resist film for exposure to the processing mask layer, exposing and developing it to form a resist pattern, and etching the processing mask layer using the resist pattern as a mask; and a film to be processed etching step of etching the film to be processed using the pattern of the processing mask layer formed at the processing mask layer etching step as a mask.

Abstract: Structural modification using electron beam activated chemical etch (EBACE) is disclosed. A target or portion thereof may be exposed to a gas composition of a type that etches the target when the gas composition and/or target are exposed to an electron beam. By directing an electron beam toward the target in the vicinity of the gas composition, an interaction between the electron beam and the gas composition etches a portion of the target exposed to both the gas composition and the electron beam. Structural modifications of the target may be conducted by means of etching due to interaction between the electron beam and gas composition.

Abstract: Methods for rotating a magnetic field in a process chamber is provided herein. In one embodiment, a method for rotating a magnetic field in a process chamber includes forming a magnetic field having a primary shape; changing the primary shape to at least two sequential transitional shapes; and changing the transitional shape to a rotated primary shape. Optionally, the magnetic field may be maintained at an approximately constant magnitude throughout each step. Optionally, a maximum of one current applied to one or more magnetic field producing coils is equal to zero or has its polarity reversed between any two adjacent steps.

Abstract: A piezoelectric-driven MEMS device can be fabricated reliably and consistently. The piezoelectric-driven MEMS device includes: a movable flat beam having a piezoelectric film disposed above a substrate with a recessed portion such that the piezoelectric film is bridged over the recessed portion, piezoelectric drive mechanisms disposed at both ends of the piezoelectric film and configured to drive the piezoelectric film, and a first electrode disposed at the center of the substrate-side of the piezoelectric film, and a second electrode disposed on a flat part of the recessed portion of the substrate and facing the first electrode of the movable flat beam.

Abstract: The present invention provides a low-cost polishing slurry having excellent effect with respect to defects and smoothness of the surface to be polished. The polishing slurry comprises a silica abrasive and a ceria abrasive, wherein the silica abrasive content is less than 3 mass % and the ceria abrasive content is less than 1 mass %, based on the entire polishing slurry. Further, the present invention provides a method for producing a crystallized glass substrate for an information recording medium, wherein the method use a polishing slurry of the present invention. Furthermore, the present invention provides a method for producing an information recording medium, comprising forming a recording layer on a crystallized glass substrate for an information recording medium obtained by the present method.

Abstract: A filter capable of separating or filtering micro foreign particles in a flow passage is provided. A first mask and a second mask are formed on a silicon substrate by dry etching. Before performing the dry etching, a resist of the first mask is subjected to a heat treatment performed at a temperature equal to or higher than a glass transition point. A resist of the second mask is not subjected to such a heat treatment. This processing simultaneously forms in the substrate a groove portion and a wall having a hole that is located in the groove portion. A silicon material located beneath a wide portion of the first mask remains as a wall portion separating the holes.

Abstract: A method for controlling chemical dry etching to improve smoothness of an etched surface is disclosed. Ions are implanted into a surface to form a volatilizable compound at a temperature low enough to avoid, reduce, or eliminate formation of three-dimensional structures of the volatilizable compound that might create the roughness at an etched surface of the volatilizable compound. The ions are applied in a sufficient energy to penetrate to a predetermined depth of material that is to be removed from the surface in an etching cycle, and in a sufficient dosage to achieve full formation of the volatilizable compound. The surface of the volatilizable compound is exposed to a gas composition for a time duration sufficient to completely etch the volatilizable compound.

Abstract: A technique is described whereby temperature gradients are created within a semiconductor wafer. Temperature sensitive etching and/or deposition processes are then employed. These temperature sensitive processes proceed at different rates in regions with different temperatures. To reduce pinch off in etching processes, a temperature sensitive etch process is selected and a temperature gradient is created between the surface and subsurface of a wafer such that the etching process proceeds more slowly at the surface than deeper in the wafer. This reduces “crusting” of solid reaction products at trench openings, thereby eliminating pinch off in many cases. Similar temperature-sensitive deposition processes can be employed to produce void-free high aspect ratio conductors and trench fills.

Abstract: A method for forming a pattern in a semiconductor device includes forming an etch-target layer over a substrate, wherein the substrate includes a first region having a smaller pattern than the first region, forming a sacrificial layer and a passivation layer over the etch-target layer, etching the passivation layer and the sacrificial layer to form stack structures including a sacrificial pattern and a passivation pattern, forming spacers over sidewalls of the stack structures, forming a mask pattern covering the second region, removing a portion of the passivation pattern in the first region exposed by the mask pattern to expose a portion of the sacrificial pattern in the first region, removing the exposed portion of the sacrificial pattern in the first region, and etching the etch-target layer to form an etch-target pattern using the spacers in the first and second regions and the stack structure formed between the spacers in the second region.

Abstract: A method for fabricating a device includes forming a first insulation layer to cover a removable mask and a device structure that has been defined by the mask. The device structure is below the mask. The mask is lifted off to expose a top portion of the device structure. A conductive island structure is formed over the first insulation layer and the exposed top portion of the device structure. The first insulation layer and the conductive island structure are covered with a second insulation layer. A contact is formed through the second insulation layer to the conductive island structure.