Patents Examined by Stephanie Duclair
  • Patent number: 9324355
    Abstract: According to one embodiment, a pattern formation method includes steps of forming a layer to be processed on a substrate, forming a metal microparticle layer by coating the layer to be processed with a metal microparticle coating solution containing metal microparticles and a solvent, reducing a protective group amount around the metal microparticles by first etching, forming a protective layer by exposing the substrate to a gas containing C and F and adsorbing the gas around the metal microparticles to obtain a projection pattern, and transferring the projection pattern to the layer to be processed by second etching.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: April 26, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazutaka Takizawa, Takeshi Iwasaki, Akihiko Takeo
  • Patent number: 9324576
    Abstract: A method of etching patterned heterogeneous silicon-containing structures is described and includes a remote plasma etch with inverted selectivity compared to existing remote plasma etches. The methods may be used to conformally trim polysilicon while removing little or no silicon oxide. More generally, silicon-containing films containing less oxygen are removed more rapidly than silicon-containing films which contain more oxygen. Other exemplary applications include trimming silicon carbon nitride films while essentially retaining silicon oxycarbide. Applications such as these are enabled by the methods presented herein and enable new process flows. These process flows are expected to become desirable for a variety of finer linewidth structures. Methods contained herein may also be used to etch silicon-containing films faster than nitrogen-and-silicon containing films having a greater concentration of nitrogen.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: April 26, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Jingchun Zhang, Anchuan Wang, Nitin K. Ingle
  • Patent number: 9305804
    Abstract: Implementations described herein generally relate to semiconductor manufacturing and more particularly to the process of plasma etching an amorphous carbon layer. In one implementation, a method of etching a feature in an amorphous carbon layer is provided. The method comprises transferring a substrate including a patterned photoresist layer disposed above the amorphous carbon layer into an etching chamber, exposing the amorphous carbon layer to a fluorine-free etchant gas mixture including a fluorine-free halogen source gas and a passivation source gas and etching the amorphous carbon layer with a plasma of the fluorine-free etchant gas mixture. It has been found that plasma etching with a fluorine-free halogen based gas mixture reduces the formation of top critical dimension clogging oxides.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: April 5, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jong Mun Kim, Jairaj J. Payyapilly
  • Patent number: 9301383
    Abstract: A surface wave plasma (SWP) source couples microwave (MW) energy into a processing chamber through, for example, a radial line slot antenna, to result in a low mean electron energy (Te). An ICP source, is provided between the SWP source and the substrate and is energized at a low power, less than 100 watts for 300 mm wafers, for example, at about 25 watts. The ICP source couples energy through a peripheral electric dipole coil to reduce capacitive coupling.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 29, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Jianping Zhao, Lee Chen, Merritt Funk, Radha Sundararajan
  • Patent number: 9292147
    Abstract: A manufacturing method of a touch panel includes the steps of providing a substrate, forming a first conductive film on the substrate, forming a first mask on the first conductive film, etching the first conductive film to form electrode portions and lower intersect portions of the touch panel, forming an insulating film made of a negative resist on the first conductive film, and forming a contact hole above the electrode portion by removing the insulating film. The steps further include forming a second conductive film on the insulating film, forming a second mask on the second conductive film, etching the second conductive film to form an upper intersect portion connected between two adjacent electrode portions via the contact hole and intersecting with the lower intersect portion, and forming protective film on the second conductive film.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: March 22, 2016
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventor: Masahiro Teramoto
  • Patent number: 9287158
    Abstract: A substrate processing apparatus includes first and second polishing units for polishing a peripheral portion of a substrate, a primary cleaning unit for cleaning the substrate, a secondary cleaning and drying unit for drying the substrate cleaned in the primary cleaning unit, and a measurement unit for measuring the peripheral portion of the substrate. The measurement unit includes a mechanism for measurement required for polishing in the first and second polishing units, such as a diameter measurement mechanism, a cross-sectional shape measurement mechanism, or a surface condition measurement mechanism.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: March 15, 2016
    Assignee: EBARA CORPORATION
    Inventors: Tamami Takahashi, Mitsuhiko Shirakashi, Kenya Ito, Kazuyuki Inoue, Kenji Yamaguchi, Masaya Seki
  • Patent number: 9281205
    Abstract: A method for etching an ultra thin film is provided which includes providing a substrate having the ultra thin film formed thereon, patterning a photosensitive layer formed over the ultra thin film, etching the ultra thin film using the patterned photosensitive layer, and removing the patterned photosensitive layer. The etching process includes utilizing an etch material with a diffusion resistant carrier such that the etch material is prevented from diffusing to a region underneath the photosensitive layer and removing portions of the ultra thin film underneath the photosensitive layer.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: March 8, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chu Liu, Kuei-Shun Chen, Shang-Wern Chang, Chih-Yang Yeh
  • Patent number: 9257281
    Abstract: A method of fabricating a pattern comprising sequentially forming a pattern formation layer and a neutral layer on over a substrate having in a first regions and a second regions, forming guide patterns on first portions of over the neutral layer in the second regions, forming a first block copolymer layers on over second portions of the neutral layer in the first regions, phase-separating the tint block copolymer layers such that each of the first block copolymer layers includes to form first polymer blocks having a first phase and first polymer blocks having a second phase, removing the guide patterns to form openings that expose the first portions of the neutral layer in the second region, forming a second block copolymer layer on over the phase-separated first block copolymer layers and in the openings, phase-separating the second block copolymer layer into to form second polymer blocks having the first phase and second polymer blocks having the second phase removing the second polymer blocks having the s
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: February 9, 2016
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Cheol Kyu Bok, Myoung Soo Kim
  • Patent number: 9257300
    Abstract: A method for etching features into an etch layer disposed below a patterned mask is provided. At least three cycles are provided, where each cycle comprises providing an ion bombardment, by creating a plasma, of the etch layer to create activated sites of surface radicals in parts of the etch layer exposed by the patterned mask, extinguishing the plasma, exposing the etch layer to a plurality of fluorocarbon containing molecules, which causes the fluorocarbon containing molecules to selectively bind to the activated sites, wherein the selective binding is self limiting, and providing an ion bombardment of the etch layer to initiate an etch reaction between the fluorocarbon containing molecule and the etch layer, wherein the ion bombardment of the etch layer to initiate an etch reaction causes the formation of volatile etch products formed from the etch layer and the fluorocarbon containing molecule.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: February 9, 2016
    Assignee: Lam Research Corporation
    Inventors: Ranadeep Bhowmick, Eric A. Hudson
  • Patent number: 9240350
    Abstract: A technique for forming 3D structures is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for forming 3D structures. The method may comprise providing a substrate comprising at least two vertically extending fins that are spaced apart from one another to define a trench; depositing a dielectric material in the trench between the at least two vertically extending fins; providing an etch stop layer within the dielectric material, the etch stop layer having a first side and a second opposite side; removing the dielectric material near the first side of the etch stop layer.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: January 19, 2016
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ludovic Godet, Christopher R. Hatem, George D. Papasouliotis
  • Patent number: 9230778
    Abstract: The invention relates to a method for removing carbon layers, in particular ta-C layers, from substrate surfaces of tools and components. The substrate to be de-coated is accordingly arranged on a substrate support in a vacuum chamber, the vacuum chamber is charged with at least one reactive gas assisting the evacuation of carbon in gaseous form and a low-voltage plasma discharge is created in the vacuum chamber to activate the reactive gas and hence assist the required chemical reaction or reactions to de-coat the coated substrate. The low-voltage plasma discharge is a dc low-volt arc discharge, the substrate surfaces to be de-coated are bombarded substantially exclusively with electrons and oxygen, nitrogen and hydrogen are used as reactive gas.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: January 5, 2016
    Assignee: OERLIKON SURFACE SOLUTIONS AG, TRUBBACH
    Inventors: Jürgen Ramm, Beno Widrig
  • Patent number: 9230821
    Abstract: A dry etching agent according to the present invention contains (A) a fluorinated propyne represented by the chemical formula: CF3C?CX where X is H, F, Cl, Br, I, CH3, CFH2 or CF2H; and either of: (B) at least one kind of gas selected from the group consisting of O2, O3, CO, CO2, COCl2 and COF2; (C) at least one kind of gas selected from the group consisting of F2, NF3, Cl2, Br2, I2 and YFn where Y is Cl, Br or I; and n is an integer of 1 to 5; and (D) at least one kind of gas selected from the group consisting of CF4, CHF3, C2F6, C2F5H, C2F4H2, C3F8, C3F4H2, C3ClF3H and C4F8. This dry etching agent has a small environmental load and a wide process window and can be applied for high-aspect-ratio processing without special operations such as substrate excitation.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: January 5, 2016
    Assignee: Central Glass Company, Limited
    Inventors: Yasuo Hibino, Tomonori Umezaki, Akiou Kikuchi, Isamu Mori, Satoru Okamoto
  • Patent number: 9224613
    Abstract: Both sides of a large diameter semiconductor wafer are polished by the following ordered steps: a) polishing the wafer backside on a polishing pad containing a fixed abrasive, a polishing agent solution free of solids being introduced between the wafer backside and the polishing pad; b) stock polishing the wafer frontside on a polishing pad which contains a fixed abrasive, a polishing agent solution free of solids being introduced between the wafer frontside of and the polishing pad; c) removing microroughness and microdamage from the wafer frontside by polishing the frontside on a polishing pad, a polishing agent solution containing abrasives being introduced between the wafer frontside and the polishing pad; and d) final polishing of the wafer frontside by polishing the frontside on a polishing pad containing no fixed abrasive, a polishing agent solution containing abrasives being introduced between the wafer frontside and the polishing pad during the polishing step.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: December 29, 2015
    Assignee: SILTRONIC AG
    Inventor: Juergen Schwandner
  • Patent number: 9224618
    Abstract: A method for etching features in an etch layer in a plasma processing chamber is provided. An etch gas is flowed into the plasma processing chamber. A top outer electrode is maintained at a temperature of at least 150° C. during the etching of the features. The etch gas is formed into a plasma, which etches the etch layer.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: December 29, 2015
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Ananth Indrakanti, Rajinder Dhindsa
  • Patent number: 9198298
    Abstract: To peel an etching resist easily and reliably without damaging a transparent conductive layer coated with the etching resist. A method for manufacturing a transparent printed circuit in an embodiment of the present invention includes: providing a transparent conductive sheet 3 having a transparent base material 1 and a transparent conductive layer 2 formed on the transparent base material 1, forming an etching resist 4 having a specified pattern on the transparent conductive layer 2, etching the transparent conductive layer 2 with the etching resist 4 as a mask, forming a peeling film 5 on the etching resist 4 and on the transparent base material 1 exposed by etching of the transparent conductive layer 2 so as to cover an area where the etching resist 4 is formed, and peeling the peeling film 5 together with the etching resist 4.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: November 24, 2015
    Assignee: NIPPON MEKTRON, LTD.
    Inventors: Masayuki Iwase, Kazuyuki Ozaki
  • Patent number: 9190288
    Abstract: A pattern forming method includes forming a coating film containing a hydrophilic first homopolymer having a first bonding group and a hydrophobic second homopolymer having a second bonding group capable of bonding with the first bonding group, forming a bond between the first and second bonding group to produce a block copolymer of the first and second homopolymers, and heating the coating film to microphase-separating the copolymer into a hydrophilic domain and a hydrophobic domain. The hydrophilic and hydrophobic domains are arranged alternately. The bond is broken, then selectively dissolving-removing either domain by a solvent to provide a polymer pattern of a remainder domain.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: November 17, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroki Tanaka, Ryosuke Yamamoto, Naoko Kihara
  • Patent number: 9153385
    Abstract: An electrode structure is provided. The electrode structure comprises a plurality of first conductive cells and second conductive cells separated from each other and disposed on a substrate; a plurality of first conductive lines connecting adjacent said first conductive cells and a plurality of second conductive lines connecting adjacent said second conductive cells; wherein each said second conductive line comprises a conducting element and a pair of second conductive branches disposed at two sides of said conducting elements and connecting said conducting element to adjacent said second conductive cells; said first conductive lines and said second conductive lines are insulated and intersected. The method of forming an electrode structure is also provided.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: October 6, 2015
    Assignee: TPK Touch Solutions (Xiamen) Inc.
    Inventors: Jing Yu, Huilin Ye, Rongwu Wang
  • Patent number: 9150758
    Abstract: The polishing composition of the present invention contains an oxidizing agent and a scratch-reducing agent represented by general formula (1) or (2) below. In the formulas, X1 and X2 are each independently a hydrogen atom, a hydroxyl group, a carboxyl group, a phosphate group, an alkyl group, an aryl group, an alkyl polyamine group, an alkyl polyphosphate group, an alkyl polycarboxylate group, an alkyl polyaminopolyphosphate group, or an alkyl polyaminopolycarboxylate group.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: October 6, 2015
    Assignee: FUJIMI INCORPORATED
    Inventors: Anne Miller, Chiaki Saito, Kanako Fukuda
  • Patent number: 9142466
    Abstract: Methods of determining a polishing endpoint are described using spectra obtained during a polishing sequence. In particular, techniques for using only desired spectra, faster searching methods and more robust rate determination methods are described.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: September 22, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Harry Q. Lee, Boguslaw A. Swedek, Dominic J. Benvegnu, Jeffrey Drue David
  • Patent number: 9108848
    Abstract: Example embodiments relate to methods of manufacturing and transferring a larger-sized graphene layer. A method of transferring a larger-sized graphene layer may include forming a graphene layer, a protection layer, and an adhesive layer on a substrate and removing the substrate. The graphene layer may be disposed on a transferring substrate by sliding the graphene layer onto the transferring substrate.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: August 18, 2015
    Assignees: Samsung Electronics Co., Ltd., Sungkyunkwan University Foundation For Corporate Collaboration
    Inventors: Yun-sung Woo, David Seo, Su-kang Bae, Sun-ae Seo, Hyun-jong Chung, Sae-ra Kang, Jin-seong Heo, Myung-hee Jung